This code was commented out since 2021, but by default, the error
codewas initialized to `UC_REG_OK`, so there was no error returned
untila result, any write to `UC_ARM_REG_C1_C0_2` returned an error.
for glibc, if _GNU_SOURCE is defined, <time.h> will include <sys/timex.h>
but not for musl, so add "#include <sys/timex.h>"
although `man clock_adjtime` said "#include <sys/timex.h>", but it won't
work for glibc w/o "#include <time.h>", I don't known why yet.
PS it seems clock_adjtime is used nowhere?
Signed-off-by: Z. Liu <zhixu.liu@gmail.com>
* qemu/tcg: fix UC_HOOK_MEM_READ on aarch64.
Directly jump into the slow path when there is any hookmem enabled. This
fixes#1908.
Signed-off-by: Glenn Baker <glenn.baker@gmx.com>
* qemu/tcg: fix UC_HOOK_MEM_READ on ppc64.
Directly jump into the slow path when there is any hookmem enabled.
Signed-off-by: Glenn Baker <glenn.baker@gmx.com>
* qemu/tcg: check for UC_HOOK_MEM_READ_AFTER.
Use has_hookmem() helper to determine wether "slow-path" TLB read is
needed. Add this helper to x86 architecture as well so that to check for
all hookmem.
Signed-off-by: Glenn Baker <glenn.baker@gmx.com>
* qemu/tcg: factor out has_hookmem().
It's the same implementation for all architectures, so factor out
has_hookmem() into tcg_uc_has_hookmem().
Signed-off-by: Glenn Baker <glenn.baker@gmx.com>
---------
Signed-off-by: Glenn Baker <glenn.baker@gmx.com>
Unlike some other architectures, RISC-V does not expose the current
privilege mode in any architecturally-defined register. That is intentional
to make it easier to implement virtualization in software, but a Unicorn
caller operates outside of the emulated hart and so it can and should be
able to observe and change the current privilege mode in order to properly
emulate certain behaviors of a real CPU.
The current privilege level is therefore now exposed as a new
pseudo-register using the name "priv", which matches the name of the
virtual register used by RISC-V's debug extension to allow the debugger
to read and change the privilege mode while the hart is halted. Unicorn's
use of it is conceptually similar to a debugger.
The bit encoding of this register is the same as specified in RISC-V Debug
Specification v1.0-rc3 Section 4.10.1. It's defined as a "virtual"
register exposing a subset of fields from the dcsr register, although here
it's implemented directly inside the Unicorn code because QEMU doesn't
currently have explicit support for the CSRs from the debug specification.
If it supports "dcsr" in a future release then this implementation could
change to wrap reading and writing that CSR and then projecting the "prv"
and "v" bitfields into the correct locations for the virtual register.
* Remove global variable from aarch64 tcg target
This obviously breaks trying to run two unicorn instances at once on
aarch64. It appears a similar variable had already been moved to the
state struct for i386 tcg target.
* Reenable writing to jit region while calling tb_add_jump
On arm macs, every place that writes to jit code needs to have
tb_exec_unlock called first. This is already in most necessary places,
but not this one.
* Don't forget to call restore_jit_state in uc_context_restore
Every time UC_INIT is used, restore_jit_state must be used on the return
path, or occasional assertion failures will pop up on arm macs.
* Restore pc before calling into tlb fill hook
In my application it is important to have correct pc values available
from this hook.
* enable notdirty_write for snapshots when possible
Snapshots only happens when the priority of the memory region is smaller
then the snapshot_level. After a snapshot notdirty can be set.
* disable notdirty_write for self modifying code
When SMC access the memory region more then once the
tb must be rebuild multible times.
fixes#2029
* notdirty_write better hook check
Check all relevant memory hooks before enabling notdirty write.
This also checks if the memory hook is registered for the affected
region. So it is possible to use notdirty write and have some hooks
on different addresses.
* notdirty_write check for addr_write in snapshot case
* self modifying code clear recursive mem access
when self modifying code does unaligned memory accese sometimes
uc->size_recur_mem is changed but for notdirty write not changed back.
This causes mem_hooks to be missed. To fix this uc->size_recur_mem is
set to 0 before each cpu_exec() call.
Some structs, specically CPUARMState is 16-bytes aligned.
This causes segment fault because gcc tends to vectorize
the assignment of the struct with infamous movaps tricks.
Without this patch, we fail on manylinux with 2.17 glibc
in release mode in i686.
qemu_memalign will ensure the alignment across platforms.
* optimize ram block handling
Save the last element of the ram_list. This allows to
faster find where to add new elements when they are not
bigger then page size.
* save ram_list freed
this keeps the optimization for find_ram_offset() intact after snapshot
restore.
* cow only clear the tlb of affected pages
* update flatview when possible
Building each flatview new when the memory has changed is quite
expensive when many MemoryRegions are used. This is an issue when using
snapshots.
* update benchmark for new api
* save flatview in context
this avoids rebuilding the flatview when restore a context.
* init context flatview with zero
* address_space_dispatch_clear remove subpage with higher priority
* docutemnt the options for UC_CTL_CONTEXT_MODE
Specialy stress that with UC_CTL_CONTEXT_MEMORY it is not possible to
use the context with a different unicorn object.
