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fix(arm): correct write to ARM coprocessor (#2099)

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This code was commented out since 2021, but by default, the error
codewas initialized to `UC_REG_OK`, so there was no error returned
untila result, any write to `UC_ARM_REG_C1_C0_2` returned an error.
This commit is contained in:
Amaan Qureshi
2025-02-13 06:25:26 -05:00
committed by GitHub
parent 967dbc4179
commit 6b9c1c851c
2 changed files with 26 additions and 4 deletions
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8
qemu/target/arm/unicorn_arm.c
View File

@@ -440,10 +440,10 @@ uc_err reg_write(void *_env, int mode, unsigned int regid, const void *value,
env->regs[15] = (*(uint32_t *)value & ~1);
*setpc = 1;
break;
// case UC_ARM_REG_C1_C0_2:
// env->cp15.c1_coproc = *(int32_t *)value;
// break;
case UC_ARM_REG_C1_C0_2:
CHECK_REG_TYPE(int32_t);
env->cp15.cpacr_el1 = *(int32_t *)value;
break;
case UC_ARM_REG_C13_C0_3:
CHECK_REG_TYPE(int32_t);
env->cp15.tpidrro_el[0] = *(int32_t *)value;

22
tests/unit/test_arm.c
View File

@@ -932,6 +932,27 @@ static void test_arm_thumb_tcg_opcode_cmn(void)
TEST_CHECK(cmp_info.size == 32);
}
static void test_arm_cp15_c1_c0_2(void)
{
uc_engine *uc;
uint32_t val = 0x12345678;
uint32_t read_val;
// Initialize emulator in ARM mode
OK(uc_open(UC_ARCH_ARM, UC_MODE_ARM, &uc));
OK(uc_ctl_set_cpu_model(uc, UC_CPU_ARM_CORTEX_A15));
// Write to CP15 C1_C0_2
OK(uc_reg_write(uc, UC_ARM_REG_C1_C0_2, &val));
// Read from CP15 C1_C0_2
OK(uc_reg_read(uc, UC_ARM_REG_C1_C0_2, &read_val));
TEST_CHECK(read_val == val);
OK(uc_close(uc));
}
TEST_LIST = {{"test_arm_nop", test_arm_nop},
{"test_arm_thumb_sub", test_arm_thumb_sub},
{"test_armeb_sub", test_armeb_sub},
@@ -960,4 +981,5 @@ TEST_LIST = {{"test_arm_nop", test_arm_nop},
{"test_arm_mem_hook_read_write", test_arm_mem_hook_read_write},
{"test_arm_tcg_opcode_cmp", test_arm_tcg_opcode_cmp},
{"test_arm_thumb_tcg_opcode_cmn", test_arm_thumb_tcg_opcode_cmn},
{"test_arm_cp15_c1_c0_2", test_arm_cp15_c1_c0_2},
{NULL, NULL}};