Added start in mips16 mode support, and unit test for it - on dev branch (#2089)
Co-authored-by: ZakDanger <ZakDanger@users.noreply.github.com>
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@@ -19,12 +19,18 @@ MIPSCPU *cpu_mips_init(struct uc_struct *uc);
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static void mips_set_pc(struct uc_struct *uc, uint64_t address)
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{
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((CPUMIPSState *)uc->cpu->env_ptr)->active_tc.PC = address;
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((CPUMIPSState *)uc->cpu->env_ptr)->active_tc.PC = address & ~(uint64_t )1ULL;
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if (address & 1) {
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((CPUMIPSState *)uc->cpu->env_ptr)->hflags |= MIPS_HFLAG_M16;
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} else {
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((CPUMIPSState *)uc->cpu->env_ptr)->hflags &= ~(MIPS_HFLAG_M16);
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}
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}
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static uint64_t mips_get_pc(struct uc_struct *uc)
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{
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return ((CPUMIPSState *)uc->cpu->env_ptr)->active_tc.PC;
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return ((CPUMIPSState *)uc->cpu->env_ptr)->active_tc.PC |
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!!(((CPUMIPSState *)uc->cpu->env_ptr)->hflags & (MIPS_HFLAG_M16));
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}
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static void mips_release(void *ctx)
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@@ -128,7 +134,12 @@ uc_err reg_write(void *_env, int mode, unsigned int regid, const void *value,
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break;
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case UC_MIPS_REG_PC:
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CHECK_REG_TYPE(mipsreg_t);
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env->active_tc.PC = *(mipsreg_t *)value;
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env->active_tc.PC = *(mipsreg_t *)value & ~1ULL;
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if ((*(uint32_t *)value & 1)) {
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env->hflags |= MIPS_HFLAG_M16;
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} else {
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env->hflags &= ~(MIPS_HFLAG_M16);
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}
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*setpc = 1;
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break;
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case UC_MIPS_REG_CP0_CONFIG3:
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