Commit Graph

3226 Commits

Author SHA1 Message Date
mio
8a2846369c A real world mips test from Qiling 2025-02-19 00:02:19 +08:00
mio
e7ad2fda91 Further fix MIPS delay slot 2025-02-18 23:34:09 +08:00
@Antelox
0f45f15e30 Python bindings: (#2112)
- Switch from versioningit to setuptools-scm
- Disable building of tests via DUNICORN_BUILD_TESTS var
2025-02-18 16:28:06 +08:00
mio
1cb8952b14 Default x86 CPU model to UC_CPU_X86_HASWELL
Rationale: Previouly, Unicorn uses several hacks to pretend it supports
floating point instructions while not properly setting up something
like CPU features. Therefore, once related registers like CR4 is reset,
the hacks stop working and UC_ERR_INSN_INVALID is thrown. Setting the default
model to a CPu that has basical floating point support should have the
minimal break changes.
2025-02-18 12:13:24 +08:00
mio
4d173ea376 Revert FPU related changes 2025-02-18 11:13:22 +08:00
mio
795d7cbdf0 Fix testing 2025-02-18 11:03:21 +08:00
mio
0f6ec4ca9d Also initialize CR4 for UC_MODE_32 2025-02-18 10:47:35 +08:00
mio
1dae6bb774 Correctly implement CR4 2025-02-18 10:43:52 +08:00
mio
8dcaa33c66 Bump 2.1.3 2025-02-17 20:26:31 +08:00
mio
9ec6b0be94 Add a test for fpr 2025-02-17 20:23:50 +08:00
mio
c97449869d Format code 2025-02-17 20:17:10 +08:00
mio
0c6f7c60d5 Implement mips floating point related registers 2025-02-17 20:16:36 +08:00
@Antelox
f2e80ff5be - Remove a slash for aarch64 job that resulted to be a leftover from previous refactoring (#2107)
- More cleanup
2025-02-17 11:11:40 +08:00
@Antelox
8d52ece48b Replaced custom deprecated decorator with simple DeprecationWarning (#2110) 2025-02-16 23:04:42 +08:00
mio
bf5e335269 Remove types for __deprecated as ParamSpec not available on Py3.8 2025-02-15 20:50:20 +08:00
mio
7ec987e626 Basic test for previous regression 2025-02-15 20:17:18 +08:00
mio
a2d666c8e7 Remove incorrect typing reference 2025-02-15 20:12:48 +08:00
mio
a4d8c302a6 Format by removing extra empty lines 2025-02-15 20:11:55 +08:00
mio
c529d6d8f5 We accidentally introduce a break change for
removing ctl_tlb_mode.
2025-02-15 20:04:53 +08:00
@Antelox
fe41e72b96 GitHub Workflow: (#2106)
- Switched from windows-2019 to windows-2022
- Switched to ubuntu-24.04-arm image for Linux aarch64 jobs
- Fixed Linux x86 job. It was failing but not reported
- Switched from Visual Studio 16 2019 generators to Visual Studio 17 2022
- Uncommented Windows MINGW32 static and shared jobs
- Generic clean-up
2025-02-15 18:23:10 +08:00
Disconnect3d
d03c0922e6 Fix #2103: qemu/target/ppc/mem_helper.c remove redundant return statements (#2104) 2025-02-15 01:04:30 +08:00
mio
7fd2aa47d4 Fix nuget workflow yaml 2025-02-13 23:42:21 +08:00
mio
3e99b859a8 Update nuget workflow to allow manual release 2025-02-13 23:39:45 +08:00
mio
a912fed662 CI(release): Update changelog 2025-02-13 22:23:08 +08:00
mio
e2915c978a CI(release): Fix 2025-02-13 22:21:25 +08:00
mio
0943d24c5f CI(release): ChangeLog 2025-02-13 22:20:58 +08:00
mio
68ec2d152f CI(release): Trigger CI 2025-02-13 21:20:38 +08:00
mio
cd1492d819 CI(release): Update docs 2025-02-13 21:17:29 +08:00
mio
1ea6b07653 Update nuget workflow events 2025-02-13 21:05:23 +08:00
mio
4caee59e8e Skip arm64 macos wheels 2025-02-13 20:42:58 +08:00
mio
2d410535f0 manually trigger release draft workflows 2025-02-13 19:43:47 +08:00
Amaan Qureshi
6b9c1c851c fix(arm): correct write to ARM coprocessor (#2099)
This code was commented out since 2021, but by default, the error
codewas initialized to `UC_REG_OK`, so there was no error returned
untila result, any write to `UC_ARM_REG_C1_C0_2` returned an error.
2025-02-13 19:25:26 +08:00
mio
967dbc4179 Allow a v-prefixed version 2025-02-13 19:20:43 +08:00
@Antelox
dea3c376d0 CI(full),CI(release): Python bindings: (#2100)
- Switched to the ubuntu-24.04-arm runner
- Bumped Windows runner to windows-2022 and Visual Studio 17 2022 GENERATORS
- Minor changes about checks in workflow jobs
- Fixed the pagefile job (even though should not be really needed)
- Refreshed the TO BE CHECKED regress tests to either update or remove the skip conditions
- Added a test to check if the created sdist archive is ok
2025-02-13 18:24:04 +08:00
mio
bf87b9a86d CI(full),CI(release): Increase pagefile to avoid OOM 2025-02-12 13:05:24 +08:00
mio
791557e404 CI(full),CI(release): Should use if instead of ifdef 2025-02-11 17:44:24 +08:00
mio
5981f10c5d CI(full),CI(release): Fix symbol clash (again) 2025-02-11 16:33:40 +08:00
mio
d437090bbc CI(full),CI(release): Fix symbol clash 2025-02-11 16:28:45 +08:00
mio
b4eb933ec8 CI(full),CI(release): Do not refer to ATOMIC128 symbols if not available 2025-02-11 16:24:49 +08:00
mio
381850356f CI(full),CI(release): More PPC64 atomic fixes 2025-02-11 10:18:01 +08:00
mio
0a02746572 CI(full),CI(release): Trigger full and bump zig 2025-02-10 22:23:53 +08:00
mio
1f82a09afc CI(full),CI(release): Trigger full 2025-02-10 22:21:40 +08:00
mio
b8e19b6eef CI(release): Bump 2.1.2 2025-02-10 22:11:12 +08:00
mio
ad33384cd2 Unsigned extension 2025-02-10 21:49:38 +08:00
mio
ca3912d9f7 Fix undefined behavior converting TCGv_i32 to TCGv_i64 2025-02-10 21:45:34 +08:00
mio
c915d13cce Fix pc issue of tcg opcode hooks 2025-02-10 21:35:17 +08:00
mio
77a841e53d Fix signature 2025-02-10 21:29:03 +08:00
mio
2619b12cf0 set pc_start on disasm 2025-02-10 21:28:23 +08:00
mio
904efc16c0 Should use tcg_ctx->pc_start as pc 2025-02-10 21:20:39 +08:00
mio
0c7017a584 more 22.04 pinning 2025-02-10 20:27:40 +08:00