Luca Gladiator
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aded30f5a8
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Fix insn_in_hook_proxy return type
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2023-01-21 13:50:11 +01:00 |
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Luca Gladiator
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014cee5bd1
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Fix Rust binding memory leak
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2023-01-18 10:52:35 +01:00 |
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Dominik Maier
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549f34f098
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Fix warning for ./setup.py (#1756)
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2023-01-06 01:10:09 +08:00 |
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Nguyen Anh Quynh
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1f2da9c717
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Merge branch 'dev' of github.com:unicorn-engine/unicorn into dev
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2022-12-07 01:36:58 +08:00 |
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Nguyen Anh Quynh
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9dc001d686
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remove unused code in PPC & dis-asm.h
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2022-12-07 01:36:44 +08:00 |
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5625102285
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Merge pull request #1736 from ks0777/dev
add riscv constants to python binding module
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2022-11-22 14:31:36 +01:00 |
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e9c1c17f6d
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Fix endianess detection
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2022-11-16 15:16:49 +01:00 |
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5f5ef1546c
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Update CMakeLists versions
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2022-11-16 15:01:49 +01:00 |
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6954396ae5
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Merge branch 'master' into dev
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2022-11-16 15:01:09 +01:00 |
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Kevin Schneider
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8edffe048e
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add riscv constants to python binding module
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2022-11-14 19:59:38 +01:00 |
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Nguyen Anh Quynh
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a16f4ff911
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python: update list of supported archs in setup.py
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2022-11-02 00:28:40 +08:00 |
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Nguyen Anh Quynh
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241a391cec
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Merge branch 'dev'
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2022-11-01 23:36:54 +08:00 |
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db9ddabf9e
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Update bindings
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2022-11-01 10:06:34 +01:00 |
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bdd9f4fa9a
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Bump version to 2.0.1
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2022-11-01 10:06:22 +01:00 |
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d9c241d5f4
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Update FAQ
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2022-11-01 10:04:59 +01:00 |
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Nguyen Anh Quynh
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3c53a64e30
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Merge branch 'dev'
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2022-11-01 13:56:59 +08:00 |
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e6da816803
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Update changelog
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2022-10-31 16:09:06 +01:00 |
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Nguyen Anh Quynh
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8ac20e2012
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python: add some more comments for samples
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2022-10-31 12:37:18 +08:00 |
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Nguyen Anh Quynh
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951f155f0a
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Update SECURITY.md
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2022-10-31 12:35:37 +08:00 |
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Nguyen Anh Quynh
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896416b350
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Update SECURITY.md
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2022-10-29 01:32:05 +08:00 |
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fc193ffe24
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Fix missing macros
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2022-10-28 17:55:39 +02:00 |
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a40bf26263
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Disable test_x86_unaligned_access on be hosts
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2022-10-28 17:53:20 +02:00 |
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428ed8fd21
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Fix test_x86_unaligned_access for big endian hosts
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2022-10-28 17:47:55 +02:00 |
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563104fa91
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IP register is 2 bytes
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2022-10-28 17:44:17 +02:00 |
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9c5358c759
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Respect QEMU ZMM_Q to work on big endian hosts
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2022-10-28 17:37:02 +02:00 |
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3c18ddcc41
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Fix PC write for PPC32/64
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2022-10-28 16:23:50 +02:00 |
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4b961a8ef6
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Apply fix for big endian hosts per #1710
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2022-10-28 16:20:20 +02:00 |
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98980c904c
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Pass the correct size integers
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2022-10-28 15:59:14 +02:00 |
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47275c18f4
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Fix a test bug
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2022-10-28 15:02:59 +02:00 |
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d80cd54b0f
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Revert test_ctl endian changes
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2022-10-27 23:39:43 +02:00 |
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bb7b5bb64a
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Use macro bswap
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2022-10-27 23:32:15 +02:00 |
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e01556557e
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Fix endianess in test_ctl
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2022-10-27 22:52:25 +02:00 |
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fb8fb1ca7a
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Add headers for endianess
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2022-10-27 22:51:56 +02:00 |
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da3999b6f0
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Add tests for thumb2
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2022-10-21 11:37:07 +02:00 |
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6162708bb2
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Hack more to support BE32
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2022-10-21 11:30:22 +02:00 |
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c30a712058
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Merge pull request #1723 from TSRBerry/update-dotnet
bindings: Refactor and update .NET bindings
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2022-10-20 22:01:22 +02:00 |
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3ea7857be3
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Exit early when invalid read happens
In this way, the target register won't be overwritten
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2022-10-20 21:57:28 +02:00 |
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e5756b79f8
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Update FAQ
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2022-10-20 21:47:09 +02:00 |
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TSR Berry
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040146e059
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dotnet: Target .NET 6.0
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2022-10-20 21:31:46 +02:00 |
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13b8e2625f
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Check PC range for mem hooks
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2022-10-20 21:25:21 +02:00 |
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a5d4d30a31
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Sync PC for mem ldst on aarch64
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2022-10-20 21:19:18 +02:00 |
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TSR Berry
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0522f728b6
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dotnet: Remove faulty property groups
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2022-10-20 20:35:54 +02:00 |
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35010035d7
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Fix macro typo
Thanks @roehling
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2022-10-20 20:10:27 +02:00 |
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df3aa0fccb
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Merge pull request #1722 from TSRBerry/dev
aarch64: Add FPCR and FPSR registers
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2022-10-15 00:17:38 +02:00 |
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TSR Berry
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7b8b75b9f8
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bindings: Adjust consts
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2022-10-14 17:33:07 +02:00 |
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TSR Berry
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442dd437e1
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aarch64: Move FPCR and FPSR registers to not break compatibility
Co-authored-by: merry <git@mary.rs>
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2022-10-14 17:31:20 +02:00 |
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TSR Berry
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b1af49f72b
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dotnet: Adapt README.md to recent changes
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2022-10-14 17:16:57 +02:00 |
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TSR Berry
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ff1f0a5c1a
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dotnet: Refactor .NET bindings for .NET5.0
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2022-10-14 16:57:46 +02:00 |
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TSR Berry
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c787fa8e64
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bindings: Update Arm64 consts
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2022-10-14 15:18:16 +02:00 |
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TSR Berry
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12fd4fc086
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aarch64: Add FPCR and FPSR registers
Co-authored-by: merry <git@mary.rs>
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2022-10-14 15:18:14 +02:00 |
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