Amaan Qureshi 3a7bde03b8 feat(arm): add an ESR register (#2155) ...

This allows users to read/write from the ARM syndrome value like in
AArch64.

2025-04-12 21:46:37 +08:00

..

arm64.h

aarch64: Move FPCR and FPSR registers to not break compatibility

2022-10-14 17:31:20 +02:00

arm.h

feat(arm): add an ESR register (#2155)

2025-04-12 21:46:37 +08:00

m68k.h

implement m68k cr registers

2025-03-10 11:31:22 +08:00

mips.h

Format code

2025-02-17 20:17:10 +08:00

platform.h

Merge branch 'dev' into patch

2021-11-02 18:36:22 +08:00

ppc.h

Check CPU model for uc_ctl

2022-04-16 17:49:47 +02:00

riscv.h

riscv: Expose privilege level as pseudo-register PRIV (#1989)

2024-11-11 21:09:45 +08:00

s390x.h

Check CPU model for uc_ctl

2022-04-16 17:49:47 +02:00

sparc.h

Check CPU model for uc_ctl

2022-04-16 17:49:47 +02:00

tricore.h

TriCore Support (#1568)

2022-04-29 23:11:34 +02:00

unicorn.h

refactor(lib): mark pointers as const where possible (#2140)

2025-04-02 22:38:40 +08:00

x86.h

Check CPU model for uc_ctl

2022-04-16 17:49:47 +02:00