Robert Xiao b041345a73 Fix RISCV test_riscv32_fp_move test ...

RISCV FP registers are 64-bit in size, even in 32-bit mode, because they can
hold doubles. The test even uses the double-precision instruction fmv.d. Thus,
the reads should be reading 64-bit registers.

2023-06-16 15:23:43 -07:00

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