Commit Graph

866 Commits

Author SHA1 Message Date
ea9c7425b0 Fix the wrong PC when arm translation fectches unmapped memory
This behavior keeps the same with Unicorn1, though, different from arm doc
2022-01-16 16:42:38 +01:00
a5ceca6d51 Remove the static variable in flatviews_init
Or we may get an invalid old (and free-ed) uc instance reference
2022-01-15 22:11:14 +01:00
459a595a98 Merge branch 'dev' into s390x
Mostly for bindings update.
2022-01-15 20:56:39 +01:00
6ed2214399 Rebuilt hflags when swithing modes
Or we may get the wrong mode during translation
2022-01-14 19:37:48 +01:00
33afdcf872 Save CC at the end of emulation 2022-01-10 21:48:03 +01:00
9ac796531a Don't cache S390SkeyState and S390SkeysClass 2022-01-10 19:18:52 +01:00
980eae7f44 Sync PC at the end of emulation 2022-01-10 15:45:56 +01:00
441afe17e6 Add psw.mask register 2022-01-10 15:34:04 +01:00
71f044ca50 Merge branch 'dev' into s390x 2022-01-10 15:17:42 +01:00
36afa1022c More PPC registers
Add FPR0-31, CR0-7, LR, CTR, MSR, XER, FPSCR for PPC

Add a test for ppc32 float point
2022-01-10 15:16:10 +01:00
be7fbf1306 Handle CPU fault when invalidating TB cache 2022-01-08 22:10:17 +01:00
8ad9f8ecb1 This reverts Hack 05ba21160619724033ec83469bbb66bda9e3f5fb and applies the correct fix
And enable experimental v8 support for arm max cpu
2022-01-05 21:58:40 +01:00
c3a49766d8 Fix #1522 2022-01-05 20:02:41 +01:00
7a886f59df Fix #1525 2022-01-05 19:38:22 +01:00
6fabf30537 Fix a invalid memory access
Note: This probably addresses the ramdom failed CI on mingw64
2022-01-05 19:12:36 +01:00
d854e22301 Add x87 FPU registers #1524 2022-01-04 21:12:12 +01:00
47097b55b7 Fix #1520 2022-01-04 21:01:20 +01:00
scribam
039cd50187 unicorn_arm: add reg_read/write operations for FPSCR and FPSID 2022-01-04 11:36:06 +01:00
Nguyen Anh Quynh
e55b76f057 s390x: cleanup & re-enable some skey code 2021-12-31 10:05:05 +08:00
Nguyen Anh Quynh
1a0f0d0768 s390x: remove some unused fields in S390CPU 2021-12-31 09:48:16 +08:00
a06563ecdd Fix memory leak 2021-12-31 00:24:18 +01:00
3b667338cf Fix s390x warnings 2021-12-31 00:10:50 +01:00
Nguyen Anh Quynh
fa3fb82c9c s390x: fix warning on commented code 2021-12-30 17:17:49 +08:00
mio
085ee07c73 No more hard-coded cpu models 2021-12-30 01:05:10 +01:00
mio
fdbd743c21 Remove hard-coded cpu model 2021-12-30 00:54:55 +01:00
mio
a72cbda6de Initialize empty structs explictly to build on MSVC 2021-12-30 00:51:07 +01:00
mio
03f9dd8b61 Expand case ranges to build on MSVC 2021-12-30 00:42:13 +01:00
mio
dc402d78ec Ignore QEMU_BUILD_BUG_MSG on MSVC 2021-12-30 00:28:24 +01:00
mio
ab4ef2e1de Fix MSVC build and remove warning about unused functions 2021-12-30 00:26:25 +01:00
mio
298795a9f8 Fix build on MSVC 2021-12-29 23:18:49 +01:00
mio
034a1aa5f2 Make s390x stopping mechanism work 2021-12-27 23:48:20 +01:00
mio
a38151bf77 Make s390x skey work 2021-12-27 23:19:17 +01:00
mio
e977f81813 Make s390x build 2021-12-26 23:09:25 +01:00
mio
faa689c0f0 Merge systemz to the latest uc2 codebase 2021-12-26 22:58:32 +01:00
cddc9cf2ed Fix arm post init 2021-12-25 00:16:51 +01:00
4f73d75ea8 Fix #1500 2021-12-23 21:46:27 +01:00
ef6f8a2427 Fix x86 CPUID 2021-12-22 23:39:41 +01:00
7bb756249a Better design of cpuid instruction hook 2021-12-22 20:36:56 +01:00
Dimitris Glynos
63a445cbba fxsave / fxsave64 should store the floating point instruction pointer (fpip) (#1467)
* fxsave / fxsave64 should store the floating point instruction pointer (fpip)
- fxsave / fxsave64 happen to be used as GetPC code in exploits

* unit tests for the storage of FPIP in fxsave (x86) and fxsave64 (x64)
2021-12-13 08:40:32 +08:00
Nguyen Anh Quynh
09b0c66f11 move all static vars in translate.c to tcg.h 2021-12-07 04:53:32 +08:00
Fedor Nis'kov
4059906e78 Bug fix for LUI instruction (MIPS) 2021-12-06 19:15:00 +03:00
Nguyen Anh Quynh
b042a6a01d add missing files 2021-12-06 04:28:13 +08:00
Nguyen Anh Quynh
97b92d8861 initial systemz support 2021-12-06 04:19:37 +08:00
8a0ca8715e Fix SR read/write and a test 2021-12-04 23:22:28 +01:00
Brandon Miller
d204dc6374 Added SR to M68K reg_read and reg_write (#1507) 2021-12-02 14:12:49 +08:00
221cde18df Write CPSR as it is initiated from instructions to allow regs switch 2021-11-24 17:10:51 +01:00
78e0ddbc4d Fix mmio unmap 2021-11-24 00:18:19 +01:00
c733bbada3 Fix wrong offset used in split_region 2021-11-23 23:22:53 +01:00
c1c5f72918 Fix the sizemask for inline hooking 2021-11-23 21:18:21 +01:00
7a1de17f37 Fix UC_HOOK_EDGE_GENERATED to work with indirect jump
For an indirect jump (lookup_tb_ptr), last_tb would be NULL
2021-11-23 00:25:55 +01:00