ffeddd7579
use qemu_memalign for all cpu structs
...
Some structs, specically CPUARMState is 16-bytes aligned.
This causes segment fault because gcc tends to vectorize
the assignment of the struct with infamous movaps tricks.
Without this patch, we fail on manylinux with 2.17 glibc
in release mode in i686.
qemu_memalign will ensure the alignment across platforms.
2024-10-17 13:50:07 +08:00
05e29b4507
Implement UC_ARM64_REG_WSP
2024-10-02 16:03:59 +08:00
9f935f505e
Revert previous break changes that return UC_ERR_ARG for non-existing registers
...
But print a warning instead
2024-10-02 16:03:58 +08:00
Nguyen Anh Quynh
c136b6b2bf
fix some compiler warnings
2024-04-22 20:03:07 +08:00
a6fb2a6870
Save jit state before/after callback
2024-02-13 11:13:01 +08:00
StalkR
db63f2d9d7
qemu: fix UBSAN errors in tcg and arm translation
2023-11-14 10:23:50 +01:00
75676eb0cd
Also rebuild flags for aarch32
2023-06-28 10:39:25 +08:00
Robert Xiao
30d202b89e
Simplify reg_read/reg_write, obtaining a perf boost.
...
Single reg_read/reg_write is now about 25% faster.
2023-06-16 15:23:42 -07:00
Robert Xiao
074566cf69
Slight refactoring to reduce code duplication.
...
This also comes with a performance bump due to inlining of reg_read/reg_write
(as they're only called once now) and the unlikely() on CHECK_REG_TYPE.
2023-06-16 15:23:42 -07:00
Robert Xiao
4055a5ab10
Implement uc_reg_{read,write}{,_batch}2 APIs.
...
These APIs take size parameters, which can be used to properly bounds-check the
inputs and outputs for various registers. Additionally, all backends now throw
UC_ERR_ARG if the input register numbers are invalid.
Completes #1831 .
2023-06-16 15:23:42 -07:00
a24e53d794
Rebuild flags after writing to cp registers
...
This is buggy as this momemt per https://github.com/unicorn-engine/unicorn/issues/1789#issuecomment-1546807410
We need either doc this or save more information for a context
2023-05-14 13:35:31 +02:00
Takacs, Philipp
e96ac42b2e
Remove MMU hacks
...
Unicorn has included some ugly hacks to provide a envirement where vaddr == paddr.
These hacks where to use the full 64 bit mappings on x86 without init the mmu
and some memory redirect for MIPS.
The UC_TLB_CPU mode defaults to vaddr == paddr, therfor these hacks aren't
required anymore.
2023-03-28 14:02:17 +02:00
Takacs, Philipp
e25419bb2d
add virtuall tlb
...
this virtuall tlb allows to use mmu indipendent of the architectur
2023-03-28 13:50:11 +02:00
Takacs, Philipp
b7b1a4d6b4
difference between stop_request and quit_request
...
quit_request is for internal use. This means the IP register was updated and
qemu needs to rebuild the translation blocks.
stop_request is set by the user (uc_emu_stop) to indecate that unicorn sould
stop emulating.
2023-03-07 14:38:49 +01:00
6162708bb2
Hack more to support BE32
2022-10-21 11:30:22 +02:00
13b8e2625f
Check PC range for mem hooks
2022-10-20 21:25:21 +02:00
a5d4d30a31
Sync PC for mem ldst on aarch64
2022-10-20 21:19:18 +02:00
TSR Berry
442dd437e1
aarch64: Move FPCR and FPSR registers to not break compatibility
...
Co-authored-by: merry <git@mary.rs >
2022-10-14 17:31:20 +02:00
TSR Berry
12fd4fc086
aarch64: Add FPCR and FPSR registers
...
Co-authored-by: merry <git@mary.rs >
2022-10-14 15:18:14 +02:00
19d8876e23
Deep copy for arm cpu state
2022-10-01 00:14:08 +02:00
ba50035830
Format code
2022-05-23 12:30:44 +02:00
Ondřej Ondryáš
f3b776dd7d
Support reads and writes over all Arm SIMD registers
2022-05-20 00:30:11 +02:00
b827ebf4c3
Format code
2022-05-07 00:30:18 +02:00
345b63ee96
Only exit TB if pc is within the memory range
2022-05-07 00:16:31 +02:00
b136f08f2d
Check CPU model for uc_ctl
2022-04-16 17:49:47 +02:00
e3d0a33ab8
Fix BE32 usermode address XOR
2022-04-05 11:55:58 +02:00
9f62c71094
Sync PC for SYS instruction hook
2022-02-27 15:30:27 +01:00
e5207a1363
Implement UC_HOOK_INSN for aarch64 MRS/MSR/SYS/SYSL
2022-02-27 15:28:31 +01:00
e382ca102a
Fix the regression bug
2022-02-13 09:52:00 +01:00
05b9a021dc
Merge pull request #1453 from scribam/reg-read-write-fpscr
...
unicorn_arm: add reg_read/write operations for FPSCR and FPSID
2022-02-13 09:02:32 +01:00
52e0963cc7
Backward compatibility to enable full 64bits address space
2022-02-12 22:54:21 +01:00
81eb7da837
Backward compatibility for c13_c0_3
2022-02-12 22:31:10 +01:00
3c4477d622
Fix another undefined shift found by sanitizer
2022-02-12 19:57:19 +01:00
93c602ead1
FIx anohter undefined shift
2022-02-12 19:47:51 +01:00
e38b1c8af3
Fix the undefined shift
2022-02-12 19:37:32 +01:00
c2bb5c8838
Fix ns and s in cp reg encoding
2022-02-12 14:29:42 +01:00
58fc952230
Remove armeb-softmmu and aarch64eb-softmmu
2022-02-12 14:15:54 +01:00
f511d4a807
Also return error for context read/write
2022-02-11 22:19:03 +01:00
3e6665db00
Implement coprocessor register read/write for arm64
2022-02-11 22:13:01 +01:00
8bc1489210
Implement coprocessor register read/write for arm
2022-02-11 21:45:37 +01:00
ea9c7425b0
Fix the wrong PC when arm translation fectches unmapped memory
...
This behavior keeps the same with Unicorn1, though, different from arm doc
2022-01-16 16:42:38 +01:00
6ed2214399
Rebuilt hflags when swithing modes
...
Or we may get the wrong mode during translation
2022-01-14 19:37:48 +01:00
8ad9f8ecb1
This reverts Hack 05ba21160619724033ec83469bbb66bda9e3f5fb and applies the correct fix
...
And enable experimental v8 support for arm max cpu
2022-01-05 21:58:40 +01:00
c3a49766d8
Fix #1522
2022-01-05 20:02:41 +01:00
7a886f59df
Fix #1525
2022-01-05 19:38:22 +01:00
47097b55b7
Fix #1520
2022-01-04 21:01:20 +01:00
scribam
039cd50187
unicorn_arm: add reg_read/write operations for FPSCR and FPSID
2022-01-04 11:36:06 +01:00
085ee07c73
No more hard-coded cpu models
2021-12-30 01:05:10 +01:00
cddc9cf2ed
Fix arm post init
2021-12-25 00:16:51 +01:00
4f73d75ea8
Fix #1500
2021-12-23 21:46:27 +01:00
