Takacs, Philipp
7f1eb4532d
add basic mmu tests
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Some simple tests for diffrent mmu.
Basicly add some tlb entries, enable the mmu try to read from virtual address
The aarm64 test was provided by imre-kis-arm in #1718
2023-03-28 13:50:11 +02:00
4b961a8ef6
Apply fix for big endian hosts per #1710
2022-10-28 16:20:20 +02:00
3ea7857be3
Exit early when invalid read happens
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In this way, the target register won't be overwritten
2022-10-20 21:57:28 +02:00
a5d4d30a31
Sync PC for mem ldst on aarch64
2022-10-20 21:19:18 +02:00
a0e119c6f0
Format code
2022-08-31 23:27:24 +08:00
c4a0813f4a
Add a test for infinite loop when sync-ing pc for UC_HOOL_BLOCK #1661
2022-08-31 23:27:05 +08:00
ba50035830
Format code
2022-05-23 12:30:44 +02:00
dae48aecee
Mem hook should return a bool
2022-05-20 13:31:54 +02:00
Quentin DUCASSE
38dfd69309
Equivalent tests for arm64
2022-05-04 18:03:06 +02:00
b136f08f2d
Check CPU model for uc_ctl
2022-04-16 17:49:47 +02:00
shuffle2
2912cd1e29
fix rust bindings build on windows ( #1584 )
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Refine rust bindings.
2022-04-16 13:40:04 +02:00
e5207a1363
Implement UC_HOOK_INSN for aarch64 MRS/MSR/SYS/SYSL
2022-02-27 15:28:31 +01:00
3e6665db00
Implement coprocessor register read/write for arm64
2022-02-11 22:13:01 +01:00
8e70f3e524
Format code
2022-01-05 21:56:58 +01:00
b8817518ae
Add a test for arm64 pac extension
2022-01-05 20:02:21 +01:00
7bb0abb977
Format
2021-12-22 20:37:15 +01:00
Quentin DUCASSE
033e79abac
Added cache flush after code patching in unit tests for arm64 and riscv
2021-12-17 14:55:08 +01:00
Quentin DUCASSE
549274f44c
Code patching tests for riscv and arm64
2021-12-10 15:27:54 +01:00
e62b0ef255
Add clang-format and format code to qemu code style
2021-10-29 12:44:49 +02:00
Quentin DUCASSE
47f986fc93
Unit test POC for RISCV issue
2021-10-19 17:12:52 +02:00
Nguyen Anh Quynh
aaaea14214
import Unicorn2
2021-10-03 22:14:44 +08:00
