Commit Graph

11 Commits

Author SHA1 Message Date
mio
c42cc0fe86 More 16-bits aligned cpu state targets 2024-10-17 16:33:59 +08:00
mio
ffeddd7579 use qemu_memalign for all cpu structs
Some structs, specically CPUARMState is 16-bytes aligned.

This causes segment fault because gcc tends to vectorize

the assignment of the struct with infamous movaps tricks.

Without this patch, we fail on manylinux with 2.17 glibc

in release mode in i686.

qemu_memalign will ensure the alignment across platforms.
2024-10-17 13:50:07 +08:00
dotcirill
b0ea433772 Fix PPC32 fault when timer-spr access
Access to TB, DEC registers was lead to crash
spr_read_decr and others are changed to spr_read_generic
spr_write_decr and others are changed to spr_write_generic
2023-12-06 01:58:50 +03:00
Takacs, Philipp
e96ac42b2e Remove MMU hacks
Unicorn has included some ugly hacks to provide a envirement where vaddr == paddr.
These hacks where to use the full 64 bit mappings on x86 without init the mmu
and some memory redirect for MIPS.

The UC_TLB_CPU mode defaults to vaddr == paddr, therfor these hacks aren't
required anymore.
2023-03-28 14:02:17 +02:00
Takacs, Philipp
e25419bb2d add virtuall tlb
this virtuall tlb allows to use mmu indipendent of the architectur
2023-03-28 13:50:11 +02:00
Nguyen Anh Quynh
9dc001d686 remove unused code in PPC & dis-asm.h 2022-12-07 01:36:44 +08:00
b136f08f2d Check CPU model for uc_ctl 2022-04-16 17:49:47 +02:00
36afa1022c More PPC registers
Add FPR0-31, CR0-7, LR, CTR, MSR, XER, FPSCR for PPC

Add a test for ppc32 float point
2022-01-10 15:16:10 +01:00
mio
085ee07c73 No more hard-coded cpu models 2021-12-30 01:05:10 +01:00
0555095388 Support changing cpu model for ppc 2021-11-04 19:53:02 +01:00
Nguyen Anh Quynh
aaaea14214 import Unicorn2 2021-10-03 22:14:44 +08:00