ba50035830
Format code
2022-05-23 12:30:44 +02:00
17fa839a56
Eliminate more warnings in s390x
2022-05-21 00:07:20 +02:00
82d1c9e925
Eliminate warnings
2022-05-21 00:02:29 +02:00
9167ab8671
Set riscv_get_pc for uc->get_pc
2022-05-21 00:02:22 +02:00
Ondřej Ondryáš
f3b776dd7d
Support reads and writes over all Arm SIMD registers
2022-05-20 00:30:11 +02:00
b827ebf4c3
Format code
2022-05-07 00:30:18 +02:00
345b63ee96
Only exit TB if pc is within the memory range
2022-05-07 00:16:31 +02:00
Eric Poole
cfee2139a0
TriCore Support ( #1568 )
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* TriCore Support
python sample
* Update sample_tricore.py
Correct attribution
* Update sample_tricore.py
Fixed byte code to execute properly.
* Update sample_tricore.py
Removed testing artifact
* Added tricore msvc config-file.h
* Added STATIC to tricore config and added helper methods to symbol file generation.
* Update op_helper.c
Use built in crc32
* Fix tricore samples and small code blocks are now handled properly
* Add CPU types
* Generate bindings
* Format code
Co-authored-by: lazymio <mio@lazym.io >
2022-04-29 23:11:34 +02:00
b136f08f2d
Check CPU model for uc_ctl
2022-04-16 17:49:47 +02:00
shuffle2
2912cd1e29
fix rust bindings build on windows ( #1584 )
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Refine rust bindings.
2022-04-16 13:40:04 +02:00
e3d0a33ab8
Fix BE32 usermode address XOR
2022-04-05 11:55:58 +02:00
2f113b11d1
Fix symbol clash on bunlded static libs
2022-04-04 11:24:59 +02:00
Ilya Leoshkevich
7de130a5d7
s390x/tcg: Fix BRASL and BRCL with large negative offsets
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This is a backport of the following upstream commits:
- commit fc3dd86a290a ("s390x/tcg: Fix BRASL with a large negative offset")
- commit 16ed5f14215b ("s390x/tcg: Fix BRCL with a large negative offset")
Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com >
2022-03-17 14:23:57 +01:00
9f62c71094
Sync PC for SYS instruction hook
2022-02-27 15:30:27 +01:00
e5207a1363
Implement UC_HOOK_INSN for aarch64 MRS/MSR/SYS/SYSL
2022-02-27 15:28:31 +01:00
d946114dfe
Set EFLAGS correctly on startup
2022-02-25 22:44:42 +01:00
84e796494f
Format code
2022-02-25 22:24:25 +01:00
8d9ca1ce84
Format
2022-02-17 10:37:34 +01:00
27ef63cc8d
Add UC_PPC_REG_CR
2022-02-15 22:07:53 +01:00
e382ca102a
Fix the regression bug
2022-02-13 09:52:00 +01:00
05b9a021dc
Merge pull request #1453 from scribam/reg-read-write-fpscr
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unicorn_arm: add reg_read/write operations for FPSCR and FPSID
2022-02-13 09:02:32 +01:00
52e0963cc7
Backward compatibility to enable full 64bits address space
2022-02-12 22:54:21 +01:00
81eb7da837
Backward compatibility for c13_c0_3
2022-02-12 22:31:10 +01:00
3c4477d622
Fix another undefined shift found by sanitizer
2022-02-12 19:57:19 +01:00
93c602ead1
FIx anohter undefined shift
2022-02-12 19:47:51 +01:00
e38b1c8af3
Fix the undefined shift
2022-02-12 19:37:32 +01:00
e548cd9eb1
Fix the undefined shift
2022-02-12 18:22:56 +01:00
c2bb5c8838
Fix ns and s in cp reg encoding
2022-02-12 14:29:42 +01:00
58fc952230
Remove armeb-softmmu and aarch64eb-softmmu
2022-02-12 14:15:54 +01:00
f511d4a807
Also return error for context read/write
2022-02-11 22:19:03 +01:00
3e6665db00
Implement coprocessor register read/write for arm64
2022-02-11 22:13:01 +01:00
8bc1489210
Implement coprocessor register read/write for arm
2022-02-11 21:45:37 +01:00
Ilya Leoshkevich
ad984b9366
s390x TCG shift instruction fixes
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Cherry-pick the following upstream commits:
521130f267 target/s390x: Fix SLDA sign bit index
57556b28af target/s390x: Fix SRDA CC calculation
df103c09bc target/s390x: Fix cc_calc_sla_64() missing overflows
6da170beda target/s390x: Fix shifting 32-bit values for more than 31 bits
2022-01-27 13:15:54 +01:00
7095605607
Merge branch 'dev' into systemz
2022-01-18 21:10:55 +01:00
ea9c7425b0
Fix the wrong PC when arm translation fectches unmapped memory
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This behavior keeps the same with Unicorn1, though, different from arm doc
2022-01-16 16:42:38 +01:00
459a595a98
Merge branch 'dev' into s390x
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Mostly for bindings update.
2022-01-15 20:56:39 +01:00
6ed2214399
Rebuilt hflags when swithing modes
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Or we may get the wrong mode during translation
2022-01-14 19:37:48 +01:00
33afdcf872
Save CC at the end of emulation
2022-01-10 21:48:03 +01:00
9ac796531a
Don't cache S390SkeyState and S390SkeysClass
2022-01-10 19:18:52 +01:00
980eae7f44
Sync PC at the end of emulation
2022-01-10 15:45:56 +01:00
441afe17e6
Add psw.mask register
2022-01-10 15:34:04 +01:00
71f044ca50
Merge branch 'dev' into s390x
2022-01-10 15:17:42 +01:00
36afa1022c
More PPC registers
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Add FPR0-31, CR0-7, LR, CTR, MSR, XER, FPSCR for PPC
Add a test for ppc32 float point
2022-01-10 15:16:10 +01:00
8ad9f8ecb1
This reverts Hack 05ba21160619724033ec83469bbb66bda9e3f5fb and applies the correct fix
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And enable experimental v8 support for arm max cpu
2022-01-05 21:58:40 +01:00
c3a49766d8
Fix #1522
2022-01-05 20:02:41 +01:00
7a886f59df
Fix #1525
2022-01-05 19:38:22 +01:00
d854e22301
Add x87 FPU registers #1524
2022-01-04 21:12:12 +01:00
47097b55b7
Fix #1520
2022-01-04 21:01:20 +01:00
scribam
039cd50187
unicorn_arm: add reg_read/write operations for FPSCR and FPSID
2022-01-04 11:36:06 +01:00
Nguyen Anh Quynh
e55b76f057
s390x: cleanup & re-enable some skey code
2021-12-31 10:05:05 +08:00
