Commit Graph

28 Commits

Author SHA1 Message Date
mio
1dae6bb774 Correctly implement CR4 2025-02-18 10:43:52 +08:00
mio
fcca82bb28 Format code 2025-01-04 15:48:54 +08:00
Pedro Tôrres
7737e7b436 make i386 instructions RDTSC and RDTSCP hookable (#2066)
* instruction hooks for RDTSC and RDTSCP

Signed-off-by: Pedro Tôrres <t0rr3sp3dr0@gmail.com>

* update hookable instruction list

Signed-off-by: Pedro Tôrres <t0rr3sp3dr0@gmail.com>

* test RDTSC and RDTSCP instruction hooks

Signed-off-by: Pedro Tôrres <t0rr3sp3dr0@gmail.com>

---------

Signed-off-by: Pedro Tôrres <t0rr3sp3dr0@gmail.com>
Co-authored-by: mio <mio@lazym.io>
2024-12-20 17:17:23 +08:00
0886e53572 Format code 2024-10-06 23:32:16 +08:00
mio
9f935f505e Revert previous break changes that return UC_ERR_ARG for non-existing registers
But print a warning instead
2024-10-02 16:03:58 +08:00
elicn
9af1df6543 Add read and write support for i386 ZMM0-31 2024-09-28 22:17:06 +03:00
elicn
5164dbd609 Add read and write support for i386 YMM8-31 2024-09-28 22:16:45 +03:00
elicn
e3675162ba Add read and write support for i386 XMM16-31 2024-09-28 22:15:00 +03:00
elicn
6cb9bfe5c0 Avoid updating CR3 when writing CR1 and CR2 2024-09-28 22:11:54 +03:00
elicn
433bb163d9 Add read and write cases for i386 CR8 2024-09-28 22:11:01 +03:00
Robert Xiao
30d202b89e Simplify reg_read/reg_write, obtaining a perf boost.
Single reg_read/reg_write is now about 25% faster.
2023-06-16 15:23:42 -07:00
Robert Xiao
074566cf69 Slight refactoring to reduce code duplication.
This also comes with a performance bump due to inlining of reg_read/reg_write
(as they're only called once now) and the unlikely() on CHECK_REG_TYPE.
2023-06-16 15:23:42 -07:00
Robert Xiao
4055a5ab10 Implement uc_reg_{read,write}{,_batch}2 APIs.
These APIs take size parameters, which can be used to properly bounds-check the
inputs and outputs for various registers. Additionally, all backends now throw
UC_ERR_ARG if the input register numbers are invalid.

Completes #1831.
2023-06-16 15:23:42 -07:00
Robert Xiao
d7a806c026 Reformat code with format.sh 2023-06-16 15:23:41 -07:00
Takacs, Philipp
901034577a i386 call internal helper on special porpese register write
Some registers writes have side effects. i.e. write to cr3 flush the tlb,
if the PG bit is set.
2023-03-28 13:50:11 +02:00
Takacs, Philipp
b7b1a4d6b4 difference between stop_request and quit_request
quit_request is for internal use. This means the IP register was updated and
qemu needs to rebuild the translation blocks.

stop_request is set by the user (uc_emu_stop) to indecate that unicorn sould
stop emulating.
2023-03-07 14:38:49 +01:00
Takacs, Philipp
14404ef04b [x86] don't hardcode cpuid results
The cpuid results are set by the selected cpu.

CLOSES #1787
2023-02-27 12:34:38 +01:00
mio
9c5358c759 Respect QEMU ZMM_Q to work on big endian hosts 2022-10-28 17:37:02 +02:00
b827ebf4c3 Format code 2022-05-07 00:30:18 +02:00
345b63ee96 Only exit TB if pc is within the memory range 2022-05-07 00:16:31 +02:00
d946114dfe Set EFLAGS correctly on startup 2022-02-25 22:44:42 +01:00
d854e22301 Add x87 FPU registers #1524 2022-01-04 21:12:12 +01:00
435ac71f47 Support changing cpu model for x86 2021-11-04 19:10:29 +01:00
9818840f4e Add tests for UC_HOOK_TCG_OPCODE 2021-11-03 20:56:45 +01:00
bcf85be86d Add a new hook type UC_HOOK_TCG_OPCODE 2021-11-03 01:46:24 +01:00
e62b0ef255 Add clang-format and format code to qemu code style 2021-10-29 12:44:49 +02:00
mio
9d8a309fbf Allow user to instrument cpuid instruction 2021-10-05 17:15:49 +02:00
Nguyen Anh Quynh
aaaea14214 import Unicorn2 2021-10-03 22:14:44 +08:00