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@@ -764,8 +764,8 @@ static void test_arm_context_save(void)
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OK(uc_context_alloc(uc, &ctx));
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OK(uc_context_save(uc, ctx));
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OK(uc_context_reg_read(ctx, UC_ARM_REG_PC, (void*)&pc));
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OK(uc_context_reg_write(ctx, UC_ARM_REG_PC, (void*)&pc));
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OK(uc_context_reg_read(ctx, UC_ARM_REG_PC, (void *)&pc));
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OK(uc_context_reg_write(ctx, UC_ARM_REG_PC, (void *)&pc));
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OK(uc_context_restore(uc, ctx));
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uc_common_setup(&uc2, UC_ARCH_ARM, UC_MODE_THUMB, code, sizeof(code) - 1,
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@@ -841,7 +841,8 @@ static void test_arm_mem_hook_read_write(void)
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// str r1, [sp, #4]
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// ldr r2, [sp, #4]
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// str r2, [sp]
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const char code[] = "\x00\x10\x9d\xe5\x04\x10\x8d\xe5\x04\x20\x9d\xe5\x00\x20\x8d\xe5";
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const char code[] =
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"\x00\x10\x9d\xe5\x04\x10\x8d\xe5\x04\x20\x9d\xe5\x00\x20\x8d\xe5";
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uint32_t r_sp;
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r_sp = 0x9000;
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uc_hook hk;
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@@ -300,7 +300,7 @@ static void test_arm64_block_sync_pc_cb(uc_engine *uc, uint64_t addr,
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uint32_t size, void *data)
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{
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uint64_t pc;
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OK(uc_reg_read(uc, UC_ARM64_REG_PC, (void*)&pc));
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OK(uc_reg_read(uc, UC_ARM64_REG_PC, (void *)&pc));
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TEST_CHECK(pc == addr);
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uint64_t val = code_start;
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bool first = *(bool *)data;
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@@ -17,8 +17,8 @@ static void test_mips_el_ori(void)
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char code[] = "\x56\x34\x21\x34"; // ori $at, $at, 0x3456;
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int r_r1 = 0x6789;
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uc_common_setup(&uc, UC_ARCH_MIPS, UC_MODE_MIPS32 | UC_MODE_LITTLE_ENDIAN, code,
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sizeof(code) - 1);
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uc_common_setup(&uc, UC_ARCH_MIPS, UC_MODE_MIPS32 | UC_MODE_LITTLE_ENDIAN,
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code, sizeof(code) - 1);
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OK(uc_reg_write(uc, UC_MIPS_REG_1, &r_r1));
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OK(uc_emu_start(uc, code_start, code_start + sizeof(code) - 1, 0, 0));
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@@ -36,8 +36,8 @@ static void test_mips_eb_ori(void)
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char code[] = "\x34\x21\x34\x56"; // ori $at, $at, 0x3456;
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int r_r1 = 0x6789;
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uc_common_setup(&uc, UC_ARCH_MIPS, UC_MODE_MIPS32 | UC_MODE_BIG_ENDIAN, code,
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sizeof(code) - 1);
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uc_common_setup(&uc, UC_ARCH_MIPS, UC_MODE_MIPS32 | UC_MODE_BIG_ENDIAN,
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code, sizeof(code) - 1);
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OK(uc_reg_write(uc, UC_MIPS_REG_1, &r_r1));
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OK(uc_emu_start(uc, code_start, code_start + sizeof(code) - 1, 0, 0));
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@@ -56,8 +56,8 @@ static void test_mips_stop_at_branch(void)
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"\x02\x00\x00\x08\x00\x00\x00\x00\x00\x00\x00\x00"; // j 0x8; nop;
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int r_pc = 0x0;
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uc_common_setup(&uc, UC_ARCH_MIPS, UC_MODE_MIPS32 | UC_MODE_LITTLE_ENDIAN, code,
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sizeof(code) - 1);
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uc_common_setup(&uc, UC_ARCH_MIPS, UC_MODE_MIPS32 | UC_MODE_LITTLE_ENDIAN,
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code, sizeof(code) - 1);
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// Execute one instruction with branch delay slot.
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OK(uc_emu_start(uc, code_start, code_start + sizeof(code) - 1, 0, 1));
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@@ -78,8 +78,8 @@ static void test_mips_stop_at_delay_slot(void)
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"\x02\x00\x00\x08\x00\x00\x00\x00\x00\x00\x00\x00"; // j 0x8; nop;
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int r_pc = 0x0;
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uc_common_setup(&uc, UC_ARCH_MIPS, UC_MODE_MIPS32 | UC_MODE_LITTLE_ENDIAN, code,
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sizeof(code) - 1);
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uc_common_setup(&uc, UC_ARCH_MIPS, UC_MODE_MIPS32 | UC_MODE_LITTLE_ENDIAN,
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code, sizeof(code) - 1);
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// Stop at the delay slot by design.
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OK(uc_emu_start(uc, code_start, code_start + 4, 0, 0));
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@@ -99,8 +99,8 @@ static void test_mips_lwx_exception_issue_1314(void)
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char code[] = "\x0a\xc8\x79\x7e"; // lwx $t9, $t9($s3)
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int reg;
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uc_common_setup(&uc, UC_ARCH_MIPS, UC_MODE_MIPS32 | UC_MODE_LITTLE_ENDIAN, code,
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sizeof(code) - 1);
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uc_common_setup(&uc, UC_ARCH_MIPS, UC_MODE_MIPS32 | UC_MODE_LITTLE_ENDIAN,
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code, sizeof(code) - 1);
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OK(uc_mem_map(uc, 0x10000, 0x4000, UC_PROT_ALL));
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// Enable DSP
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@@ -133,11 +133,12 @@ static void test_mips_mips16(void)
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int r_v0 = 0x6789;
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int mips16_lowbit = 1;
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uc_common_setup(&uc, UC_ARCH_MIPS, UC_MODE_MIPS32 | UC_MODE_LITTLE_ENDIAN, code,
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sizeof(code) - 1);
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uc_common_setup(&uc, UC_ARCH_MIPS, UC_MODE_MIPS32 | UC_MODE_LITTLE_ENDIAN,
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code, sizeof(code) - 1);
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OK(uc_reg_write(uc, UC_MIPS_REG_V0, &r_v0));
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OK(uc_emu_start(uc, code_start | mips16_lowbit, code_start + sizeof(code) - 1, 0, 0));
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OK(uc_emu_start(uc, code_start | mips16_lowbit,
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code_start + sizeof(code) - 1, 0, 0));
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OK(uc_reg_read(uc, UC_MIPS_REG_V0, &r_v0));
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@@ -11,18 +11,19 @@
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/* Swap bytes in 32 bit value. */
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#define bswap_32(x) \
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((((x)&0xff000000u) >> 24) | (((x)&0x00ff0000u) >> 8) | \
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(((x)&0x0000ff00u) << 8) | (((x)&0x000000ffu) << 24))
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((((x) & 0xff000000u) >> 24) | (((x) & 0x00ff0000u) >> 8) | \
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(((x) & 0x0000ff00u) << 8) | (((x) & 0x000000ffu) << 24))
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/* Swap bytes in 64 bit value. */
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#define bswap_64(x) \
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((((x)&0xff00000000000000ull) >> 56) | \
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(((x)&0x00ff000000000000ull) >> 40) | \
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(((x)&0x0000ff0000000000ull) >> 24) | \
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(((x)&0x000000ff00000000ull) >> 8) | (((x)&0x00000000ff000000ull) << 8) | \
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(((x)&0x0000000000ff0000ull) << 24) | \
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(((x)&0x000000000000ff00ull) << 40) | \
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(((x)&0x00000000000000ffull) << 56))
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((((x) & 0xff00000000000000ull) >> 56) | \
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(((x) & 0x00ff000000000000ull) >> 40) | \
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(((x) & 0x0000ff0000000000ull) >> 24) | \
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(((x) & 0x000000ff00000000ull) >> 8) | \
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(((x) & 0x00000000ff000000ull) << 8) | \
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(((x) & 0x0000000000ff0000ull) << 24) | \
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(((x) & 0x000000000000ff00ull) << 40) | \
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(((x) & 0x00000000000000ffull) << 56))
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/**
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* Assert that err matches expect
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