diff --git a/include/unicorn/mips.h b/include/unicorn/mips.h index 64283ed5..7a4c9c1c 100644 --- a/include/unicorn/mips.h +++ b/include/unicorn/mips.h @@ -220,7 +220,8 @@ typedef enum UC_MIPS_REG { UC_MIPS_REG_CP0_USERLOCAL, UC_MIPS_REG_CP0_STATUS, - // FCR(s) Ref: https://s3-eu-west-1.amazonaws.com/downloads-mips/documents/MD00083-2B-MIPS64INT-AFP-06.01.pdf + // FCR(s) Ref: + // https://s3-eu-west-1.amazonaws.com/downloads-mips/documents/MD00083-2B-MIPS64INT-AFP-06.01.pdf UC_MIPS_REG_FIR, UC_MIPS_REG_FCSR, diff --git a/include/unicorn/unicorn.h b/include/unicorn/unicorn.h index 3393c1a1..b6887729 100644 --- a/include/unicorn/unicorn.h +++ b/include/unicorn/unicorn.h @@ -65,7 +65,7 @@ typedef size_t uc_hook; #define UNICORN_DEPRECATED __declspec(deprecated) #else #pragma message( \ - "WARNING: You need to implement UNICORN_DEPRECATED for this compiler") + "WARNING: You need to implement UNICORN_DEPRECATED for this compiler") #define UNICORN_DEPRECATED #endif diff --git a/qemu/target/mips/unicorn.c b/qemu/target/mips/unicorn.c index 71a6e73a..7785265e 100644 --- a/qemu/target/mips/unicorn.c +++ b/qemu/target/mips/unicorn.c @@ -19,7 +19,8 @@ MIPSCPU *cpu_mips_init(struct uc_struct *uc); static void mips_set_pc(struct uc_struct *uc, uint64_t address) { - ((CPUMIPSState *)uc->cpu->env_ptr)->active_tc.PC = address & ~(uint64_t )1ULL; + ((CPUMIPSState *)uc->cpu->env_ptr)->active_tc.PC = + address & ~(uint64_t)1ULL; if (address & 1) { ((CPUMIPSState *)uc->cpu->env_ptr)->hflags |= MIPS_HFLAG_M16; } else { @@ -30,7 +31,7 @@ static void mips_set_pc(struct uc_struct *uc, uint64_t address) static uint64_t mips_get_pc(struct uc_struct *uc) { return ((CPUMIPSState *)uc->cpu->env_ptr)->active_tc.PC | - !!(((CPUMIPSState *)uc->cpu->env_ptr)->hflags & (MIPS_HFLAG_M16)); + !!(((CPUMIPSState *)uc->cpu->env_ptr)->hflags & (MIPS_HFLAG_M16)); } static void mips_release(void *ctx) @@ -234,14 +235,15 @@ uc_err reg_write(void *_env, int mode, unsigned int regid, const void *value, case UC_MIPS_REG_F30: case UC_MIPS_REG_F31: CHECK_REG_TYPE(uint64_t); - env->active_fpu.fpr[regid - UC_MIPS_REG_F0].d = *(uint64_t*)value; + env->active_fpu.fpr[regid - UC_MIPS_REG_F0].d = *(uint64_t *)value; break; case UC_MIPS_REG_FCSR: { CHECK_REG_TYPE(uint32_t); uint32_t arg1 = *(uint32_t *)value; uint32_t original = env->active_fpu.fcr31; - env->active_fpu.fcr31 = (arg1 & env->active_fpu.fcr31_rw_bitmask) | - (env->active_fpu.fcr31 & ~(env->active_fpu.fcr31_rw_bitmask)); + env->active_fpu.fcr31 = + (arg1 & env->active_fpu.fcr31_rw_bitmask) | + (env->active_fpu.fcr31 & ~(env->active_fpu.fcr31_rw_bitmask)); if ((GET_FP_ENABLE(env->active_fpu.fcr31) | 0x20) & GET_FP_CAUSE(env->active_fpu.fcr31)) { env->active_fpu.fcr31 = original; diff --git a/tests/unit/test_arm.c b/tests/unit/test_arm.c index d7e88e02..028c9392 100644 --- a/tests/unit/test_arm.c +++ b/tests/unit/test_arm.c @@ -764,8 +764,8 @@ static void test_arm_context_save(void) OK(uc_context_alloc(uc, &ctx)); OK(uc_context_save(uc, ctx)); - OK(uc_context_reg_read(ctx, UC_ARM_REG_PC, (void*)&pc)); - OK(uc_context_reg_write(ctx, UC_ARM_REG_PC, (void*)&pc)); + OK(uc_context_reg_read(ctx, UC_ARM_REG_PC, (void *)&pc)); + OK(uc_context_reg_write(ctx, UC_ARM_REG_PC, (void *)&pc)); OK(uc_context_restore(uc, ctx)); uc_common_setup(&uc2, UC_ARCH_ARM, UC_MODE_THUMB, code, sizeof(code) - 1, @@ -841,7 +841,8 @@ static void test_arm_mem_hook_read_write(void) // str r1, [sp, #4] // ldr r2, [sp, #4] // str r2, [sp] - const char code[] = "\x00\x10\x9d\xe5\x04\x10\x8d\xe5\x04\x20\x9d\xe5\x00\x20\x8d\xe5"; + const char code[] = + "\x00\x10\x9d\xe5\x04\x10\x8d\xe5\x04\x20\x9d\xe5\x00\x20\x8d\xe5"; uint32_t r_sp; r_sp = 0x9000; uc_hook hk; diff --git a/tests/unit/test_arm64.c b/tests/unit/test_arm64.c index cd6ddda5..920aeb9b 100644 --- a/tests/unit/test_arm64.c +++ b/tests/unit/test_arm64.c @@ -300,7 +300,7 @@ static void test_arm64_block_sync_pc_cb(uc_engine *uc, uint64_t addr, uint32_t size, void *data) { uint64_t pc; - OK(uc_reg_read(uc, UC_ARM64_REG_PC, (void*)&pc)); + OK(uc_reg_read(uc, UC_ARM64_REG_PC, (void *)&pc)); TEST_CHECK(pc == addr); uint64_t val = code_start; bool first = *(bool *)data; diff --git a/tests/unit/test_mips.c b/tests/unit/test_mips.c index 6e9d4dd1..dd3d01cf 100644 --- a/tests/unit/test_mips.c +++ b/tests/unit/test_mips.c @@ -17,8 +17,8 @@ static void test_mips_el_ori(void) char code[] = "\x56\x34\x21\x34"; // ori $at, $at, 0x3456; int r_r1 = 0x6789; - uc_common_setup(&uc, UC_ARCH_MIPS, UC_MODE_MIPS32 | UC_MODE_LITTLE_ENDIAN, code, - sizeof(code) - 1); + uc_common_setup(&uc, UC_ARCH_MIPS, UC_MODE_MIPS32 | UC_MODE_LITTLE_ENDIAN, + code, sizeof(code) - 1); OK(uc_reg_write(uc, UC_MIPS_REG_1, &r_r1)); OK(uc_emu_start(uc, code_start, code_start + sizeof(code) - 1, 0, 0)); @@ -36,8 +36,8 @@ static void test_mips_eb_ori(void) char code[] = "\x34\x21\x34\x56"; // ori $at, $at, 0x3456; int r_r1 = 0x6789; - uc_common_setup(&uc, UC_ARCH_MIPS, UC_MODE_MIPS32 | UC_MODE_BIG_ENDIAN, code, - sizeof(code) - 1); + uc_common_setup(&uc, UC_ARCH_MIPS, UC_MODE_MIPS32 | UC_MODE_BIG_ENDIAN, + code, sizeof(code) - 1); OK(uc_reg_write(uc, UC_MIPS_REG_1, &r_r1)); OK(uc_emu_start(uc, code_start, code_start + sizeof(code) - 1, 0, 0)); @@ -56,8 +56,8 @@ static void test_mips_stop_at_branch(void) "\x02\x00\x00\x08\x00\x00\x00\x00\x00\x00\x00\x00"; // j 0x8; nop; int r_pc = 0x0; - uc_common_setup(&uc, UC_ARCH_MIPS, UC_MODE_MIPS32 | UC_MODE_LITTLE_ENDIAN, code, - sizeof(code) - 1); + uc_common_setup(&uc, UC_ARCH_MIPS, UC_MODE_MIPS32 | UC_MODE_LITTLE_ENDIAN, + code, sizeof(code) - 1); // Execute one instruction with branch delay slot. OK(uc_emu_start(uc, code_start, code_start + sizeof(code) - 1, 0, 1)); @@ -78,8 +78,8 @@ static void test_mips_stop_at_delay_slot(void) "\x02\x00\x00\x08\x00\x00\x00\x00\x00\x00\x00\x00"; // j 0x8; nop; int r_pc = 0x0; - uc_common_setup(&uc, UC_ARCH_MIPS, UC_MODE_MIPS32 | UC_MODE_LITTLE_ENDIAN, code, - sizeof(code) - 1); + uc_common_setup(&uc, UC_ARCH_MIPS, UC_MODE_MIPS32 | UC_MODE_LITTLE_ENDIAN, + code, sizeof(code) - 1); // Stop at the delay slot by design. OK(uc_emu_start(uc, code_start, code_start + 4, 0, 0)); @@ -99,8 +99,8 @@ static void test_mips_lwx_exception_issue_1314(void) char code[] = "\x0a\xc8\x79\x7e"; // lwx $t9, $t9($s3) int reg; - uc_common_setup(&uc, UC_ARCH_MIPS, UC_MODE_MIPS32 | UC_MODE_LITTLE_ENDIAN, code, - sizeof(code) - 1); + uc_common_setup(&uc, UC_ARCH_MIPS, UC_MODE_MIPS32 | UC_MODE_LITTLE_ENDIAN, + code, sizeof(code) - 1); OK(uc_mem_map(uc, 0x10000, 0x4000, UC_PROT_ALL)); // Enable DSP @@ -133,11 +133,12 @@ static void test_mips_mips16(void) int r_v0 = 0x6789; int mips16_lowbit = 1; - uc_common_setup(&uc, UC_ARCH_MIPS, UC_MODE_MIPS32 | UC_MODE_LITTLE_ENDIAN, code, - sizeof(code) - 1); + uc_common_setup(&uc, UC_ARCH_MIPS, UC_MODE_MIPS32 | UC_MODE_LITTLE_ENDIAN, + code, sizeof(code) - 1); OK(uc_reg_write(uc, UC_MIPS_REG_V0, &r_v0)); - OK(uc_emu_start(uc, code_start | mips16_lowbit, code_start + sizeof(code) - 1, 0, 0)); + OK(uc_emu_start(uc, code_start | mips16_lowbit, + code_start + sizeof(code) - 1, 0, 0)); OK(uc_reg_read(uc, UC_MIPS_REG_V0, &r_v0)); diff --git a/tests/unit/unicorn_test.h b/tests/unit/unicorn_test.h index 86fe24a6..cf9ff6f1 100644 --- a/tests/unit/unicorn_test.h +++ b/tests/unit/unicorn_test.h @@ -11,18 +11,19 @@ /* Swap bytes in 32 bit value. */ #define bswap_32(x) \ - ((((x)&0xff000000u) >> 24) | (((x)&0x00ff0000u) >> 8) | \ - (((x)&0x0000ff00u) << 8) | (((x)&0x000000ffu) << 24)) + ((((x) & 0xff000000u) >> 24) | (((x) & 0x00ff0000u) >> 8) | \ + (((x) & 0x0000ff00u) << 8) | (((x) & 0x000000ffu) << 24)) /* Swap bytes in 64 bit value. */ #define bswap_64(x) \ - ((((x)&0xff00000000000000ull) >> 56) | \ - (((x)&0x00ff000000000000ull) >> 40) | \ - (((x)&0x0000ff0000000000ull) >> 24) | \ - (((x)&0x000000ff00000000ull) >> 8) | (((x)&0x00000000ff000000ull) << 8) | \ - (((x)&0x0000000000ff0000ull) << 24) | \ - (((x)&0x000000000000ff00ull) << 40) | \ - (((x)&0x00000000000000ffull) << 56)) + ((((x) & 0xff00000000000000ull) >> 56) | \ + (((x) & 0x00ff000000000000ull) >> 40) | \ + (((x) & 0x0000ff0000000000ull) >> 24) | \ + (((x) & 0x000000ff00000000ull) >> 8) | \ + (((x) & 0x00000000ff000000ull) << 8) | \ + (((x) & 0x0000000000ff0000ull) << 24) | \ + (((x) & 0x000000000000ff00ull) << 40) | \ + (((x) & 0x00000000000000ffull) << 56)) /** * Assert that err matches expect