Support MIPS64 - write correct PC register width on uc_emu_start (#2111)
* Support mips64 - write correct pc register width on uc_emu_start * Convert to UC_MODE_MIPS64 * Correctly select MIPS64 CPU model * Simple 64-bit test - check it doesn't crash * lint * Comment * Comment * Add offset when indexing cpu model, makes tests work on older python * Move test * add PC check to test * Fix test - add python version check * Use RegressTest method for assert
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@@ -194,7 +194,12 @@ MIPSCPU *cpu_mips_init(struct uc_struct *uc)
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mips_cpu_initfn(uc, cs);
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env = &cpu->env;
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env->cpu_model = &(mips_defs[uc->cpu_model]);
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if(uc->mode & UC_MODE_MIPS64){
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// 64-bit CPU models are defined in the array directly after 32-bit models
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env->cpu_model = &(mips_defs[uc->cpu_model + UC_CPU_MIPS32_ENDING]);
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} else {
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env->cpu_model = &(mips_defs[uc->cpu_model]);
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}
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if (env->cpu_model == NULL) {
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free(cpu);
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39
tests/regress/mips64.py
Normal file
39
tests/regress/mips64.py
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@@ -0,0 +1,39 @@
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import sys
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import unittest
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import regress
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from unicorn import *
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from unicorn.mips_const import *
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class Mips64(regress.RegressTest):
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@unittest.skipIf(sys.version_info < (3, 7), reason="requires python3.7 or higher")
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def runTest(self):
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# Two instructions:
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# daddu $gp, $gp, $ra # a 64-bit instruction. This is important - it ensures the selected CPU model is 64-bit, otherwise it would crash
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# move $t1, $v0
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code = b"\x03\x9f\xe0\x2d" + b"\x00\x40\x48\x25"
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uc = Uc(UC_ARCH_MIPS, UC_MODE_MIPS64 + UC_MODE_BIG_ENDIAN)
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# For MIPS64 to be able to reference addresses >= 0x80000000, you need to enable the virtual TLB
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# See https://github.com/unicorn-engine/unicorn/pull/2111 for more details
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uc.ctl_set_tlb_mode(UC_TLB_VIRTUAL)
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ADDRESS = 0x0120003000
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uc.reg_write(UC_MIPS_REG_PC, ADDRESS)
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uc.reg_write(UC_MIPS_REG_GP, 0x123)
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uc.reg_write(UC_MIPS_REG_RA, 0x456)
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uc.mem_map(ADDRESS, 4 * 1024)
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uc.mem_write(ADDRESS, code)
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# This will raise an exception if MIPS64 fails
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uc.emu_start(ADDRESS, 0, count=2)
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self.assertEqual(uc.reg_read(UC_MIPS_REG_PC),0x0120003000 + 8)
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if __name__ == '__main__':
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regress.main()
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7
uc.c
7
uc.c
@@ -1020,8 +1020,11 @@ uc_err uc_emu_start(uc_engine *uc, uint64_t begin, uint64_t until,
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#endif
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#ifdef UNICORN_HAS_MIPS
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case UC_ARCH_MIPS:
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// TODO: MIPS32/MIPS64/BIGENDIAN etc
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uc_reg_write(uc, UC_MIPS_REG_PC, &begin_pc32);
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if (uc->mode & UC_MODE_MIPS64) {
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uc_reg_write(uc, UC_MIPS_REG_PC, &begin);
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} else {
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uc_reg_write(uc, UC_MIPS_REG_PC, &begin_pc32);
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}
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break;
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#endif
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#ifdef UNICORN_HAS_SPARC
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