9cfd5cfac3
- Added fullMode input in workflow_dispatch
- Take decision whether to build either in debug or release mode and if to build for all python versions according to the commit message patterns
- Set proper artifact names
- Removed not needed steps
- Compacted some steps in order to leverage more the matrix feature
- Bumped cibuildwheel action to 2.22.0
- Run actual regress tests in place of sample scripts
- Specify optional test install in pyproject.toml with proper requirements
- Derive package version from git tags
- Add GENERATORS env var support in setup.py to specify cmake generator and minor refactoring
- Minor cleanup/refactoring for the regress test suite
- Marked some regress tests with skipIf to skip them in case of old python versions
- Marked some failing regress tests to be checked with skipIf
68 lines
1.6 KiB
Python
68 lines
1.6 KiB
Python
import regress
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from unicorn import *
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from unicorn.x86_const import *
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from capstone import *
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CODE = (
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b'\x48\x31\xc0' # xor rax,rax
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b'\x48\x0f\xc7\xf0' # rdrand rax
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b'\xf4' # hlt
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)
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BASE = 0x100000
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PAGE_SIZE = 0x1000
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# max possible length of a x86 instruction
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MAX_INSN_LEN = 15
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def hook_invalid_insn(uc, ud):
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regress.logger.debug('entered invalid instruction handler')
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pc = uc.reg_read(UC_X86_REG_RIP)
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data = uc.mem_read(pc, MAX_INSN_LEN)
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md = Cs(CS_ARCH_X86, CS_MODE_64)
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insn = next(md.disasm(data, pc, 1))
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if insn.mnemonic == 'rdrand':
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# chosen by fair dice roll, guaranteed to be random
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rax = 4
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# set result to rax
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uc.reg_write(UC_X86_REG_RAX, rax)
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# resume emulation from next instruction
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uc.reg_write(UC_X86_REG_RIP, pc + insn.size)
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# signal uc we are ok
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return True
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# not handled, uc will crash
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return False
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class TestHooks(regress.RegressTest):
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def test_invalid_insn_recover(self):
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mu = Uc(UC_ARCH_X86, UC_MODE_64)
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mu.mem_map(BASE, PAGE_SIZE)
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mu.mem_write(BASE, CODE)
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mu.hook_add(UC_HOOK_INSN_INVALID, hook_invalid_insn)
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try:
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mu.emu_start(BASE, BASE + len(CODE))
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except UcError as ex:
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if ex.errno == UC_ERR_INSN_INVALID:
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self.fail('invalid instruction did not recover properly')
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# unexpected exception, re-raise
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raise
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self.assertNotEqual(0, mu.reg_read(UC_X86_REG_RAX))
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if __name__ == '__main__':
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regress.main()
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