9cfd5cfac3
- Added fullMode input in workflow_dispatch
- Take decision whether to build either in debug or release mode and if to build for all python versions according to the commit message patterns
- Set proper artifact names
- Removed not needed steps
- Compacted some steps in order to leverage more the matrix feature
- Bumped cibuildwheel action to 2.22.0
- Run actual regress tests in place of sample scripts
- Specify optional test install in pyproject.toml with proper requirements
- Derive package version from git tags
- Add GENERATORS env var support in setup.py to specify cmake generator and minor refactoring
- Minor cleanup/refactoring for the regress test suite
- Marked some regress tests with skipIf to skip them in case of old python versions
- Marked some failing regress tests to be checked with skipIf
69 lines
1.9 KiB
Python
69 lines
1.9 KiB
Python
import regress
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import sys
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import unittest
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from unicorn import Uc, UcError, UC_ARCH_X86, UC_MODE_64
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from unicorn.unicorn_const import UC_TLB_VIRTUAL, UC_TLB_CPU, UC_ERR_FETCH_UNMAPPED
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MAX_INTEL_INSN_SIZE = 15
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class TestMem(regress.RegressTest):
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# 0x0008fffffffff000 : mappings till this point work ok
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# 0x0010000000000000 : mappings beyond this point will fail if tlb is not set to virtual
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def setUp(self):
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self.uc = Uc(UC_ARCH_X86, UC_MODE_64)
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def map_code_page(self, address, payload):
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regress.logger.debug('attempting to map code at %#018x', address)
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self.uc.mem_map(address, 0x1000)
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self.uc.mem_write(address, payload)
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@unittest.skipIf(sys.version_info < (3, 7), reason="requires python3.7 or higher")
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def test_virt_high_mapping(self):
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"""
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Mapping memory at high addresses should work when TLB mode
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is set to VIRTUAL.
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"""
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base = 0x0010000000000000
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self.uc.ctl_set_tlb_mode(UC_TLB_VIRTUAL)
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for i in range(12):
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code = base << i
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self.map_code_page(code, b'\xf4')
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try:
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self.uc.emu_start(code, code + MAX_INTEL_INSN_SIZE, count=1)
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except UcError:
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self.fail('high mapping failed at %#018x' % code)
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@unittest.skipIf(sys.version_info < (3, 7), reason="requires python3.7 or higher")
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def test_cpu_high_mapping(self):
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"""
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Mapping memory at high addresses should work fail TLB mode
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is set to CPU (default).
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"""
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base = 0x0010000000000000
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self.uc.ctl_set_tlb_mode(UC_TLB_CPU)
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for i in range(12):
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code = base << i
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self.map_code_page(code, b'\xf4')
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with self.assertRaises(UcError) as ex:
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self.uc.emu_start(code, code + MAX_INTEL_INSN_SIZE, count=1)
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self.assertEqual(UC_ERR_FETCH_UNMAPPED, ex.exception.errno)
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if __name__ == '__main__':
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regress.main()
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