commit 520c6647c32f02d83083d969d416154aa95e922c
Merge: 6bb29b12 b999f507
Author: mio <mio@lazym.io>
Date: Sun Apr 13 00:14:23 2025 +0800
merge dev
commit 6bb29b12f1d9f452365cc9cb5bc2d65ef376af30
Author: mio <mio@lazym.io>
Date: Sun Apr 13 00:13:12 2025 +0800
enable test
commit bcb8b363ef12ac295cf4fe4f1645416e5f0ea6ae
Author: mio <mio@lazym.io>
Date: Sun Apr 13 00:13:06 2025 +0800
also logging
commit 5972fc156b7379d09582c745d6d597e07555f2f4
Author: mio <mio@lazym.io>
Date: Sun Apr 13 00:12:58 2025 +0800
no unlimited translation
commit 7d600feebf9055505918e50d0af8b529a3eba542
Author: mio <mio@lazym.io>
Date: Sun Apr 13 00:12:47 2025 +0800
Ignore bindings.rs
commit dde4d50f2c7713156ac3bc284287480e4d92005f
Author: Amaan Qureshi <amaanq12@gmail.com>
Date: Sun Apr 6 03:26:22 2025 -0400
alias `uc_mips_reg` to `UC_MIPS_REG`
commit 04234ae01ba7c82d9717eaae64cdda289ce3b832
Author: Amaan Qureshi <amaanq12@gmail.com>
Date: Sun Apr 6 01:13:00 2025 -0400
remove bindings.rs
commit edec1300cd7c2d8ef4babbd51f6bcba2e126bdd7
Author: Amaan Qureshi <amaanq12@gmail.com>
Date: Sat Apr 5 14:29:40 2025 -0400
address review
commit feb157b28b6c262c5dc3d810ec54de55a25bcd6e
Author: Amaan Qureshi <amaanq12@gmail.com>
Date: Sat Mar 29 22:40:53 2025 -0400
ci(rust): rework workflow
The notable changes are migrating to
`actions-rust-lang/setup-rust-toolchain` for setting up Rust as it's
maintained, and using `katyo/publish-crates` for publishing crates in a
workspace
commit c1c7a8f8ed841b6ec5b4abe57013a1c2c9748c60
Author: Amaan Qureshi <amaanq12@gmail.com>
Date: Sat Mar 29 22:40:06 2025 -0400
build(rust): set `rust-version` to 1.85
commit 8df938c9f8b478160213707674157103b0893caf
Author: Amaan Qureshi <amaanq12@gmail.com>
Date: Sat Mar 29 21:53:21 2025 -0400
fix(rust): correct unsound pointer cast
The size of `T` is not guaranteed to be the size of `i32` - all we know
is that `T` is `Into<i32>`, so we should first copy them over into an
`i32` array
commit 3059b2583a60aa0cac9278afc945ed87f7ddb65e
Author: Amaan Qureshi <amaanq12@gmail.com>
Date: Sat Mar 29 20:13:26 2025 -0400
docs(rust): update readme
commit 7db69a888e58a4bda20083e4e0771d26a327ad13
Author: Amaan Qureshi <amaanq12@gmail.com>
Date: Sat Mar 29 13:58:30 2025 -0400
feat(rust): add comprehensive tests
These tests are copied over from the C tests
commit 78f2207f0e0481aef4de6d5908f8dc699a39a8d5
Author: Amaan Qureshi <amaanq12@gmail.com>
Date: Sat Mar 29 13:57:27 2025 -0400
feat(rust): add tcg hook
commit 46e53328531ec3279dadbf18c16b493432227b31
Author: Amaan Qureshi <amaanq12@gmail.com>
Date: Sat Mar 29 13:56:55 2025 -0400
feat(rust): add a hook for arm64 sys instructions
commit d1b58ee8282bf1eeeefbf68c87c2cf7c50c90320
Author: Amaan Qureshi <amaanq12@gmail.com>
Date: Sat Mar 29 13:56:35 2025 -0400
feat(rust): add the ability to read the arm coprocessor register
commit d304da18b9e6741042b2a70657437be8f39f5c7c
Author: Amaan Qureshi <amaanq12@gmail.com>
Date: Sat Mar 29 13:55:29 2025 -0400
feat(rust): add missing `Context` methods
commit 0dd87833081ac9db1feaf5bae8c839a7a2ae4947
Author: Amaan Qureshi <amaanq12@gmail.com>
Date: Sat Mar 29 13:44:51 2025 -0400
refactor(rust): remove unnecessary code
`unicorn-engine-sys` will provide the necessary constants & types
commit da3d2fa7c3ecd3ae8fdb6672b6c5ea23da4570ff
Author: Amaan Qureshi <amaanq12@gmail.com>
Date: Sat Mar 29 13:43:57 2025 -0400
feat(rust): add a workspace `Cargo.toml`, and use `unicorn-engine-sys`
commit b27a2a93e4ac43aa2079e936df4dd30a1f8f329a
Author: Amaan Qureshi <amaanq12@gmail.com>
Date: Sat Mar 29 13:38:06 2025 -0400
feat(rust): introduce `unicorn-engine-sys` crate
This crate contains generated Rust bindings to the C library via
bindgen. It is independent from the main `unicorn-engine` bindings,
which will leverage this
commit bcec87a3f6e316e328683c303ccfa89e530a6c56
Author: Amaan Qureshi <amaanq12@gmail.com>
Date: Sat Mar 29 13:31:24 2025 -0400
test(m68k): actually assert an expectation
This test did not actually test for anything before
commit bc7e65ca96164496eb2e250b1f296a33a8aa58ee
Author: Amaan Qureshi <amaanq12@gmail.com>
Date: Sat Mar 29 13:31:09 2025 -0400
style(test): use bitflag shorthands
commit 0ab4b7fefb3ca17b0b5977d7b204291c5de184ad
Author: Amaan Qureshi <amaanq12@gmail.com>
Date: Sat Mar 29 13:22:13 2025 -0400
fix(mips): lowercase enum name `uc_mips_reg`
This aligns with other architectures
Co-authored-by: Amaan Qureshi <amaanq12@gmail.com>
282 lines
8.6 KiB
Rust
282 lines
8.6 KiB
Rust
use std::time::{Duration, Instant};
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use unicorn_engine_sys::{RegisterX86, X86Insn};
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use super::*;
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use crate::Unicorn;
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#[test]
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fn test_uc_ctl_mode() {
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let uc = Unicorn::new(Arch::X86, Mode::MODE_32).unwrap();
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let mode = uc.ctl_get_mode().unwrap();
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assert_eq!(mode, Mode::MODE_32);
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}
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#[test]
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fn test_uc_ctl_arch() {
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let uc = Unicorn::new(Arch::X86, Mode::MODE_32).unwrap();
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let arch = uc.ctl_get_arch().unwrap();
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assert_eq!(arch, Arch::X86);
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}
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#[test]
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fn test_uc_ctl_page_size() {
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let uc = Unicorn::new(Arch::X86, Mode::MODE_32).unwrap();
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let page_size = uc.ctl_get_page_size().unwrap();
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assert_eq!(page_size, 4096);
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}
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#[test]
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fn test_uc_ctl_timeout() {
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let uc = Unicorn::new(Arch::X86, Mode::MODE_32).unwrap();
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let timeout = uc.ctl_get_timeout().unwrap();
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assert_eq!(timeout, 0);
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}
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#[test]
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fn test_uc_ctl_exits() {
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// cmp eax, 0;
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// jg lb;
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// inc eax;
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// nop; <---- exit1
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// lb:
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// inc ebx;
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// nop; <---- exit2
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let code = b"\x83\xf8\x00\x7f\x02\x40\x90\x43\x90";
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let eax = 0;
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let ebx = 0;
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let exits = [CODE_START + 6, CODE_START + 8];
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let mut uc = Unicorn::new(Arch::X86, Mode::MODE_32).unwrap();
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uc.mem_map(CODE_START, CODE_LEN, Prot::ALL).unwrap();
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uc.mem_write(CODE_START, code).unwrap();
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uc.ctl_exits_enable().unwrap();
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uc.ctl_set_exits(&exits).unwrap();
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uc.reg_write(RegisterX86::EAX, eax).unwrap();
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uc.reg_write(RegisterX86::EBX, ebx).unwrap();
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// Run twice.
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uc.emu_start(CODE_START, 0, 0, 0).unwrap();
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uc.emu_start(CODE_START, 0, 0, 0).unwrap();
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let eax = uc.reg_read(RegisterX86::EAX).unwrap();
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let ebx = uc.reg_read(RegisterX86::EBX).unwrap();
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assert_eq!(eax, 1);
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assert_eq!(ebx, 1);
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}
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#[test]
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fn test_uc_ctl_tb_cache() {
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fn time_emulation(uc: &mut Unicorn<'_, ()>, start: u64, end: u64) -> Duration {
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let now = Instant::now();
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uc.emu_start(start, end, 0, 0).unwrap();
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now.elapsed()
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}
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const TB_COUNT: usize = 8;
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const TCG_MAX_INSNS: usize = 512;
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const CODE_LEN: usize = TB_COUNT * TCG_MAX_INSNS;
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let code = [0x90; CODE_LEN]; // nop
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let mut uc = Unicorn::new(Arch::X86, Mode::MODE_32).unwrap();
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uc.mem_map(CODE_START, CODE_LEN, Prot::ALL).unwrap();
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uc.mem_write(CODE_START, &code).unwrap();
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let standard = time_emulation(&mut uc, CODE_START, CODE_START + code.len() as u64);
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for i in 0..TB_COUNT {
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uc.ctl_request_cache(CODE_START + (i * TCG_MAX_INSNS) as u64, None)
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.unwrap();
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}
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let cached = time_emulation(&mut uc, CODE_START, CODE_START + code.len() as u64);
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for i in 0..TB_COUNT {
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let start = CODE_START + (i * TCG_MAX_INSNS) as u64;
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uc.ctl_remove_cache(start, start + 1).unwrap();
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}
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let evicted = time_emulation(&mut uc, CODE_START, CODE_START + code.len() as u64);
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assert!(cached < standard);
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assert!(evicted > cached);
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}
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#[cfg(feature = "arch_arm")]
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#[test]
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fn test_uc_ctl_change_page_size() {
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let mut uc = Unicorn::new(Arch::ARM, Mode::ARM).unwrap();
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let mut uc2 = Unicorn::new(Arch::ARM, Mode::ARM).unwrap();
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uc2.ctl_set_page_size(4096).unwrap();
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let page_size = uc2.ctl_get_page_size().unwrap();
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assert_eq!(page_size, 4096);
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// Mapping at 0x400 (1024) should succeed for the first Unicorn instance,
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// but fail for the second instance since the page size is different.
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// (Note: ARM's default page size is 1024)
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assert!(uc.mem_map(1 << 10, 1 << 10, Prot::ALL).is_ok());
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assert!(uc2.mem_map(1 << 10, 1 << 10, Prot::ALL).is_err());
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}
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#[cfg(feature = "arch_arm")]
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#[test]
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fn test_uc_ctl_arm_cpu() {
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use unicorn_engine_sys::ArmCpuModel;
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let mut uc = Unicorn::new(Arch::ARM, Mode::THUMB).unwrap();
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uc.ctl_set_cpu_model(ArmCpuModel::CORTEX_M7 as i32).unwrap();
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}
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#[cfg(feature = "arch_arm")]
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#[test]
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fn test_uc_ctl_change_page_size_arm64() {
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let mut uc = Unicorn::new(Arch::ARM64, Mode::ARM).unwrap();
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let mut uc2 = Unicorn::new(Arch::ARM64, Mode::ARM).unwrap();
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uc2.ctl_set_page_size(16384).unwrap();
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let page_size = uc2.ctl_get_page_size().unwrap();
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assert_eq!(page_size, 16384);
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// Mapping at 0x400 (1024) should succeed for the first Unicorn instance,
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// but fail for the second instance since the page size is different.
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// (Note: ARM64's default page size is 1024)
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assert!(uc.mem_map(1 << 10, 1 << 10, Prot::ALL).is_ok());
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assert!(uc2.mem_map(1 << 10, 1 << 10, Prot::ALL).is_err());
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}
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#[test]
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fn test_uc_hook_cached_uaf() {
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let code = b"\x41\x4a\xeb\x00\x90";
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let mut uc = Unicorn::new_with_data(Arch::X86, Mode::MODE_32, 0u64).unwrap();
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uc.mem_map(CODE_START, CODE_LEN, Prot::ALL).unwrap();
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uc.mem_write(CODE_START, code).unwrap();
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let hook = uc
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.add_code_hook(CODE_START, CODE_START + code.len() as u64, |uc, _, _| {
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*uc.get_data_mut() += 1;
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})
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.unwrap();
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uc.emu_start(CODE_START, CODE_START + code.len() as u64, 0, 0)
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.unwrap();
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// Move the hook to the deleted hooks list.
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uc.remove_hook(hook).unwrap();
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// This will clear deleted hooks and SHOULD clear cache.
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uc.emu_start(CODE_START, CODE_START + code.len() as u64, 0, 0)
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.unwrap();
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// Now hooks are deleted and thus this _should not_ call
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// test_uc_hook_cached_cb anymore. If the hook is allocated like from
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// malloc, and the code region is free-ed, this call _shall not_ call the
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// hook anymore to avoid UAF.
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uc.emu_start(CODE_START, CODE_START + code.len() as u64, 0, 0)
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.unwrap();
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// Only 4 calls
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assert_eq!(*uc.get_data(), 4);
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}
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#[test]
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fn test_uc_emu_stop_set_ip() {
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#[rustfmt::skip]
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let code = &[
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0x48, 0x31, 0xc0, // 0x0 xor rax, rax : rax = 0
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0x90, // 0x3 nop :
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0x48, 0xff, 0xc0, // 0x4 inc rax : rax++
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0x90, // 0x7 nop : <-- going to stop here
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0x48, 0xff, 0xc0, // 0x8 inc rax : rax++
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0x90, // 0xb nop :
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0x0f, 0x0b, // 0xc ud2 : <-- will raise UC_ERR_INSN_INVALID,
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// : but should not never be reached
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0x90, // 0xe nop :
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0x90, // 0xf nop :
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];
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let mut uc = Unicorn::new(Arch::X86, Mode::MODE_64).unwrap();
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uc.mem_map(CODE_START, CODE_LEN, Prot::ALL).unwrap();
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uc.mem_write(CODE_START, code).unwrap();
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uc.add_code_hook(
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CODE_START,
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CODE_START + code.len() as u64,
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|uc, address, _| {
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let rip = CODE_START + 0xb;
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if address == CODE_START + 0x7 {
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uc.emu_stop().unwrap();
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uc.reg_write(RegisterX86::RIP, rip).unwrap();
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}
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},
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)
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.unwrap();
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uc.emu_start(CODE_START, CODE_START + code.len() as u64, 0, 0)
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.unwrap();
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let rip = uc.reg_read(RegisterX86::RIP).unwrap();
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assert_eq!(rip, CODE_START + 0xb);
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}
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#[test]
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fn test_tlb_clear() {
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#[rustfmt::skip]
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let code = &[
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0xa3, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, // movabs dword ptr [0x200000], eax
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0x0f, 0x05, // syscall
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0xa3, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, // movabs dword ptr [0x200000], eax
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];
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let mut uc = Unicorn::new_with_data(Arch::X86, Mode::MODE_64, 0usize).unwrap();
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uc.mem_map(CODE_START, CODE_LEN, Prot::ALL).unwrap();
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uc.mem_write(CODE_START, code).unwrap();
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uc.mem_map(0x200000, 0x1000, Prot::ALL).unwrap();
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uc.ctl_set_tlb_type(TlbType::VIRTUAL).unwrap();
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uc.add_tlb_hook(1, 0, |uc, addr, _| {
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*uc.get_data_mut() += 1;
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Some(TlbEntry {
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paddr: addr,
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perms: Prot::ALL,
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})
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})
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.unwrap();
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uc.add_insn_sys_hook(X86Insn::SYSCALL, 1, 0, |uc| {
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uc.ctl_flush_tlb().unwrap();
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})
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.unwrap();
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uc.emu_start(CODE_START, CODE_START + code.len() as u64, 0, 0)
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.unwrap();
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let tlbcount = *uc.get_data();
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assert_eq!(tlbcount, 4);
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}
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#[test]
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fn test_noexec() {
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#[rustfmt::skip]
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let code = &[
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0x8a, 0x05, 0x00, 0x00, 0x00, 0x00, // mov al, byte ptr[rip]
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0x90, // nop
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];
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let mut uc = Unicorn::new(Arch::X86, Mode::MODE_64).unwrap();
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uc.mem_map(CODE_START, CODE_LEN, Prot::ALL).unwrap();
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uc.mem_write(CODE_START, code).unwrap();
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uc.ctl_set_tlb_type(TlbType::VIRTUAL).unwrap();
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uc.mem_protect(CODE_START, CODE_START as usize + 0x1000, Prot::EXEC)
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.unwrap();
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let err = uc
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.emu_start(CODE_START, CODE_START + code.len() as u64, 0, 0)
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.unwrap_err();
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assert_eq!(err, uc_error::READ_PROT);
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}
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