156 lines
4.0 KiB
C
156 lines
4.0 KiB
C
/*
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* Apple Silicon APRR functions for JIT handling
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*
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* Copyright (c) 2020 osy
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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/*
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* Credits to: https://siguza.github.io/APRR/
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* Reversed from /usr/lib/system/libsystem_pthread.dylib
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*/
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#ifndef TCG_APPLE_JIT_H
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#define TCG_APPLE_JIT_H
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#include "assert.h"
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#include "stdint.h"
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#include "stdbool.h"
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#include "qemu/compiler.h"
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// Returns the S3_6_c15_c1_5 register's value
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// Taken from
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// https://stackoverflow.com/questions/70019553/lldb-how-to-read-the-permissions-of-a-memory-region-for-a-thread
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// https://blog.svenpeter.dev/posts/m1_sprr_gxf/
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// On Github Action (Virtualized environment), this shall always returns 0
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#if defined(HAVE_SPRR_MRS)
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static inline uint64_t read_sprr_perm(void)
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{
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uint64_t v;
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__asm__ __volatile__("isb sy\n"
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"mrs %0, S3_6_c15_c1_5\n"
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: "=r"(v)::"memory");
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return v;
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}
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#else
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static inline uint64_t read_sprr_perm(void)
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{
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return 0;
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}
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#endif
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#if defined(__APPLE__) && defined(HAVE_PTHREAD_JIT_PROTECT) && (defined(__arm__) || defined(__aarch64__))
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QEMU_UNUSED_FUNC static inline uint8_t thread_mask()
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{
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uint64_t v = read_sprr_perm();
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if (v == 0) {
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return 0;
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} else {
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return (v >> 20) & 3;
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}
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}
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QEMU_UNUSED_FUNC static inline bool thread_writeable()
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{
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return thread_mask() == 3;
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}
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QEMU_UNUSED_FUNC static inline bool thread_executable()
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{
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return thread_mask() == 1;
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}
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static inline void assert_executable(bool executable) {
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uint64_t v = read_sprr_perm();
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if (!v) {
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assert(executable == thread_executable());
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}
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}
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#else
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QEMU_UNUSED_FUNC static inline uint8_t thread_mask()
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{
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return 0;
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}
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QEMU_UNUSED_FUNC static inline bool thread_writeable()
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{
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return false;
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}
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QEMU_UNUSED_FUNC static inline bool thread_executable()
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{
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return false;
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}
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static inline void assert_executable(bool executable) {
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}
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#endif
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#if defined(__APPLE__) && defined(HAVE_PTHREAD_JIT_PROTECT) && (defined(__arm__) || defined(__aarch64__))
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/* write protect enable = write disable */
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static inline void jit_write_protect(int enabled)
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{
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return pthread_jit_write_protect_np(enabled);
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}
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#define JIT_CALLBACK_GUARD(x) \
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{ \
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bool executable = uc->current_executable; \
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assert_executable(executable); \
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x; \
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jit_write_protect(executable); \
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} \
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#define JIT_CALLBACK_GUARD_VAR(var, x) \
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{ \
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bool executable = uc->current_executable; \
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assert_executable(executable); \
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var = x; \
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jit_write_protect(executable); \
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} \
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#else /* defined(__aarch64__) && defined(CONFIG_DARWIN) */
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static inline void jit_write_protect(int enabled)
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{
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return;
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}
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#define JIT_CALLBACK_GUARD(x) \
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{ \
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(void)uc; \
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x; \
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} \
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#define JIT_CALLBACK_GUARD_VAR(var, x) \
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{ \
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(void)uc; \
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var = x; \
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} \
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#endif
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#endif /* define TCG_APPLE_JIT_H */ |