Amaan Qureshi 3a7bde03b8 feat(arm): add an ESR register (#2155) ...

This allows users to read/write from the ARM syndrome value like in
AArch64.

2025-04-12 21:46:37 +08:00

..

arm64.rs

add cpu model to architectures for rust bindings

2023-07-13 13:58:14 -04:00

arm.rs

feat(arm): add an ESR register (#2155)

2025-04-12 21:46:37 +08:00

ffi.rs

Rust Bindings: reg_read_batch and reg_write_batch (#2060)

2024-12-07 14:49:23 +08:00

lib.rs

improve aarch64 feature gate in rust bindings (#2069)

2024-12-29 22:21:43 +08:00

m68k.rs

add cpu model to architectures for rust bindings

2023-07-13 13:58:14 -04:00

mips.rs

add cpu model to architectures for rust bindings

2023-07-13 13:58:14 -04:00

ppc.rs

add cpu model to architectures for rust bindings

2023-07-13 13:58:14 -04:00

riscv.rs

riscv: Expose privilege level as pseudo-register PRIV (#1989)

2024-11-11 21:09:45 +08:00

s390x.rs

add cpu model to architectures for rust bindings

2023-07-13 13:58:14 -04:00

sparc.rs

add cpu model to architectures for rust bindings

2023-07-13 13:58:14 -04:00

tricore.rs

add cpu model to architectures for rust bindings

2023-07-13 13:58:14 -04:00

unicorn_const.rs

Fix val

2025-03-21 00:36:42 +08:00

x86.rs

add cpu model to architectures for rust bindings

2023-07-13 13:58:14 -04:00