From df75effba35b64a7442be42c2d4fd39707ee20a2 Mon Sep 17 00:00:00 2001 From: mio Date: Mon, 10 Mar 2025 11:32:14 +0800 Subject: [PATCH] Generate m68k consts --- bindings/dotnet/UnicornEngine/Const/M68k.fs | 17 ++++++++++++++++- bindings/go/unicorn/m68k_const.go | 17 ++++++++++++++++- .../java/src/main/java/unicorn/M68kConst.java | 17 ++++++++++++++++- bindings/pascal/unicorn/M68kConst.pas | 17 ++++++++++++++++- bindings/python/unicorn/m68k_const.py | 17 ++++++++++++++++- .../lib/unicorn_engine/m68k_const.rb | 17 ++++++++++++++++- bindings/zig/unicorn/m68k_const.zig | 17 ++++++++++++++++- 7 files changed, 112 insertions(+), 7 deletions(-) diff --git a/bindings/dotnet/UnicornEngine/Const/M68k.fs b/bindings/dotnet/UnicornEngine/Const/M68k.fs index 768bc12b..77b52c6d 100644 --- a/bindings/dotnet/UnicornEngine/Const/M68k.fs +++ b/bindings/dotnet/UnicornEngine/Const/M68k.fs @@ -41,5 +41,20 @@ module M68k = let UC_M68K_REG_D7 = 16 let UC_M68K_REG_SR = 17 let UC_M68K_REG_PC = 18 - let UC_M68K_REG_ENDING = 19 + let UC_M68K_REG_CR_SFC = 19 + let UC_M68K_REG_CR_DFC = 20 + let UC_M68K_REG_CR_VBR = 21 + let UC_M68K_REG_CR_CACR = 22 + let UC_M68K_REG_CR_TC = 23 + let UC_M68K_REG_CR_MMUSR = 24 + let UC_M68K_REG_CR_SRP = 25 + let UC_M68K_REG_CR_USP = 26 + let UC_M68K_REG_CR_MSP = 27 + let UC_M68K_REG_CR_ISP = 28 + let UC_M68K_REG_CR_URP = 29 + let UC_M68K_REG_CR_ITT0 = 30 + let UC_M68K_REG_CR_ITT1 = 31 + let UC_M68K_REG_CR_DTT0 = 32 + let UC_M68K_REG_CR_DTT1 = 33 + let UC_M68K_REG_ENDING = 34 diff --git a/bindings/go/unicorn/m68k_const.go b/bindings/go/unicorn/m68k_const.go index 1e00d767..6ed11fac 100644 --- a/bindings/go/unicorn/m68k_const.go +++ b/bindings/go/unicorn/m68k_const.go @@ -36,5 +36,20 @@ const ( M68K_REG_D7 = 16 M68K_REG_SR = 17 M68K_REG_PC = 18 - M68K_REG_ENDING = 19 + M68K_REG_CR_SFC = 19 + M68K_REG_CR_DFC = 20 + M68K_REG_CR_VBR = 21 + M68K_REG_CR_CACR = 22 + M68K_REG_CR_TC = 23 + M68K_REG_CR_MMUSR = 24 + M68K_REG_CR_SRP = 25 + M68K_REG_CR_USP = 26 + M68K_REG_CR_MSP = 27 + M68K_REG_CR_ISP = 28 + M68K_REG_CR_URP = 29 + M68K_REG_CR_ITT0 = 30 + M68K_REG_CR_ITT1 = 31 + M68K_REG_CR_DTT0 = 32 + M68K_REG_CR_DTT1 = 33 + M68K_REG_ENDING = 34 ) \ No newline at end of file diff --git a/bindings/java/src/main/java/unicorn/M68kConst.java b/bindings/java/src/main/java/unicorn/M68kConst.java index ea2500a3..db62630b 100644 --- a/bindings/java/src/main/java/unicorn/M68kConst.java +++ b/bindings/java/src/main/java/unicorn/M68kConst.java @@ -38,6 +38,21 @@ public interface M68kConst { public static final int UC_M68K_REG_D7 = 16; public static final int UC_M68K_REG_SR = 17; public static final int UC_M68K_REG_PC = 18; - public static final int UC_M68K_REG_ENDING = 19; + public static final int UC_M68K_REG_CR_SFC = 19; + public static final int UC_M68K_REG_CR_DFC = 20; + public static final int UC_M68K_REG_CR_VBR = 21; + public static final int UC_M68K_REG_CR_CACR = 22; + public static final int UC_M68K_REG_CR_TC = 23; + public static final int UC_M68K_REG_CR_MMUSR = 24; + public static final int UC_M68K_REG_CR_SRP = 25; + public static final int UC_M68K_REG_CR_USP = 26; + public static final int UC_M68K_REG_CR_MSP = 27; + public static final int UC_M68K_REG_CR_ISP = 28; + public static final int UC_M68K_REG_CR_URP = 29; + public static final int UC_M68K_REG_CR_ITT0 = 30; + public static final int UC_M68K_REG_CR_ITT1 = 31; + public static final int UC_M68K_REG_CR_DTT0 = 32; + public static final int UC_M68K_REG_CR_DTT1 = 33; + public static final int UC_M68K_REG_ENDING = 34; } diff --git a/bindings/pascal/unicorn/M68kConst.pas b/bindings/pascal/unicorn/M68kConst.pas index 8bfd9e5d..89b837f3 100644 --- a/bindings/pascal/unicorn/M68kConst.pas +++ b/bindings/pascal/unicorn/M68kConst.pas @@ -39,7 +39,22 @@ const UC_M68K_REG_D7 = 16; UC_M68K_REG_SR = 17; UC_M68K_REG_PC = 18; - UC_M68K_REG_ENDING = 19; + UC_M68K_REG_CR_SFC = 19; + UC_M68K_REG_CR_DFC = 20; + UC_M68K_REG_CR_VBR = 21; + UC_M68K_REG_CR_CACR = 22; + UC_M68K_REG_CR_TC = 23; + UC_M68K_REG_CR_MMUSR = 24; + UC_M68K_REG_CR_SRP = 25; + UC_M68K_REG_CR_USP = 26; + UC_M68K_REG_CR_MSP = 27; + UC_M68K_REG_CR_ISP = 28; + UC_M68K_REG_CR_URP = 29; + UC_M68K_REG_CR_ITT0 = 30; + UC_M68K_REG_CR_ITT1 = 31; + UC_M68K_REG_CR_DTT0 = 32; + UC_M68K_REG_CR_DTT1 = 33; + UC_M68K_REG_ENDING = 34; implementation end. \ No newline at end of file diff --git a/bindings/python/unicorn/m68k_const.py b/bindings/python/unicorn/m68k_const.py index 6d0cdc57..824d300d 100644 --- a/bindings/python/unicorn/m68k_const.py +++ b/bindings/python/unicorn/m68k_const.py @@ -34,4 +34,19 @@ UC_M68K_REG_D6 = 15 UC_M68K_REG_D7 = 16 UC_M68K_REG_SR = 17 UC_M68K_REG_PC = 18 -UC_M68K_REG_ENDING = 19 +UC_M68K_REG_CR_SFC = 19 +UC_M68K_REG_CR_DFC = 20 +UC_M68K_REG_CR_VBR = 21 +UC_M68K_REG_CR_CACR = 22 +UC_M68K_REG_CR_TC = 23 +UC_M68K_REG_CR_MMUSR = 24 +UC_M68K_REG_CR_SRP = 25 +UC_M68K_REG_CR_USP = 26 +UC_M68K_REG_CR_MSP = 27 +UC_M68K_REG_CR_ISP = 28 +UC_M68K_REG_CR_URP = 29 +UC_M68K_REG_CR_ITT0 = 30 +UC_M68K_REG_CR_ITT1 = 31 +UC_M68K_REG_CR_DTT0 = 32 +UC_M68K_REG_CR_DTT1 = 33 +UC_M68K_REG_ENDING = 34 diff --git a/bindings/ruby/unicorn_gem/lib/unicorn_engine/m68k_const.rb b/bindings/ruby/unicorn_gem/lib/unicorn_engine/m68k_const.rb index a5b8988f..7665ef3a 100644 --- a/bindings/ruby/unicorn_gem/lib/unicorn_engine/m68k_const.rb +++ b/bindings/ruby/unicorn_gem/lib/unicorn_engine/m68k_const.rb @@ -36,5 +36,20 @@ module UnicornEngine UC_M68K_REG_D7 = 16 UC_M68K_REG_SR = 17 UC_M68K_REG_PC = 18 - UC_M68K_REG_ENDING = 19 + UC_M68K_REG_CR_SFC = 19 + UC_M68K_REG_CR_DFC = 20 + UC_M68K_REG_CR_VBR = 21 + UC_M68K_REG_CR_CACR = 22 + UC_M68K_REG_CR_TC = 23 + UC_M68K_REG_CR_MMUSR = 24 + UC_M68K_REG_CR_SRP = 25 + UC_M68K_REG_CR_USP = 26 + UC_M68K_REG_CR_MSP = 27 + UC_M68K_REG_CR_ISP = 28 + UC_M68K_REG_CR_URP = 29 + UC_M68K_REG_CR_ITT0 = 30 + UC_M68K_REG_CR_ITT1 = 31 + UC_M68K_REG_CR_DTT0 = 32 + UC_M68K_REG_CR_DTT1 = 33 + UC_M68K_REG_ENDING = 34 end \ No newline at end of file diff --git a/bindings/zig/unicorn/m68k_const.zig b/bindings/zig/unicorn/m68k_const.zig index 8514d848..3124eeed 100644 --- a/bindings/zig/unicorn/m68k_const.zig +++ b/bindings/zig/unicorn/m68k_const.zig @@ -36,6 +36,21 @@ pub const m68kConst = enum(c_int) { M68K_REG_D7 = 16, M68K_REG_SR = 17, M68K_REG_PC = 18, - M68K_REG_ENDING = 19, + M68K_REG_CR_SFC = 19, + M68K_REG_CR_DFC = 20, + M68K_REG_CR_VBR = 21, + M68K_REG_CR_CACR = 22, + M68K_REG_CR_TC = 23, + M68K_REG_CR_MMUSR = 24, + M68K_REG_CR_SRP = 25, + M68K_REG_CR_USP = 26, + M68K_REG_CR_MSP = 27, + M68K_REG_CR_ISP = 28, + M68K_REG_CR_URP = 29, + M68K_REG_CR_ITT0 = 30, + M68K_REG_CR_ITT1 = 31, + M68K_REG_CR_DTT0 = 32, + M68K_REG_CR_DTT1 = 33, + M68K_REG_ENDING = 34, };