diff --git a/bindings/dotnet/UnicornManaged/Const/Arm64.fs b/bindings/dotnet/UnicornManaged/Const/Arm64.fs
index f323fcf9..4c509d03 100644
--- a/bindings/dotnet/UnicornManaged/Const/Arm64.fs
+++ b/bindings/dotnet/UnicornManaged/Const/Arm64.fs
@@ -318,7 +318,11 @@ module Arm64 =
     let UC_ARM64_REG_VBAR_EL2 = 288
     let UC_ARM64_REG_VBAR_EL3 = 289
     let UC_ARM64_REG_CP_REG = 290
-    let UC_ARM64_REG_ENDING = 291
+
+    // floating point control and status registers
+    let UC_ARM64_REG_FPCR = 291
+    let UC_ARM64_REG_FPSR = 292
+    let UC_ARM64_REG_ENDING = 293
 
     // alias registers
     let UC_ARM64_REG_IP0 = 215
diff --git a/bindings/go/unicorn/arm64_const.go b/bindings/go/unicorn/arm64_const.go
index 2f324154..e3548c78 100644
--- a/bindings/go/unicorn/arm64_const.go
+++ b/bindings/go/unicorn/arm64_const.go
@@ -313,7 +313,11 @@ const (
 	ARM64_REG_VBAR_EL2 = 288
 	ARM64_REG_VBAR_EL3 = 289
 	ARM64_REG_CP_REG = 290
-	ARM64_REG_ENDING = 291
+
+// floating point control and status registers
+	ARM64_REG_FPCR = 291
+	ARM64_REG_FPSR = 292
+	ARM64_REG_ENDING = 293
 
 // alias registers
 	ARM64_REG_IP0 = 215
diff --git a/bindings/java/unicorn/Arm64Const.java b/bindings/java/unicorn/Arm64Const.java
index 77b9e49a..bb196037 100644
--- a/bindings/java/unicorn/Arm64Const.java
+++ b/bindings/java/unicorn/Arm64Const.java
@@ -315,7 +315,11 @@ public interface Arm64Const {
    public static final int UC_ARM64_REG_VBAR_EL2 = 288;
    public static final int UC_ARM64_REG_VBAR_EL3 = 289;
    public static final int UC_ARM64_REG_CP_REG = 290;
-   public static final int UC_ARM64_REG_ENDING = 291;
+
+// floating point control and status registers
+   public static final int UC_ARM64_REG_FPCR = 291;
+   public static final int UC_ARM64_REG_FPSR = 292;
+   public static final int UC_ARM64_REG_ENDING = 293;
 
 // alias registers
    public static final int UC_ARM64_REG_IP0 = 215;
diff --git a/bindings/pascal/unicorn/Arm64Const.pas b/bindings/pascal/unicorn/Arm64Const.pas
index 9e3939d3..800846b3 100644
--- a/bindings/pascal/unicorn/Arm64Const.pas
+++ b/bindings/pascal/unicorn/Arm64Const.pas
@@ -316,7 +316,11 @@ const
   UC_ARM64_REG_VBAR_EL2 = 288;
   UC_ARM64_REG_VBAR_EL3 = 289;
   UC_ARM64_REG_CP_REG = 290;
-  UC_ARM64_REG_ENDING = 291;
+
+// floating point control and status registers
+  UC_ARM64_REG_FPCR = 291;
+  UC_ARM64_REG_FPSR = 292;
+  UC_ARM64_REG_ENDING = 293;
 
 // alias registers
   UC_ARM64_REG_IP0 = 215;
diff --git a/bindings/python/unicorn/arm64_const.py b/bindings/python/unicorn/arm64_const.py
index 8d7c5a70..53135ab8 100644
--- a/bindings/python/unicorn/arm64_const.py
+++ b/bindings/python/unicorn/arm64_const.py
@@ -311,7 +311,11 @@ UC_ARM64_REG_VBAR_EL1 = 287
 UC_ARM64_REG_VBAR_EL2 = 288
 UC_ARM64_REG_VBAR_EL3 = 289
 UC_ARM64_REG_CP_REG = 290
-UC_ARM64_REG_ENDING = 291
+
+# floating point control and status registers
+UC_ARM64_REG_FPCR = 291
+UC_ARM64_REG_FPSR = 292
+UC_ARM64_REG_ENDING = 293
 
 # alias registers
 UC_ARM64_REG_IP0 = 215
diff --git a/bindings/ruby/unicorn_gem/lib/unicorn_engine/arm64_const.rb b/bindings/ruby/unicorn_gem/lib/unicorn_engine/arm64_const.rb
index 6ec37708..aef319be 100644
--- a/bindings/ruby/unicorn_gem/lib/unicorn_engine/arm64_const.rb
+++ b/bindings/ruby/unicorn_gem/lib/unicorn_engine/arm64_const.rb
@@ -313,7 +313,11 @@ module UnicornEngine
 	UC_ARM64_REG_VBAR_EL2 = 288
 	UC_ARM64_REG_VBAR_EL3 = 289
 	UC_ARM64_REG_CP_REG = 290
-	UC_ARM64_REG_ENDING = 291
+
+# floating point control and status registers
+	UC_ARM64_REG_FPCR = 291
+	UC_ARM64_REG_FPSR = 292
+	UC_ARM64_REG_ENDING = 293
 
 # alias registers
 	UC_ARM64_REG_IP0 = 215
diff --git a/include/unicorn/arm64.h b/include/unicorn/arm64.h
index 933be479..fd8192fb 100644
--- a/include/unicorn/arm64.h
+++ b/include/unicorn/arm64.h
@@ -350,6 +350,10 @@ typedef enum uc_arm64_reg {
 
     UC_ARM64_REG_CP_REG,
 
+    //> floating point control and status registers
+    UC_ARM64_REG_FPCR,
+    UC_ARM64_REG_FPSR,
+
     UC_ARM64_REG_ENDING, // <-- mark the end of the list of registers
 
     //> alias registers
diff --git a/qemu/target/arm/unicorn_aarch64.c b/qemu/target/arm/unicorn_aarch64.c
index f24c9506..fec0db68 100644
--- a/qemu/target/arm/unicorn_aarch64.c
+++ b/qemu/target/arm/unicorn_aarch64.c
@@ -225,6 +225,12 @@ static uc_err reg_read(CPUARMState *env, unsigned int regid, void *value)
         case UC_ARM64_REG_CP_REG:
             ret = read_cp_reg(env, (uc_arm64_cp_reg *)value);
             break;
+        case UC_ARM64_REG_FPCR:
+            *(uint32_t *)value = vfp_get_fpcr(env);
+            break;
+        case UC_ARM64_REG_FPSR:
+            *(uint32_t *)value = vfp_get_fpsr(env);
+            break;
         }
     }
 
@@ -318,6 +324,12 @@ static uc_err reg_write(CPUARMState *env, unsigned int regid, const void *value)
         case UC_ARM64_REG_CP_REG:
             ret = write_cp_reg(env, (uc_arm64_cp_reg *)value);
             break;
+        case UC_ARM64_REG_FPCR:
+            vfp_set_fpcr(env, *(uint32_t *)value);
+            break;
+        case UC_ARM64_REG_FPSR:
+            vfp_set_fpsr(env, *(uint32_t *)value);
+            break;
         }
     }