Reformat code with format.sh
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@@ -1125,8 +1125,8 @@ static void test_x86_invalid_vex_l(void)
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OK(uc_close(uc));
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}
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// AARCH64 inline the read while s390x won't split the access. Though not tested on other hosts
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// but we restrict a bit more.
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// AARCH64 inline the read while s390x won't split the access. Though not tested
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// on other hosts but we restrict a bit more.
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#if !defined(TARGET_READ_INLINED) && defined(BOOST_LITTLE_ENDIAN)
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struct writelog_t {
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@@ -1230,7 +1230,8 @@ static void test_x86_lazy_mapping(void)
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OK(uc_close(uc));
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}
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static void test_x86_16_incorrect_ip_cb(uc_engine *uc, uint64_t address, uint32_t size, void* data)
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static void test_x86_16_incorrect_ip_cb(uc_engine *uc, uint64_t address,
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uint32_t size, void *data)
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{
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uint16_t cs, ip;
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@@ -1250,27 +1251,30 @@ static void test_x86_16_incorrect_ip(void)
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uc_common_setup(&uc, UC_ARCH_X86, UC_MODE_16, code, sizeof(code) - 1);
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OK(uc_hook_add(uc, &hk1, UC_HOOK_BLOCK, test_x86_16_incorrect_ip_cb, NULL, 1, 0));
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OK(uc_hook_add(uc, &hk2, UC_HOOK_CODE, test_x86_16_incorrect_ip_cb, NULL, 1, 0));
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OK(uc_hook_add(uc, &hk1, UC_HOOK_BLOCK, test_x86_16_incorrect_ip_cb, NULL,
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1, 0));
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OK(uc_hook_add(uc, &hk2, UC_HOOK_CODE, test_x86_16_incorrect_ip_cb, NULL, 1,
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0));
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OK(uc_reg_write(uc, UC_X86_REG_CS, &cs));
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OK(uc_emu_start(uc, code_start, code_start + sizeof(code) - 1, 0, 0));
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OK(uc_close(uc));
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}
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static void test_x86_mmu_prepare_tlb(uc_engine *uc, uint64_t vaddr, uint64_t tlb_base)
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static void test_x86_mmu_prepare_tlb(uc_engine *uc, uint64_t vaddr,
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uint64_t tlb_base)
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{
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uint64_t cr0;
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uint64_t cr4;
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uc_x86_msr msr = {.rid = 0x0c0000080, .value = 0};
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uint64_t pml4o = ((vaddr & 0x00ff8000000000) >> 39)*8;
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uint64_t pdpo = ((vaddr & 0x00007fc0000000) >> 30)*8;
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uint64_t pdo = ((vaddr & 0x0000003fe00000) >> 21)*8;
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uint64_t pml4o = ((vaddr & 0x00ff8000000000) >> 39) * 8;
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uint64_t pdpo = ((vaddr & 0x00007fc0000000) >> 30) * 8;
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uint64_t pdo = ((vaddr & 0x0000003fe00000) >> 21) * 8;
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uint64_t pml4e = (tlb_base + 0x1000) | 1 | (1 << 2);
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uint64_t pdpe = (tlb_base + 0x2000) | 1 | (1 << 2);
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uint64_t pde = (tlb_base + 0x3000) | 1 | (1 << 2);
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uint64_t pdpe = (tlb_base + 0x2000) | 1 | (1 << 2);
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uint64_t pde = (tlb_base + 0x3000) | 1 | (1 << 2);
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OK(uc_mem_write(uc, tlb_base + pml4o, &pml4e, sizeof(pml4o)));
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OK(uc_mem_write(uc, tlb_base + 0x1000 + pdpo, &pdpe, sizeof(pdpe)));
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OK(uc_mem_write(uc, tlb_base + 0x2000 + pdo, &pde, sizeof(pde)));
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@@ -1287,10 +1291,11 @@ static void test_x86_mmu_prepare_tlb(uc_engine *uc, uint64_t vaddr, uint64_t tlb
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OK(uc_reg_write(uc, UC_X86_REG_MSR, &msr));
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}
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static void test_x86_mmu_pt_set(uc_engine *uc, uint64_t vaddr, uint64_t paddr, uint64_t tlb_base)
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static void test_x86_mmu_pt_set(uc_engine *uc, uint64_t vaddr, uint64_t paddr,
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uint64_t tlb_base)
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{
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uint64_t pto = ((vaddr & 0x000000001ff000) >> 12)*8;
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uint32_t pte = (paddr) | 1 | (1 << 2);
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uint64_t pto = ((vaddr & 0x000000001ff000) >> 12) * 8;
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uint32_t pte = (paddr) | 1 | (1 << 2);
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uc_mem_write(uc, tlb_base + 0x3000 + pto, &pte, sizeof(pte));
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}
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@@ -1346,18 +1351,22 @@ static void test_x86_mmu(void)
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* mov rax, 60
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* syscall
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*/
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char code[] = "\xB8\x39\x00\x00\x00\x0F\x05\x48\x85\xC0\x74\x0F\xB8\x3C\x00\x00\x00\x48\x89\x04\x25\x00\x40\x00\x00\x0F\x05\xB9\x2A\x00\x00\x00\x48\x89\x0C\x25\x00\x40\x00\x00\xB8\x3C\x00\x00\x00\x0F\x05";
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char code[] =
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"\xB8\x39\x00\x00\x00\x0F\x05\x48\x85\xC0\x74\x0F\xB8\x3C\x00\x00\x00"
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"\x48\x89\x04\x25\x00\x40\x00\x00\x0F\x05\xB9\x2A\x00\x00\x00\x48\x89"
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"\x0C\x25\x00\x40\x00\x00\xB8\x3C\x00\x00\x00\x0F\x05";
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OK(uc_open(UC_ARCH_X86, UC_MODE_64, &uc));
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OK(uc_ctl_tlb_mode(uc, UC_TLB_CPU));
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OK(uc_hook_add(uc, &h1, UC_HOOK_INSN, &test_x86_mmu_callback, &parrent_done, 1, 0, UC_X86_INS_SYSCALL));
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OK(uc_hook_add(uc, &h1, UC_HOOK_INSN, &test_x86_mmu_callback, &parrent_done,
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1, 0, UC_X86_INS_SYSCALL));
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OK(uc_context_alloc(uc, &context));
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OK(uc_mem_map(uc, 0x0, 0x1000, UC_PROT_ALL)); //Code
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OK(uc_mem_map(uc, 0x0, 0x1000, UC_PROT_ALL)); // Code
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OK(uc_mem_write(uc, 0x0, code, sizeof(code) - 1));
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OK(uc_mem_map(uc, 0x1000, 0x1000, UC_PROT_ALL)); //Parrent
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OK(uc_mem_map(uc, 0x2000, 0x1000, UC_PROT_ALL)); //Child
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OK(uc_mem_map(uc, tlb_base, 0x4000, UC_PROT_ALL)); //TLB
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OK(uc_mem_map(uc, 0x1000, 0x1000, UC_PROT_ALL)); // Parrent
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OK(uc_mem_map(uc, 0x2000, 0x1000, UC_PROT_ALL)); // Child
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OK(uc_mem_map(uc, tlb_base, 0x4000, UC_PROT_ALL)); // TLB
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test_x86_mmu_prepare_tlb(uc, 0x0, tlb_base);
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test_x86_mmu_pt_set(uc, 0x2000, 0x0, tlb_base);
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@@ -1386,7 +1395,9 @@ static void test_x86_mmu(void)
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TEST_CHECK(child == 42);
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}
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static bool test_x86_vtlb_callback(uc_engine *uc, uint64_t addr, uc_mem_type type, uc_tlb_entry *result, void *user_data)
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static bool test_x86_vtlb_callback(uc_engine *uc, uint64_t addr,
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uc_mem_type type, uc_tlb_entry *result,
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void *user_data)
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{
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result->paddr = addr;
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result->perms = UC_PROT_ALL;
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@@ -1404,7 +1415,8 @@ static void test_x86_vtlb(void)
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uc_common_setup(&uc, UC_ARCH_X86, UC_MODE_32, code, sizeof(code) - 1);
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OK(uc_ctl_tlb_mode(uc, UC_TLB_VIRTUAL));
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OK(uc_hook_add(uc, &hook, UC_HOOK_TLB_FILL, test_x86_vtlb_callback, NULL, 1, 0));
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OK(uc_hook_add(uc, &hook, UC_HOOK_TLB_FILL, test_x86_vtlb_callback, NULL, 1,
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0));
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OK(uc_emu_start(uc, code_start, code_start + 4, 0, 0));
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@@ -1419,14 +1431,13 @@ static void test_x86_segmentation()
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{
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uc_engine *uc;
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uint64_t fs = 0x53;
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uc_x86_mmr gdtr = { 0, 0xfffff8076d962000, 0x57, 0 };
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uc_x86_mmr gdtr = {0, 0xfffff8076d962000, 0x57, 0};
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OK(uc_open(UC_ARCH_X86, UC_MODE_64, &uc));
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OK(uc_reg_write(uc, UC_X86_REG_GDTR, &gdtr));
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uc_assert_err(UC_ERR_EXCEPTION, uc_reg_write(uc, UC_X86_REG_FS, &fs));
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}
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TEST_LIST = {
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{"test_x86_in", test_x86_in},
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{"test_x86_out", test_x86_out},
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