From cccab0b7afb15eec850dec52f7189d3ca34d3381 Mon Sep 17 00:00:00 2001
From: mio <mio@lazym.io>
Date: Mon, 14 Apr 2025 11:54:24 +0800
Subject: [PATCH] handle riscv32

---
 qemu/target/riscv/cpu_helper.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/qemu/target/riscv/cpu_helper.c b/qemu/target/riscv/cpu_helper.c
index 56d0a49e..bdc3926d 100644
--- a/qemu/target/riscv/cpu_helper.c
+++ b/qemu/target/riscv/cpu_helper.c
@@ -536,9 +536,17 @@ restart:
 #else
                     target_ulong old_pte =
 #ifdef _MSC_VER
+#if TARGET_LONG_SIZE == 4
+                        atomic_cmpxchg((long *)pte_pa, cpu_to_le32(pte), cpu_to_le32(updated_pte));
+#else
                         atomic_cmpxchg((long *)pte_pa, cpu_to_le64(pte), cpu_to_le64(updated_pte));
+#endif
+#else
+#if TARGET_LONG_SIZE == 4
+                        atomic_cmpxchg(pte_pa, cpu_to_le32(pte), cpu_to_le32(updated_pte));
 #else
                         atomic_cmpxchg(pte_pa, cpu_to_le64(pte), cpu_to_le64(updated_pte));
+#endif
 #endif
                     if (old_pte != pte) {
                         goto restart;