From b59a081d3ba0be1a06dbd62b759a7dda10e1bef4 Mon Sep 17 00:00:00 2001 From: mio Date: Mon, 14 Apr 2025 00:46:11 +0800 Subject: [PATCH] Fix riscv MMU implementation not considering BE --- qemu/target/riscv/cpu_helper.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/qemu/target/riscv/cpu_helper.c b/qemu/target/riscv/cpu_helper.c index bb2c3d86..56d0a49e 100644 --- a/qemu/target/riscv/cpu_helper.c +++ b/qemu/target/riscv/cpu_helper.c @@ -536,9 +536,9 @@ restart: #else target_ulong old_pte = #ifdef _MSC_VER - atomic_cmpxchg((long *)pte_pa, pte, updated_pte); + atomic_cmpxchg((long *)pte_pa, cpu_to_le64(pte), cpu_to_le64(updated_pte)); #else - atomic_cmpxchg(pte_pa, pte, updated_pte); + atomic_cmpxchg(pte_pa, cpu_to_le64(pte), cpu_to_le64(updated_pte)); #endif if (old_pte != pte) { goto restart;