import Unicorn2
This commit is contained in:
Nguyen Anh Quynh
240
qemu/target/ppc/translate/dfp-impl.inc.c
Normal file
240
qemu/target/ppc/translate/dfp-impl.inc.c
Normal file
@@ -0,0 +1,240 @@
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/*** Decimal Floating Point ***/
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static inline TCGv_ptr gen_fprp_ptr(TCGContext *tcg_ctx, int reg)
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{
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TCGv_ptr r = tcg_temp_new_ptr(tcg_ctx);
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tcg_gen_addi_ptr(tcg_ctx, r, tcg_ctx->cpu_env, offsetof(CPUPPCState, vsr[reg].u64[0]));
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return r;
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}
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#define GEN_DFP_T_A_B_Rc(name) \
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static void gen_##name(DisasContext *ctx) \
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{ \
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TCGContext *tcg_ctx = ctx->uc->tcg_ctx; \
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TCGv_ptr rd, ra, rb; \
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if (unlikely(!ctx->fpu_enabled)) { \
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gen_exception(ctx, POWERPC_EXCP_FPU); \
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return; \
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} \
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gen_update_nip(ctx, ctx->base.pc_next - 4); \
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rd = gen_fprp_ptr(tcg_ctx, rD(ctx->opcode)); \
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ra = gen_fprp_ptr(tcg_ctx, rA(ctx->opcode)); \
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rb = gen_fprp_ptr(tcg_ctx, rB(ctx->opcode)); \
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gen_helper_##name(tcg_ctx, tcg_ctx->cpu_env, rd, ra, rb); \
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if (unlikely(Rc(ctx->opcode) != 0)) { \
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gen_set_cr1_from_fpscr(ctx); \
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} \
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tcg_temp_free_ptr(tcg_ctx, rd); \
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tcg_temp_free_ptr(tcg_ctx, ra); \
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tcg_temp_free_ptr(tcg_ctx, rb); \
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}
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#define GEN_DFP_BF_A_B(name) \
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static void gen_##name(DisasContext *ctx) \
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{ \
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TCGContext *tcg_ctx = ctx->uc->tcg_ctx; \
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TCGv_ptr ra, rb; \
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if (unlikely(!ctx->fpu_enabled)) { \
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gen_exception(ctx, POWERPC_EXCP_FPU); \
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return; \
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} \
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gen_update_nip(ctx, ctx->base.pc_next - 4); \
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ra = gen_fprp_ptr(tcg_ctx, rA(ctx->opcode)); \
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rb = gen_fprp_ptr(tcg_ctx, rB(ctx->opcode)); \
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gen_helper_##name(tcg_ctx, cpu_crf[crfD(ctx->opcode)], \
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tcg_ctx->cpu_env, ra, rb); \
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tcg_temp_free_ptr(tcg_ctx, ra); \
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tcg_temp_free_ptr(tcg_ctx, rb); \
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}
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#define GEN_DFP_BF_I_B(name) \
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static void gen_##name(DisasContext *ctx) \
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{ \
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TCGContext *tcg_ctx = ctx->uc->tcg_ctx; \
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TCGv_i32 uim; \
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TCGv_ptr rb; \
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if (unlikely(!ctx->fpu_enabled)) { \
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gen_exception(ctx, POWERPC_EXCP_FPU); \
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return; \
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} \
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gen_update_nip(ctx, ctx->base.pc_next - 4); \
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uim = tcg_const_i32(tcg_ctx, UIMM5(ctx->opcode)); \
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rb = gen_fprp_ptr(tcg_ctx, rB(ctx->opcode)); \
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gen_helper_##name(tcg_ctx, cpu_crf[crfD(ctx->opcode)], \
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tcg_ctx->cpu_env, uim, rb); \
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tcg_temp_free_i32(tcg_ctx, uim); \
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tcg_temp_free_ptr(tcg_ctx, rb); \
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}
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#define GEN_DFP_BF_A_DCM(name) \
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static void gen_##name(DisasContext *ctx) \
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{ \
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TCGContext *tcg_ctx = ctx->uc->tcg_ctx; \
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TCGv_ptr ra; \
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TCGv_i32 dcm; \
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if (unlikely(!ctx->fpu_enabled)) { \
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gen_exception(ctx, POWERPC_EXCP_FPU); \
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return; \
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} \
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gen_update_nip(ctx, ctx->base.pc_next - 4); \
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ra = gen_fprp_ptr(tcg_ctx, rA(ctx->opcode)); \
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dcm = tcg_const_i32(tcg_ctx, DCM(ctx->opcode)); \
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gen_helper_##name(tcg_ctx, cpu_crf[crfD(ctx->opcode)], \
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tcg_ctx->cpu_env, ra, dcm); \
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tcg_temp_free_ptr(tcg_ctx, ra); \
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tcg_temp_free_i32(tcg_ctx, dcm); \
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}
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#define GEN_DFP_T_B_U32_U32_Rc(name, u32f1, u32f2) \
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static void gen_##name(DisasContext *ctx) \
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{ \
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TCGContext *tcg_ctx = ctx->uc->tcg_ctx; \
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TCGv_ptr rt, rb; \
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TCGv_i32 u32_1, u32_2; \
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if (unlikely(!ctx->fpu_enabled)) { \
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gen_exception(ctx, POWERPC_EXCP_FPU); \
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return; \
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} \
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gen_update_nip(ctx, ctx->base.pc_next - 4); \
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rt = gen_fprp_ptr(tcg_ctx, rD(ctx->opcode)); \
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rb = gen_fprp_ptr(tcg_ctx, rB(ctx->opcode)); \
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u32_1 = tcg_const_i32(tcg_ctx, u32f1(ctx->opcode)); \
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u32_2 = tcg_const_i32(tcg_ctx, u32f2(ctx->opcode)); \
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gen_helper_##name(tcg_ctx, tcg_ctx->cpu_env, rt, rb, u32_1, u32_2); \
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if (unlikely(Rc(ctx->opcode) != 0)) { \
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gen_set_cr1_from_fpscr(ctx); \
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} \
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tcg_temp_free_ptr(tcg_ctx, rt); \
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tcg_temp_free_ptr(tcg_ctx, rb); \
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tcg_temp_free_i32(tcg_ctx, u32_1); \
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tcg_temp_free_i32(tcg_ctx, u32_2); \
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}
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#define GEN_DFP_T_A_B_I32_Rc(name, i32fld) \
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static void gen_##name(DisasContext *ctx) \
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{ \
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TCGContext *tcg_ctx = ctx->uc->tcg_ctx; \
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TCGv_ptr rt, ra, rb; \
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TCGv_i32 i32; \
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if (unlikely(!ctx->fpu_enabled)) { \
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gen_exception(ctx, POWERPC_EXCP_FPU); \
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return; \
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} \
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gen_update_nip(ctx, ctx->base.pc_next - 4); \
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rt = gen_fprp_ptr(tcg_ctx, rD(ctx->opcode)); \
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ra = gen_fprp_ptr(tcg_ctx, rA(ctx->opcode)); \
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rb = gen_fprp_ptr(tcg_ctx, rB(ctx->opcode)); \
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i32 = tcg_const_i32(tcg_ctx, i32fld(ctx->opcode)); \
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gen_helper_##name(tcg_ctx, tcg_ctx->cpu_env, rt, ra, rb, i32); \
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if (unlikely(Rc(ctx->opcode) != 0)) { \
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gen_set_cr1_from_fpscr(ctx); \
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} \
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tcg_temp_free_ptr(tcg_ctx, rt); \
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tcg_temp_free_ptr(tcg_ctx, rb); \
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tcg_temp_free_ptr(tcg_ctx, ra); \
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tcg_temp_free_i32(tcg_ctx, i32); \
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}
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#define GEN_DFP_T_B_Rc(name) \
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static void gen_##name(DisasContext *ctx) \
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{ \
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TCGContext *tcg_ctx = ctx->uc->tcg_ctx; \
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TCGv_ptr rt, rb; \
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if (unlikely(!ctx->fpu_enabled)) { \
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gen_exception(ctx, POWERPC_EXCP_FPU); \
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return; \
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} \
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gen_update_nip(ctx, ctx->base.pc_next - 4); \
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rt = gen_fprp_ptr(tcg_ctx, rD(ctx->opcode)); \
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rb = gen_fprp_ptr(tcg_ctx, rB(ctx->opcode)); \
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gen_helper_##name(tcg_ctx, tcg_ctx->cpu_env, rt, rb); \
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if (unlikely(Rc(ctx->opcode) != 0)) { \
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gen_set_cr1_from_fpscr(ctx); \
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} \
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tcg_temp_free_ptr(tcg_ctx, rt); \
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tcg_temp_free_ptr(tcg_ctx, rb); \
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}
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#define GEN_DFP_T_FPR_I32_Rc(name, fprfld, i32fld) \
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static void gen_##name(DisasContext *ctx) \
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{ \
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TCGContext *tcg_ctx = ctx->uc->tcg_ctx; \
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TCGv_ptr rt, rs; \
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TCGv_i32 i32; \
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if (unlikely(!ctx->fpu_enabled)) { \
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gen_exception(ctx, POWERPC_EXCP_FPU); \
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return; \
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} \
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gen_update_nip(ctx, ctx->base.pc_next - 4); \
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rt = gen_fprp_ptr(tcg_ctx, rD(ctx->opcode)); \
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rs = gen_fprp_ptr(tcg_ctx, fprfld(ctx->opcode)); \
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i32 = tcg_const_i32(tcg_ctx, i32fld(ctx->opcode)); \
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gen_helper_##name(tcg_ctx, tcg_ctx->cpu_env, rt, rs, i32); \
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if (unlikely(Rc(ctx->opcode) != 0)) { \
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gen_set_cr1_from_fpscr(ctx); \
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} \
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tcg_temp_free_ptr(tcg_ctx, rt); \
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tcg_temp_free_ptr(tcg_ctx, rs); \
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tcg_temp_free_i32(tcg_ctx, i32); \
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}
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GEN_DFP_T_A_B_Rc(dadd)
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GEN_DFP_T_A_B_Rc(daddq)
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GEN_DFP_T_A_B_Rc(dsub)
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GEN_DFP_T_A_B_Rc(dsubq)
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GEN_DFP_T_A_B_Rc(dmul)
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GEN_DFP_T_A_B_Rc(dmulq)
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GEN_DFP_T_A_B_Rc(ddiv)
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GEN_DFP_T_A_B_Rc(ddivq)
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GEN_DFP_BF_A_B(dcmpu)
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GEN_DFP_BF_A_B(dcmpuq)
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GEN_DFP_BF_A_B(dcmpo)
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GEN_DFP_BF_A_B(dcmpoq)
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GEN_DFP_BF_A_DCM(dtstdc)
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GEN_DFP_BF_A_DCM(dtstdcq)
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GEN_DFP_BF_A_DCM(dtstdg)
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GEN_DFP_BF_A_DCM(dtstdgq)
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GEN_DFP_BF_A_B(dtstex)
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GEN_DFP_BF_A_B(dtstexq)
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GEN_DFP_BF_A_B(dtstsf)
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GEN_DFP_BF_A_B(dtstsfq)
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GEN_DFP_BF_I_B(dtstsfi)
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GEN_DFP_BF_I_B(dtstsfiq)
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GEN_DFP_T_B_U32_U32_Rc(dquai, SIMM5, RMC)
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GEN_DFP_T_B_U32_U32_Rc(dquaiq, SIMM5, RMC)
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GEN_DFP_T_A_B_I32_Rc(dqua, RMC)
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GEN_DFP_T_A_B_I32_Rc(dquaq, RMC)
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GEN_DFP_T_A_B_I32_Rc(drrnd, RMC)
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GEN_DFP_T_A_B_I32_Rc(drrndq, RMC)
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GEN_DFP_T_B_U32_U32_Rc(drintx, FPW, RMC)
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GEN_DFP_T_B_U32_U32_Rc(drintxq, FPW, RMC)
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GEN_DFP_T_B_U32_U32_Rc(drintn, FPW, RMC)
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GEN_DFP_T_B_U32_U32_Rc(drintnq, FPW, RMC)
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GEN_DFP_T_B_Rc(dctdp)
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GEN_DFP_T_B_Rc(dctqpq)
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GEN_DFP_T_B_Rc(drsp)
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GEN_DFP_T_B_Rc(drdpq)
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GEN_DFP_T_B_Rc(dcffix)
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GEN_DFP_T_B_Rc(dcffixq)
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GEN_DFP_T_B_Rc(dctfix)
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GEN_DFP_T_B_Rc(dctfixq)
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GEN_DFP_T_FPR_I32_Rc(ddedpd, rB, SP)
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GEN_DFP_T_FPR_I32_Rc(ddedpdq, rB, SP)
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GEN_DFP_T_FPR_I32_Rc(denbcd, rB, SP)
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GEN_DFP_T_FPR_I32_Rc(denbcdq, rB, SP)
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GEN_DFP_T_B_Rc(dxex)
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GEN_DFP_T_B_Rc(dxexq)
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GEN_DFP_T_A_B_Rc(diex)
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GEN_DFP_T_A_B_Rc(diexq)
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GEN_DFP_T_FPR_I32_Rc(dscli, rA, DCM)
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GEN_DFP_T_FPR_I32_Rc(dscliq, rA, DCM)
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GEN_DFP_T_FPR_I32_Rc(dscri, rA, DCM)
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GEN_DFP_T_FPR_I32_Rc(dscriq, rA, DCM)
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#undef GEN_DFP_T_A_B_Rc
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#undef GEN_DFP_BF_A_B
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#undef GEN_DFP_BF_A_DCM
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#undef GEN_DFP_T_B_U32_U32_Rc
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#undef GEN_DFP_T_A_B_I32_Rc
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#undef GEN_DFP_T_B_Rc
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#undef GEN_DFP_T_FPR_I32_Rc
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165
qemu/target/ppc/translate/dfp-ops.inc.c
Normal file
165
qemu/target/ppc/translate/dfp-ops.inc.c
Normal file
@@ -0,0 +1,165 @@
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#define _GEN_DFP_LONG(name, op1, op2, mask) \
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GEN_HANDLER_E(name, 0x3B, op1, op2, mask, PPC_NONE, PPC2_DFP)
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#define _GEN_DFP_LONG_300(name, op1, op2, mask) \
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GEN_HANDLER_E(name, 0x3B, op1, op2, mask, PPC_NONE, PPC2_ISA300)
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#define _GEN_DFP_LONGx2(name, op1, op2, mask) \
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GEN_HANDLER_E(name, 0x3B, op1, 0x00 | op2, mask, PPC_NONE, PPC2_DFP), \
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GEN_HANDLER_E(name, 0x3B, op1, 0x10 | op2, mask, PPC_NONE, PPC2_DFP)
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#define _GEN_DFP_LONGx4(name, op1, op2, mask) \
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GEN_HANDLER_E(name, 0x3B, op1, 0x00 | op2, mask, PPC_NONE, PPC2_DFP), \
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GEN_HANDLER_E(name, 0x3B, op1, 0x08 | op2, mask, PPC_NONE, PPC2_DFP), \
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GEN_HANDLER_E(name, 0x3B, op1, 0x10 | op2, mask, PPC_NONE, PPC2_DFP), \
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GEN_HANDLER_E(name, 0x3B, op1, 0x18 | op2, mask, PPC_NONE, PPC2_DFP)
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#define _GEN_DFP_QUAD(name, op1, op2, mask) \
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GEN_HANDLER_E(name, 0x3F, op1, op2, mask, PPC_NONE, PPC2_DFP)
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#define _GEN_DFP_QUAD_300(name, op1, op2, mask) \
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GEN_HANDLER_E(name, 0x3F, op1, op2, mask, PPC_NONE, PPC2_ISA300)
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#define _GEN_DFP_QUADx2(name, op1, op2, mask) \
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GEN_HANDLER_E(name, 0x3F, op1, 0x00 | op2, mask, PPC_NONE, PPC2_DFP), \
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GEN_HANDLER_E(name, 0x3F, op1, 0x10 | op2, mask, PPC_NONE, PPC2_DFP)
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#define _GEN_DFP_QUADx4(name, op1, op2, mask) \
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GEN_HANDLER_E(name, 0x3F, op1, 0x00 | op2, mask, PPC_NONE, PPC2_DFP), \
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GEN_HANDLER_E(name, 0x3F, op1, 0x08 | op2, mask, PPC_NONE, PPC2_DFP), \
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GEN_HANDLER_E(name, 0x3F, op1, 0x10 | op2, mask, PPC_NONE, PPC2_DFP), \
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GEN_HANDLER_E(name, 0x3F, op1, 0x18 | op2, mask, PPC_NONE, PPC2_DFP)
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#define GEN_DFP_T_A_B_Rc(name, op1, op2) \
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_GEN_DFP_LONG(name, op1, op2, 0x00000000)
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#define GEN_DFP_Tp_Ap_Bp_Rc(name, op1, op2) \
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_GEN_DFP_QUAD(name, op1, op2, 0x00210800)
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#define GEN_DFP_Tp_A_Bp_Rc(name, op1, op2) \
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_GEN_DFP_QUAD(name, op1, op2, 0x00200800)
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#define GEN_DFP_T_B_Rc(name, op1, op2) \
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_GEN_DFP_LONG(name, op1, op2, 0x001F0000)
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#define GEN_DFP_Tp_Bp_Rc(name, op1, op2) \
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_GEN_DFP_QUAD(name, op1, op2, 0x003F0800)
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#define GEN_DFP_Tp_B_Rc(name, op1, op2) \
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_GEN_DFP_QUAD(name, op1, op2, 0x003F0000)
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#define GEN_DFP_T_Bp_Rc(name, op1, op2) \
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_GEN_DFP_QUAD(name, op1, op2, 0x001F0800)
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#define GEN_DFP_BF_A_B(name, op1, op2) \
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_GEN_DFP_LONG(name, op1, op2, 0x00000001)
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#define GEN_DFP_BF_A_B_300(name, op1, op2) \
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_GEN_DFP_LONG_300(name, op1, op2, 0x00400001)
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#define GEN_DFP_BF_Ap_Bp(name, op1, op2) \
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_GEN_DFP_QUAD(name, op1, op2, 0x00610801)
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#define GEN_DFP_BF_A_Bp(name, op1, op2) \
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_GEN_DFP_QUAD(name, op1, op2, 0x00600801)
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#define GEN_DFP_BF_A_Bp_300(name, op1, op2) \
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_GEN_DFP_QUAD_300(name, op1, op2, 0x00400001)
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#define GEN_DFP_BF_A_DCM(name, op1, op2) \
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_GEN_DFP_LONGx2(name, op1, op2, 0x00600001)
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#define GEN_DFP_BF_Ap_DCM(name, op1, op2) \
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_GEN_DFP_QUADx2(name, op1, op2, 0x00610001)
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#define GEN_DFP_T_A_B_RMC_Rc(name, op1, op2) \
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_GEN_DFP_LONGx4(name, op1, op2, 0x00000000)
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#define GEN_DFP_Tp_Ap_Bp_RMC_Rc(name, op1, op2) \
|
||||
_GEN_DFP_QUADx4(name, op1, op2, 0x02010800)
|
||||
|
||||
#define GEN_DFP_Tp_A_Bp_RMC_Rc(name, op1, op2) \
|
||||
_GEN_DFP_QUADx4(name, op1, op2, 0x02000800)
|
||||
|
||||
#define GEN_DFP_TE_T_B_RMC_Rc(name, op1, op2) \
|
||||
_GEN_DFP_LONGx4(name, op1, op2, 0x00000000)
|
||||
|
||||
#define GEN_DFP_TE_Tp_Bp_RMC_Rc(name, op1, op2) \
|
||||
_GEN_DFP_QUADx4(name, op1, op2, 0x00200800)
|
||||
|
||||
#define GEN_DFP_R_T_B_RMC_Rc(name, op1, op2) \
|
||||
_GEN_DFP_LONGx4(name, op1, op2, 0x001E0000)
|
||||
|
||||
#define GEN_DFP_R_Tp_Bp_RMC_Rc(name, op1, op2) \
|
||||
_GEN_DFP_QUADx4(name, op1, op2, 0x003E0800)
|
||||
|
||||
#define GEN_DFP_SP_T_B_Rc(name, op1, op2) \
|
||||
_GEN_DFP_LONG(name, op1, op2, 0x00070000)
|
||||
|
||||
#define GEN_DFP_SP_Tp_Bp_Rc(name, op1, op2) \
|
||||
_GEN_DFP_QUAD(name, op1, op2, 0x00270800)
|
||||
|
||||
#define GEN_DFP_S_T_B_Rc(name, op1, op2) \
|
||||
_GEN_DFP_LONG(name, op1, op2, 0x000F0000)
|
||||
|
||||
#define GEN_DFP_S_Tp_Bp_Rc(name, op1, op2) \
|
||||
_GEN_DFP_QUAD(name, op1, op2, 0x002F0800)
|
||||
|
||||
#define GEN_DFP_T_A_SH_Rc(name, op1, op2) \
|
||||
_GEN_DFP_LONGx2(name, op1, op2, 0x00000000)
|
||||
|
||||
#define GEN_DFP_Tp_Ap_SH_Rc(name, op1, op2) \
|
||||
_GEN_DFP_QUADx2(name, op1, op2, 0x00210000)
|
||||
|
||||
GEN_DFP_T_A_B_Rc(dadd, 0x02, 0x00),
|
||||
GEN_DFP_Tp_Ap_Bp_Rc(daddq, 0x02, 0x00),
|
||||
GEN_DFP_T_A_B_Rc(dsub, 0x02, 0x10),
|
||||
GEN_DFP_Tp_Ap_Bp_Rc(dsubq, 0x02, 0x10),
|
||||
GEN_DFP_T_A_B_Rc(dmul, 0x02, 0x01),
|
||||
GEN_DFP_Tp_Ap_Bp_Rc(dmulq, 0x02, 0x01),
|
||||
GEN_DFP_T_A_B_Rc(ddiv, 0x02, 0x11),
|
||||
GEN_DFP_Tp_Ap_Bp_Rc(ddivq, 0x02, 0x11),
|
||||
GEN_DFP_BF_A_B(dcmpu, 0x02, 0x14),
|
||||
GEN_DFP_BF_Ap_Bp(dcmpuq, 0x02, 0x14),
|
||||
GEN_DFP_BF_A_B(dcmpo, 0x02, 0x04),
|
||||
GEN_DFP_BF_Ap_Bp(dcmpoq, 0x02, 0x04),
|
||||
GEN_DFP_BF_A_DCM(dtstdc, 0x02, 0x06),
|
||||
GEN_DFP_BF_Ap_DCM(dtstdcq, 0x02, 0x06),
|
||||
GEN_DFP_BF_A_DCM(dtstdg, 0x02, 0x07),
|
||||
GEN_DFP_BF_Ap_DCM(dtstdgq, 0x02, 0x07),
|
||||
GEN_DFP_BF_A_B(dtstex, 0x02, 0x05),
|
||||
GEN_DFP_BF_Ap_Bp(dtstexq, 0x02, 0x05),
|
||||
GEN_DFP_BF_A_B(dtstsf, 0x02, 0x15),
|
||||
GEN_DFP_BF_A_Bp(dtstsfq, 0x02, 0x15),
|
||||
GEN_DFP_BF_A_B_300(dtstsfi, 0x03, 0x15),
|
||||
GEN_DFP_BF_A_Bp_300(dtstsfiq, 0x03, 0x15),
|
||||
GEN_DFP_TE_T_B_RMC_Rc(dquai, 0x03, 0x02),
|
||||
GEN_DFP_TE_Tp_Bp_RMC_Rc(dquaiq, 0x03, 0x02),
|
||||
GEN_DFP_T_A_B_RMC_Rc(dqua, 0x03, 0x00),
|
||||
GEN_DFP_Tp_Ap_Bp_RMC_Rc(dquaq, 0x03, 0x00),
|
||||
GEN_DFP_T_A_B_RMC_Rc(drrnd, 0x03, 0x01),
|
||||
GEN_DFP_Tp_A_Bp_RMC_Rc(drrndq, 0x03, 0x01),
|
||||
GEN_DFP_R_T_B_RMC_Rc(drintx, 0x03, 0x03),
|
||||
GEN_DFP_R_Tp_Bp_RMC_Rc(drintxq, 0x03, 0x03),
|
||||
GEN_DFP_R_T_B_RMC_Rc(drintn, 0x03, 0x07),
|
||||
GEN_DFP_R_Tp_Bp_RMC_Rc(drintnq, 0x03, 0x07),
|
||||
GEN_DFP_T_B_Rc(dctdp, 0x02, 0x08),
|
||||
GEN_DFP_Tp_B_Rc(dctqpq, 0x02, 0x08),
|
||||
GEN_DFP_T_B_Rc(drsp, 0x02, 0x18),
|
||||
GEN_DFP_Tp_Bp_Rc(drdpq, 0x02, 0x18),
|
||||
GEN_DFP_T_B_Rc(dcffix, 0x02, 0x19),
|
||||
GEN_DFP_Tp_B_Rc(dcffixq, 0x02, 0x19),
|
||||
GEN_DFP_T_B_Rc(dctfix, 0x02, 0x09),
|
||||
GEN_DFP_T_Bp_Rc(dctfixq, 0x02, 0x09),
|
||||
GEN_DFP_SP_T_B_Rc(ddedpd, 0x02, 0x0a),
|
||||
GEN_DFP_SP_Tp_Bp_Rc(ddedpdq, 0x02, 0x0a),
|
||||
GEN_DFP_S_T_B_Rc(denbcd, 0x02, 0x1a),
|
||||
GEN_DFP_S_Tp_Bp_Rc(denbcdq, 0x02, 0x1a),
|
||||
GEN_DFP_T_B_Rc(dxex, 0x02, 0x0b),
|
||||
GEN_DFP_T_Bp_Rc(dxexq, 0x02, 0x0b),
|
||||
GEN_DFP_T_A_B_Rc(diex, 0x02, 0x1b),
|
||||
GEN_DFP_Tp_A_Bp_Rc(diexq, 0x02, 0x1b),
|
||||
GEN_DFP_T_A_SH_Rc(dscli, 0x02, 0x02),
|
||||
GEN_DFP_Tp_Ap_SH_Rc(dscliq, 0x02, 0x02),
|
||||
GEN_DFP_T_A_SH_Rc(dscri, 0x02, 0x03),
|
||||
GEN_DFP_Tp_Ap_SH_Rc(dscriq, 0x02, 0x03),
|
||||
1554
qemu/target/ppc/translate/fp-impl.inc.c
Normal file
1554
qemu/target/ppc/translate/fp-impl.inc.c
Normal file
File diff suppressed because it is too large
Load Diff
119
qemu/target/ppc/translate/fp-ops.inc.c
Normal file
119
qemu/target/ppc/translate/fp-ops.inc.c
Normal file
@@ -0,0 +1,119 @@
|
||||
#define _GEN_FLOAT_ACB(name, op, op1, op2, isfloat, set_fprf, type) \
|
||||
GEN_HANDLER(f##name, op1, op2, 0xFF, 0x00000000, type)
|
||||
#define GEN_FLOAT_ACB(name, op2, set_fprf, type) \
|
||||
_GEN_FLOAT_ACB(name, name, 0x3F, op2, 0, set_fprf, type), \
|
||||
_GEN_FLOAT_ACB(name##s, name, 0x3B, op2, 1, set_fprf, type)
|
||||
#define _GEN_FLOAT_AB(name, op, op1, op2, inval, isfloat, set_fprf, type) \
|
||||
GEN_HANDLER(f##name, op1, op2, 0xFF, inval, type)
|
||||
#define GEN_FLOAT_AB(name, op2, inval, set_fprf, type) \
|
||||
_GEN_FLOAT_AB(name, name, 0x3F, op2, inval, 0, set_fprf, type), \
|
||||
_GEN_FLOAT_AB(name##s, name, 0x3B, op2, inval, 1, set_fprf, type)
|
||||
#define _GEN_FLOAT_AC(name, op, op1, op2, inval, isfloat, set_fprf, type) \
|
||||
GEN_HANDLER(f##name, op1, op2, 0xFF, inval, type)
|
||||
#define GEN_FLOAT_AC(name, op2, inval, set_fprf, type) \
|
||||
_GEN_FLOAT_AC(name, name, 0x3F, op2, inval, 0, set_fprf, type), \
|
||||
_GEN_FLOAT_AC(name##s, name, 0x3B, op2, inval, 1, set_fprf, type)
|
||||
#define GEN_FLOAT_B(name, op2, op3, set_fprf, type) \
|
||||
GEN_HANDLER(f##name, 0x3F, op2, op3, 0x001F0000, type)
|
||||
#define GEN_FLOAT_BS(name, op1, op2, set_fprf, type) \
|
||||
GEN_HANDLER(f##name, op1, op2, 0xFF, 0x001F07C0, type)
|
||||
|
||||
GEN_FLOAT_AB(add, 0x15, 0x000007C0, 1, PPC_FLOAT),
|
||||
GEN_FLOAT_AB(div, 0x12, 0x000007C0, 1, PPC_FLOAT),
|
||||
GEN_FLOAT_AC(mul, 0x19, 0x0000F800, 1, PPC_FLOAT),
|
||||
GEN_FLOAT_BS(re, 0x3F, 0x18, 1, PPC_FLOAT_EXT),
|
||||
GEN_FLOAT_BS(res, 0x3B, 0x18, 1, PPC_FLOAT_FRES),
|
||||
GEN_FLOAT_BS(rsqrte, 0x3F, 0x1A, 1, PPC_FLOAT_FRSQRTE),
|
||||
_GEN_FLOAT_ACB(sel, sel, 0x3F, 0x17, 0, 0, PPC_FLOAT_FSEL),
|
||||
GEN_FLOAT_AB(sub, 0x14, 0x000007C0, 1, PPC_FLOAT),
|
||||
GEN_FLOAT_ACB(madd, 0x1D, 1, PPC_FLOAT),
|
||||
GEN_FLOAT_ACB(msub, 0x1C, 1, PPC_FLOAT),
|
||||
GEN_FLOAT_ACB(nmadd, 0x1F, 1, PPC_FLOAT),
|
||||
GEN_FLOAT_ACB(nmsub, 0x1E, 1, PPC_FLOAT),
|
||||
GEN_HANDLER_E(ftdiv, 0x3F, 0x00, 0x04, 1, PPC_NONE, PPC2_FP_TST_ISA206),
|
||||
GEN_HANDLER_E(ftsqrt, 0x3F, 0x00, 0x05, 1, PPC_NONE, PPC2_FP_TST_ISA206),
|
||||
GEN_FLOAT_B(ctiw, 0x0E, 0x00, 0, PPC_FLOAT),
|
||||
GEN_HANDLER_E(fctiwu, 0x3F, 0x0E, 0x04, 0, PPC_NONE, PPC2_FP_CVT_ISA206),
|
||||
GEN_FLOAT_B(ctiwz, 0x0F, 0x00, 0, PPC_FLOAT),
|
||||
GEN_HANDLER_E(fctiwuz, 0x3F, 0x0F, 0x04, 0, PPC_NONE, PPC2_FP_CVT_ISA206),
|
||||
GEN_FLOAT_B(rsp, 0x0C, 0x00, 1, PPC_FLOAT),
|
||||
GEN_HANDLER_E(fcfid, 0x3F, 0x0E, 0x1A, 0x001F0000, PPC_NONE, PPC2_FP_CVT_S64),
|
||||
GEN_HANDLER_E(fcfids, 0x3B, 0x0E, 0x1A, 0, PPC_NONE, PPC2_FP_CVT_ISA206),
|
||||
GEN_HANDLER_E(fcfidu, 0x3F, 0x0E, 0x1E, 0, PPC_NONE, PPC2_FP_CVT_ISA206),
|
||||
GEN_HANDLER_E(fcfidus, 0x3B, 0x0E, 0x1E, 0, PPC_NONE, PPC2_FP_CVT_ISA206),
|
||||
GEN_HANDLER_E(fctid, 0x3F, 0x0E, 0x19, 0x001F0000, PPC_NONE, PPC2_FP_CVT_S64),
|
||||
GEN_HANDLER_E(fctidu, 0x3F, 0x0E, 0x1D, 0, PPC_NONE, PPC2_FP_CVT_ISA206),
|
||||
GEN_HANDLER_E(fctidz, 0x3F, 0x0F, 0x19, 0x001F0000, PPC_NONE, PPC2_FP_CVT_S64),
|
||||
GEN_HANDLER_E(fctiduz, 0x3F, 0x0F, 0x1D, 0, PPC_NONE, PPC2_FP_CVT_ISA206),
|
||||
GEN_FLOAT_B(rin, 0x08, 0x0C, 1, PPC_FLOAT_EXT),
|
||||
GEN_FLOAT_B(riz, 0x08, 0x0D, 1, PPC_FLOAT_EXT),
|
||||
GEN_FLOAT_B(rip, 0x08, 0x0E, 1, PPC_FLOAT_EXT),
|
||||
GEN_FLOAT_B(rim, 0x08, 0x0F, 1, PPC_FLOAT_EXT),
|
||||
|
||||
#define GEN_LDF(name, ldop, opc, type) \
|
||||
GEN_HANDLER(name, opc, 0xFF, 0xFF, 0x00000000, type),
|
||||
#define GEN_LDUF(name, ldop, opc, type) \
|
||||
GEN_HANDLER(name##u, opc, 0xFF, 0xFF, 0x00000000, type),
|
||||
#define GEN_LDUXF(name, ldop, opc, type) \
|
||||
GEN_HANDLER(name##ux, 0x1F, 0x17, opc, 0x00000001, type),
|
||||
#define GEN_LDXF(name, ldop, opc2, opc3, type) \
|
||||
GEN_HANDLER(name##x, 0x1F, opc2, opc3, 0x00000001, type),
|
||||
#define GEN_LDFS(name, ldop, op, type) \
|
||||
GEN_LDF(name, ldop, op | 0x20, type) \
|
||||
GEN_LDUF(name, ldop, op | 0x21, type) \
|
||||
GEN_LDUXF(name, ldop, op | 0x01, type) \
|
||||
GEN_LDXF(name, ldop, 0x17, op | 0x00, type)
|
||||
|
||||
GEN_LDFS(lfd, ld64, 0x12, PPC_FLOAT)
|
||||
GEN_LDFS(lfs, ld32fs, 0x10, PPC_FLOAT)
|
||||
GEN_HANDLER_E(lfdepx, 0x1F, 0x1F, 0x12, 0x00000001, PPC_NONE, PPC2_BOOKE206),
|
||||
GEN_HANDLER_E(lfiwax, 0x1f, 0x17, 0x1a, 0x00000001, PPC_NONE, PPC2_ISA205),
|
||||
GEN_HANDLER_E(lfiwzx, 0x1f, 0x17, 0x1b, 0x1, PPC_NONE, PPC2_FP_CVT_ISA206),
|
||||
GEN_HANDLER_E(lfdpx, 0x1F, 0x17, 0x18, 0x00200001, PPC_NONE, PPC2_ISA205),
|
||||
|
||||
#define GEN_STF(name, stop, opc, type) \
|
||||
GEN_HANDLER(name, opc, 0xFF, 0xFF, 0x00000000, type),
|
||||
#define GEN_STUF(name, stop, opc, type) \
|
||||
GEN_HANDLER(name##u, opc, 0xFF, 0xFF, 0x00000000, type),
|
||||
#define GEN_STUXF(name, stop, opc, type) \
|
||||
GEN_HANDLER(name##ux, 0x1F, 0x17, opc, 0x00000001, type),
|
||||
#define GEN_STXF(name, stop, opc2, opc3, type) \
|
||||
GEN_HANDLER(name##x, 0x1F, opc2, opc3, 0x00000001, type),
|
||||
#define GEN_STFS(name, stop, op, type) \
|
||||
GEN_STF(name, stop, op | 0x20, type) \
|
||||
GEN_STUF(name, stop, op | 0x21, type) \
|
||||
GEN_STUXF(name, stop, op | 0x01, type) \
|
||||
GEN_STXF(name, stop, 0x17, op | 0x00, type)
|
||||
|
||||
GEN_STFS(stfd, st64_i64, 0x16, PPC_FLOAT)
|
||||
GEN_STFS(stfs, st32fs, 0x14, PPC_FLOAT)
|
||||
GEN_STXF(stfiw, st32fiw, 0x17, 0x1E, PPC_FLOAT_STFIWX)
|
||||
GEN_HANDLER_E(stfdepx, 0x1F, 0x1F, 0x16, 0x00000001, PPC_NONE, PPC2_BOOKE206),
|
||||
GEN_HANDLER_E(stfdpx, 0x1F, 0x17, 0x1C, 0x00200001, PPC_NONE, PPC2_ISA205),
|
||||
|
||||
GEN_HANDLER(frsqrtes, 0x3B, 0x1A, 0xFF, 0x001F07C0, PPC_FLOAT_FRSQRTES),
|
||||
GEN_HANDLER(fsqrt, 0x3F, 0x16, 0xFF, 0x001F07C0, PPC_FLOAT_FSQRT),
|
||||
GEN_HANDLER(fsqrts, 0x3B, 0x16, 0xFF, 0x001F07C0, PPC_FLOAT_FSQRT),
|
||||
GEN_HANDLER(fcmpo, 0x3F, 0x00, 0x01, 0x00600001, PPC_FLOAT),
|
||||
GEN_HANDLER(fcmpu, 0x3F, 0x00, 0x00, 0x00600001, PPC_FLOAT),
|
||||
GEN_HANDLER(fabs, 0x3F, 0x08, 0x08, 0x001F0000, PPC_FLOAT),
|
||||
GEN_HANDLER(fmr, 0x3F, 0x08, 0x02, 0x001F0000, PPC_FLOAT),
|
||||
GEN_HANDLER(fnabs, 0x3F, 0x08, 0x04, 0x001F0000, PPC_FLOAT),
|
||||
GEN_HANDLER(fneg, 0x3F, 0x08, 0x01, 0x001F0000, PPC_FLOAT),
|
||||
GEN_HANDLER_E(fcpsgn, 0x3F, 0x08, 0x00, 0x00000000, PPC_NONE, PPC2_ISA205),
|
||||
GEN_HANDLER_E(fmrgew, 0x3F, 0x06, 0x1E, 0x00000001, PPC_NONE, PPC2_VSX207),
|
||||
GEN_HANDLER_E(fmrgow, 0x3F, 0x06, 0x1A, 0x00000001, PPC_NONE, PPC2_VSX207),
|
||||
GEN_HANDLER(mcrfs, 0x3F, 0x00, 0x02, 0x0063F801, PPC_FLOAT),
|
||||
GEN_HANDLER_E_2(mffs, 0x3F, 0x07, 0x12, 0x00, 0x00000000, PPC_FLOAT, PPC_NONE),
|
||||
GEN_HANDLER_E_2(mffsce, 0x3F, 0x07, 0x12, 0x01, 0x00000000, PPC_FLOAT,
|
||||
PPC2_ISA300),
|
||||
GEN_HANDLER_E_2(mffsl, 0x3F, 0x07, 0x12, 0x18, 0x00000000, PPC_FLOAT,
|
||||
PPC2_ISA300),
|
||||
GEN_HANDLER_E_2(mffscrn, 0x3F, 0x07, 0x12, 0x16, 0x00000000, PPC_FLOAT,
|
||||
PPC_NONE),
|
||||
GEN_HANDLER_E_2(mffscrni, 0x3F, 0x07, 0x12, 0x17, 0x00000000, PPC_FLOAT,
|
||||
PPC_NONE),
|
||||
GEN_HANDLER(mtfsb0, 0x3F, 0x06, 0x02, 0x001FF800, PPC_FLOAT),
|
||||
GEN_HANDLER(mtfsb1, 0x3F, 0x06, 0x01, 0x001FF800, PPC_FLOAT),
|
||||
GEN_HANDLER(mtfsf, 0x3F, 0x07, 0x16, 0x00000000, PPC_FLOAT),
|
||||
GEN_HANDLER(mtfsfi, 0x3F, 0x06, 0x04, 0x006e0800, PPC_FLOAT),
|
||||
1283
qemu/target/ppc/translate/spe-impl.inc.c
Normal file
1283
qemu/target/ppc/translate/spe-impl.inc.c
Normal file
File diff suppressed because it is too large
Load Diff
105
qemu/target/ppc/translate/spe-ops.inc.c
Normal file
105
qemu/target/ppc/translate/spe-ops.inc.c
Normal file
@@ -0,0 +1,105 @@
|
||||
GEN_HANDLER2(evsel0, "evsel", 0x04, 0x1c, 0x09, 0x00000000, PPC_SPE),
|
||||
GEN_HANDLER2(evsel1, "evsel", 0x04, 0x1d, 0x09, 0x00000000, PPC_SPE),
|
||||
GEN_HANDLER2(evsel2, "evsel", 0x04, 0x1e, 0x09, 0x00000000, PPC_SPE),
|
||||
GEN_HANDLER2(evsel3, "evsel", 0x04, 0x1f, 0x09, 0x00000000, PPC_SPE),
|
||||
|
||||
#define GEN_SPE(name0, name1, opc2, opc3, inval0, inval1, type) \
|
||||
GEN_OPCODE_DUAL(name0##_##name1, 0x04, opc2, opc3, inval0, inval1, type, PPC_NONE)
|
||||
GEN_SPE(evaddw, speundef, 0x00, 0x08, 0x00000000, 0xFFFFFFFF, PPC_SPE),
|
||||
GEN_SPE(evaddiw, speundef, 0x01, 0x08, 0x00000000, 0xFFFFFFFF, PPC_SPE),
|
||||
GEN_SPE(evsubfw, speundef, 0x02, 0x08, 0x00000000, 0xFFFFFFFF, PPC_SPE),
|
||||
GEN_SPE(evsubifw, speundef, 0x03, 0x08, 0x00000000, 0xFFFFFFFF, PPC_SPE),
|
||||
GEN_SPE(evabs, evneg, 0x04, 0x08, 0x0000F800, 0x0000F800, PPC_SPE),
|
||||
GEN_SPE(evextsb, evextsh, 0x05, 0x08, 0x0000F800, 0x0000F800, PPC_SPE),
|
||||
GEN_SPE(evrndw, evcntlzw, 0x06, 0x08, 0x0000F800, 0x0000F800, PPC_SPE),
|
||||
GEN_SPE(evcntlsw, brinc, 0x07, 0x08, 0x0000F800, 0x00000000, PPC_SPE),
|
||||
GEN_SPE(evmra, speundef, 0x02, 0x13, 0x0000F800, 0xFFFFFFFF, PPC_SPE),
|
||||
GEN_SPE(speundef, evand, 0x08, 0x08, 0xFFFFFFFF, 0x00000000, PPC_SPE),
|
||||
GEN_SPE(evandc, speundef, 0x09, 0x08, 0x00000000, 0xFFFFFFFF, PPC_SPE),
|
||||
GEN_SPE(evxor, evor, 0x0B, 0x08, 0x00000000, 0x00000000, PPC_SPE),
|
||||
GEN_SPE(evnor, eveqv, 0x0C, 0x08, 0x00000000, 0x00000000, PPC_SPE),
|
||||
GEN_SPE(evmwumi, evmwsmi, 0x0C, 0x11, 0x00000000, 0x00000000, PPC_SPE),
|
||||
GEN_SPE(evmwumia, evmwsmia, 0x1C, 0x11, 0x00000000, 0x00000000, PPC_SPE),
|
||||
GEN_SPE(evmwumiaa, evmwsmiaa, 0x0C, 0x15, 0x00000000, 0x00000000, PPC_SPE),
|
||||
GEN_SPE(speundef, evorc, 0x0D, 0x08, 0xFFFFFFFF, 0x00000000, PPC_SPE),
|
||||
GEN_SPE(evnand, speundef, 0x0F, 0x08, 0x00000000, 0xFFFFFFFF, PPC_SPE),
|
||||
GEN_SPE(evsrwu, evsrws, 0x10, 0x08, 0x00000000, 0x00000000, PPC_SPE),
|
||||
GEN_SPE(evsrwiu, evsrwis, 0x11, 0x08, 0x00000000, 0x00000000, PPC_SPE),
|
||||
GEN_SPE(evslw, speundef, 0x12, 0x08, 0x00000000, 0xFFFFFFFF, PPC_SPE),
|
||||
GEN_SPE(evslwi, speundef, 0x13, 0x08, 0x00000000, 0xFFFFFFFF, PPC_SPE),
|
||||
GEN_SPE(evrlw, evsplati, 0x14, 0x08, 0x00000000, 0x0000F800, PPC_SPE),
|
||||
GEN_SPE(evrlwi, evsplatfi, 0x15, 0x08, 0x00000000, 0x0000F800, PPC_SPE),
|
||||
GEN_SPE(evmergehi, evmergelo, 0x16, 0x08, 0x00000000, 0x00000000, PPC_SPE),
|
||||
GEN_SPE(evmergehilo, evmergelohi, 0x17, 0x08, 0x00000000, 0x00000000, PPC_SPE),
|
||||
GEN_SPE(evcmpgtu, evcmpgts, 0x18, 0x08, 0x00600000, 0x00600000, PPC_SPE),
|
||||
GEN_SPE(evcmpltu, evcmplts, 0x19, 0x08, 0x00600000, 0x00600000, PPC_SPE),
|
||||
GEN_SPE(evcmpeq, speundef, 0x1A, 0x08, 0x00600000, 0xFFFFFFFF, PPC_SPE),
|
||||
|
||||
GEN_SPE(evfsadd, evfssub, 0x00, 0x0A, 0x00000000, 0x00000000, PPC_SPE_SINGLE),
|
||||
GEN_SPE(evfsabs, evfsnabs, 0x02, 0x0A, 0x0000F800, 0x0000F800, PPC_SPE_SINGLE),
|
||||
GEN_SPE(evfsneg, speundef, 0x03, 0x0A, 0x0000F800, 0xFFFFFFFF, PPC_SPE_SINGLE),
|
||||
GEN_SPE(evfsmul, evfsdiv, 0x04, 0x0A, 0x00000000, 0x00000000, PPC_SPE_SINGLE),
|
||||
GEN_SPE(evfscmpgt, evfscmplt, 0x06, 0x0A, 0x00600000, 0x00600000, PPC_SPE_SINGLE),
|
||||
GEN_SPE(evfscmpeq, speundef, 0x07, 0x0A, 0x00600000, 0xFFFFFFFF, PPC_SPE_SINGLE),
|
||||
GEN_SPE(evfscfui, evfscfsi, 0x08, 0x0A, 0x00180000, 0x00180000, PPC_SPE_SINGLE),
|
||||
GEN_SPE(evfscfuf, evfscfsf, 0x09, 0x0A, 0x00180000, 0x00180000, PPC_SPE_SINGLE),
|
||||
GEN_SPE(evfsctui, evfsctsi, 0x0A, 0x0A, 0x00180000, 0x00180000, PPC_SPE_SINGLE),
|
||||
GEN_SPE(evfsctuf, evfsctsf, 0x0B, 0x0A, 0x00180000, 0x00180000, PPC_SPE_SINGLE),
|
||||
GEN_SPE(evfsctuiz, speundef, 0x0C, 0x0A, 0x00180000, 0xFFFFFFFF, PPC_SPE_SINGLE),
|
||||
GEN_SPE(evfsctsiz, speundef, 0x0D, 0x0A, 0x00180000, 0xFFFFFFFF, PPC_SPE_SINGLE),
|
||||
GEN_SPE(evfststgt, evfststlt, 0x0E, 0x0A, 0x00600000, 0x00600000, PPC_SPE_SINGLE),
|
||||
GEN_SPE(evfststeq, speundef, 0x0F, 0x0A, 0x00600000, 0xFFFFFFFF, PPC_SPE_SINGLE),
|
||||
|
||||
GEN_SPE(efsadd, efssub, 0x00, 0x0B, 0x00000000, 0x00000000, PPC_SPE_SINGLE),
|
||||
GEN_SPE(efsabs, efsnabs, 0x02, 0x0B, 0x0000F800, 0x0000F800, PPC_SPE_SINGLE),
|
||||
GEN_SPE(efsneg, speundef, 0x03, 0x0B, 0x0000F800, 0xFFFFFFFF, PPC_SPE_SINGLE),
|
||||
GEN_SPE(efsmul, efsdiv, 0x04, 0x0B, 0x00000000, 0x00000000, PPC_SPE_SINGLE),
|
||||
GEN_SPE(efscmpgt, efscmplt, 0x06, 0x0B, 0x00600000, 0x00600000, PPC_SPE_SINGLE),
|
||||
GEN_SPE(efscmpeq, efscfd, 0x07, 0x0B, 0x00600000, 0x00180000, PPC_SPE_SINGLE),
|
||||
GEN_SPE(efscfui, efscfsi, 0x08, 0x0B, 0x00180000, 0x00180000, PPC_SPE_SINGLE),
|
||||
GEN_SPE(efscfuf, efscfsf, 0x09, 0x0B, 0x00180000, 0x00180000, PPC_SPE_SINGLE),
|
||||
GEN_SPE(efsctui, efsctsi, 0x0A, 0x0B, 0x00180000, 0x00180000, PPC_SPE_SINGLE),
|
||||
GEN_SPE(efsctuf, efsctsf, 0x0B, 0x0B, 0x00180000, 0x00180000, PPC_SPE_SINGLE),
|
||||
GEN_SPE(efsctuiz, speundef, 0x0C, 0x0B, 0x00180000, 0xFFFFFFFF, PPC_SPE_SINGLE),
|
||||
GEN_SPE(efsctsiz, speundef, 0x0D, 0x0B, 0x00180000, 0xFFFFFFFF, PPC_SPE_SINGLE),
|
||||
GEN_SPE(efststgt, efststlt, 0x0E, 0x0B, 0x00600000, 0x00600000, PPC_SPE_SINGLE),
|
||||
GEN_SPE(efststeq, speundef, 0x0F, 0x0B, 0x00600000, 0xFFFFFFFF, PPC_SPE_SINGLE),
|
||||
|
||||
GEN_SPE(efdadd, efdsub, 0x10, 0x0B, 0x00000000, 0x00000000, PPC_SPE_DOUBLE),
|
||||
GEN_SPE(efdcfuid, efdcfsid, 0x11, 0x0B, 0x00180000, 0x00180000, PPC_SPE_DOUBLE),
|
||||
GEN_SPE(efdabs, efdnabs, 0x12, 0x0B, 0x0000F800, 0x0000F800, PPC_SPE_DOUBLE),
|
||||
GEN_SPE(efdneg, speundef, 0x13, 0x0B, 0x0000F800, 0xFFFFFFFF, PPC_SPE_DOUBLE),
|
||||
GEN_SPE(efdmul, efddiv, 0x14, 0x0B, 0x00000000, 0x00000000, PPC_SPE_DOUBLE),
|
||||
GEN_SPE(efdctuidz, efdctsidz, 0x15, 0x0B, 0x00180000, 0x00180000, PPC_SPE_DOUBLE),
|
||||
GEN_SPE(efdcmpgt, efdcmplt, 0x16, 0x0B, 0x00600000, 0x00600000, PPC_SPE_DOUBLE),
|
||||
GEN_SPE(efdcmpeq, efdcfs, 0x17, 0x0B, 0x00600000, 0x00180000, PPC_SPE_DOUBLE),
|
||||
GEN_SPE(efdcfui, efdcfsi, 0x18, 0x0B, 0x00180000, 0x00180000, PPC_SPE_DOUBLE),
|
||||
GEN_SPE(efdcfuf, efdcfsf, 0x19, 0x0B, 0x00180000, 0x00180000, PPC_SPE_DOUBLE),
|
||||
GEN_SPE(efdctui, efdctsi, 0x1A, 0x0B, 0x00180000, 0x00180000, PPC_SPE_DOUBLE),
|
||||
GEN_SPE(efdctuf, efdctsf, 0x1B, 0x0B, 0x00180000, 0x00180000, PPC_SPE_DOUBLE),
|
||||
GEN_SPE(efdctuiz, speundef, 0x1C, 0x0B, 0x00180000, 0xFFFFFFFF, PPC_SPE_DOUBLE),
|
||||
GEN_SPE(efdctsiz, speundef, 0x1D, 0x0B, 0x00180000, 0xFFFFFFFF, PPC_SPE_DOUBLE),
|
||||
GEN_SPE(efdtstgt, efdtstlt, 0x1E, 0x0B, 0x00600000, 0x00600000, PPC_SPE_DOUBLE),
|
||||
GEN_SPE(efdtsteq, speundef, 0x1F, 0x0B, 0x00600000, 0xFFFFFFFF, PPC_SPE_DOUBLE),
|
||||
|
||||
#define GEN_SPEOP_LDST(name, opc2, sh) \
|
||||
GEN_HANDLER(name, 0x04, opc2, 0x0C, 0x00000000, PPC_SPE)
|
||||
GEN_SPEOP_LDST(evldd, 0x00, 3),
|
||||
GEN_SPEOP_LDST(evldw, 0x01, 3),
|
||||
GEN_SPEOP_LDST(evldh, 0x02, 3),
|
||||
GEN_SPEOP_LDST(evlhhesplat, 0x04, 1),
|
||||
GEN_SPEOP_LDST(evlhhousplat, 0x06, 1),
|
||||
GEN_SPEOP_LDST(evlhhossplat, 0x07, 1),
|
||||
GEN_SPEOP_LDST(evlwhe, 0x08, 2),
|
||||
GEN_SPEOP_LDST(evlwhou, 0x0A, 2),
|
||||
GEN_SPEOP_LDST(evlwhos, 0x0B, 2),
|
||||
GEN_SPEOP_LDST(evlwwsplat, 0x0C, 2),
|
||||
GEN_SPEOP_LDST(evlwhsplat, 0x0E, 2),
|
||||
|
||||
GEN_SPEOP_LDST(evstdd, 0x10, 3),
|
||||
GEN_SPEOP_LDST(evstdw, 0x11, 3),
|
||||
GEN_SPEOP_LDST(evstdh, 0x12, 3),
|
||||
GEN_SPEOP_LDST(evstwhe, 0x18, 2),
|
||||
GEN_SPEOP_LDST(evstwho, 0x1A, 2),
|
||||
GEN_SPEOP_LDST(evstwwe, 0x1C, 2),
|
||||
GEN_SPEOP_LDST(evstwwo, 0x1E, 2),
|
||||
1606
qemu/target/ppc/translate/vmx-impl.inc.c
Normal file
1606
qemu/target/ppc/translate/vmx-impl.inc.c
Normal file
File diff suppressed because it is too large
Load Diff
301
qemu/target/ppc/translate/vmx-ops.inc.c
Normal file
301
qemu/target/ppc/translate/vmx-ops.inc.c
Normal file
@@ -0,0 +1,301 @@
|
||||
#define GEN_VR_LDX(name, opc2, opc3) \
|
||||
GEN_HANDLER(name, 0x1F, opc2, opc3, 0x00000001, PPC_ALTIVEC)
|
||||
#define GEN_VR_STX(name, opc2, opc3) \
|
||||
GEN_HANDLER(st##name, 0x1F, opc2, opc3, 0x00000001, PPC_ALTIVEC)
|
||||
#define GEN_VR_LVE(name, opc2, opc3) \
|
||||
GEN_HANDLER(lve##name, 0x1F, opc2, opc3, 0x00000001, PPC_ALTIVEC)
|
||||
#define GEN_VR_STVE(name, opc2, opc3) \
|
||||
GEN_HANDLER(stve##name, 0x1F, opc2, opc3, 0x00000001, PPC_ALTIVEC)
|
||||
GEN_VR_LDX(lvx, 0x07, 0x03),
|
||||
GEN_VR_LDX(lvxl, 0x07, 0x0B),
|
||||
GEN_VR_LVE(bx, 0x07, 0x00),
|
||||
GEN_VR_LVE(hx, 0x07, 0x01),
|
||||
GEN_VR_LVE(wx, 0x07, 0x02),
|
||||
GEN_VR_STX(svx, 0x07, 0x07),
|
||||
GEN_VR_STX(svxl, 0x07, 0x0F),
|
||||
GEN_VR_STVE(bx, 0x07, 0x04),
|
||||
GEN_VR_STVE(hx, 0x07, 0x05),
|
||||
GEN_VR_STVE(wx, 0x07, 0x06),
|
||||
|
||||
#define GEN_VX_LOGICAL(name, tcg_op, opc2, opc3) \
|
||||
GEN_HANDLER(name, 0x04, opc2, opc3, 0x00000000, PPC_ALTIVEC)
|
||||
|
||||
#define GEN_VX_LOGICAL_207(name, tcg_op, opc2, opc3) \
|
||||
GEN_HANDLER_E(name, 0x04, opc2, opc3, 0x00000000, PPC_NONE, PPC2_ALTIVEC_207)
|
||||
|
||||
GEN_VX_LOGICAL(vand, tcg_gen_and_i64, 2, 16),
|
||||
GEN_VX_LOGICAL(vandc, tcg_gen_andc_i64, 2, 17),
|
||||
GEN_VX_LOGICAL(vor, tcg_gen_or_i64, 2, 18),
|
||||
GEN_VX_LOGICAL(vxor, tcg_gen_xor_i64, 2, 19),
|
||||
GEN_VX_LOGICAL(vnor, tcg_gen_nor_i64, 2, 20),
|
||||
GEN_VX_LOGICAL_207(veqv, tcg_gen_eqv_i64, 2, 26),
|
||||
GEN_VX_LOGICAL_207(vnand, tcg_gen_nand_i64, 2, 22),
|
||||
GEN_VX_LOGICAL_207(vorc, tcg_gen_orc_i64, 2, 21),
|
||||
|
||||
#define GEN_VXFORM(name, opc2, opc3) \
|
||||
GEN_HANDLER(name, 0x04, opc2, opc3, 0x00000000, PPC_ALTIVEC)
|
||||
|
||||
#define GEN_VXFORM_207(name, opc2, opc3) \
|
||||
GEN_HANDLER_E(name, 0x04, opc2, opc3, 0x00000000, PPC_NONE, PPC2_ALTIVEC_207)
|
||||
|
||||
#define GEN_VXFORM_300(name, opc2, opc3) \
|
||||
GEN_HANDLER_E(name, 0x04, opc2, opc3, 0x00000000, PPC_NONE, PPC2_ISA300)
|
||||
|
||||
#define GEN_VXFORM_300_EXT(name, opc2, opc3, inval) \
|
||||
GEN_HANDLER_E(name, 0x04, opc2, opc3, inval, PPC_NONE, PPC2_ISA300)
|
||||
|
||||
#define GEN_VXFORM_300_EO(name, opc2, opc3, opc4) \
|
||||
GEN_HANDLER_E_2(name, 0x04, opc2, opc3, opc4, 0x00000000, PPC_NONE, \
|
||||
PPC2_ISA300)
|
||||
|
||||
#define GEN_VXFORM_DUAL(name0, name1, opc2, opc3, type0, type1) \
|
||||
GEN_HANDLER_E(name0##_##name1, 0x4, opc2, opc3, 0x00000000, type0, type1)
|
||||
|
||||
#define GEN_VXRFORM_DUAL(name0, name1, opc2, opc3, tp0, tp1) \
|
||||
GEN_HANDLER_E(name0##_##name1, 0x4, opc2, opc3, 0x00000000, tp0, tp1), \
|
||||
GEN_HANDLER_E(name0##_##name1, 0x4, opc2, (opc3 | 0x10), 0x00000000, tp0, tp1),
|
||||
|
||||
GEN_VXFORM_DUAL(vaddubm, vmul10cuq, 0, 0, PPC_ALTIVEC, PPC_NONE),
|
||||
GEN_VXFORM_DUAL(vadduhm, vmul10ecuq, 0, 1, PPC_ALTIVEC, PPC_NONE),
|
||||
GEN_VXFORM(vadduwm, 0, 2),
|
||||
GEN_VXFORM_207(vaddudm, 0, 3),
|
||||
GEN_VXFORM_DUAL(vsububm, bcdadd, 0, 16, PPC_ALTIVEC, PPC_NONE),
|
||||
GEN_VXFORM_DUAL(vsubuhm, bcdsub, 0, 17, PPC_ALTIVEC, PPC_NONE),
|
||||
GEN_VXFORM_DUAL(vsubuwm, bcdus, 0, 18, PPC_ALTIVEC, PPC2_ISA300),
|
||||
GEN_VXFORM_DUAL(vsubudm, bcds, 0, 19, PPC2_ALTIVEC_207, PPC2_ISA300),
|
||||
GEN_VXFORM_300(bcds, 0, 27),
|
||||
GEN_VXFORM(vmaxub, 1, 0),
|
||||
GEN_VXFORM(vmaxuh, 1, 1),
|
||||
GEN_VXFORM(vmaxuw, 1, 2),
|
||||
GEN_VXFORM_207(vmaxud, 1, 3),
|
||||
GEN_VXFORM(vmaxsb, 1, 4),
|
||||
GEN_VXFORM(vmaxsh, 1, 5),
|
||||
GEN_VXFORM(vmaxsw, 1, 6),
|
||||
GEN_VXFORM_207(vmaxsd, 1, 7),
|
||||
GEN_VXFORM(vminub, 1, 8),
|
||||
GEN_VXFORM(vminuh, 1, 9),
|
||||
GEN_VXFORM(vminuw, 1, 10),
|
||||
GEN_VXFORM_207(vminud, 1, 11),
|
||||
GEN_VXFORM(vminsb, 1, 12),
|
||||
GEN_VXFORM(vminsh, 1, 13),
|
||||
GEN_VXFORM(vminsw, 1, 14),
|
||||
GEN_VXFORM_207(vminsd, 1, 15),
|
||||
GEN_VXFORM_DUAL(vavgub, vabsdub, 1, 16, PPC_ALTIVEC, PPC_NONE),
|
||||
GEN_VXFORM_DUAL(vavguh, vabsduh, 1, 17, PPC_ALTIVEC, PPC_NONE),
|
||||
GEN_VXFORM_DUAL(vavguw, vabsduw, 1, 18, PPC_ALTIVEC, PPC_NONE),
|
||||
GEN_VXFORM(vavgsb, 1, 20),
|
||||
GEN_VXFORM(vavgsh, 1, 21),
|
||||
GEN_VXFORM(vavgsw, 1, 22),
|
||||
GEN_VXFORM(vmrghb, 6, 0),
|
||||
GEN_VXFORM(vmrghh, 6, 1),
|
||||
GEN_VXFORM(vmrghw, 6, 2),
|
||||
GEN_VXFORM(vmrglb, 6, 4),
|
||||
GEN_VXFORM(vmrglh, 6, 5),
|
||||
GEN_VXFORM(vmrglw, 6, 6),
|
||||
GEN_VXFORM_300(vextublx, 6, 24),
|
||||
GEN_VXFORM_300(vextuhlx, 6, 25),
|
||||
GEN_VXFORM_DUAL(vmrgow, vextuwlx, 6, 26, PPC_NONE, PPC2_ALTIVEC_207),
|
||||
GEN_VXFORM_300(vextubrx, 6, 28),
|
||||
GEN_VXFORM_300(vextuhrx, 6, 29),
|
||||
GEN_VXFORM_DUAL(vmrgew, vextuwrx, 6, 30, PPC_NONE, PPC2_ALTIVEC_207),
|
||||
GEN_VXFORM(vmuloub, 4, 0),
|
||||
GEN_VXFORM(vmulouh, 4, 1),
|
||||
GEN_VXFORM_DUAL(vmulouw, vmuluwm, 4, 2, PPC_ALTIVEC, PPC_NONE),
|
||||
GEN_VXFORM(vmulosb, 4, 4),
|
||||
GEN_VXFORM(vmulosh, 4, 5),
|
||||
GEN_VXFORM_207(vmulosw, 4, 6),
|
||||
GEN_VXFORM(vmuleub, 4, 8),
|
||||
GEN_VXFORM(vmuleuh, 4, 9),
|
||||
GEN_VXFORM_207(vmuleuw, 4, 10),
|
||||
GEN_VXFORM(vmulesb, 4, 12),
|
||||
GEN_VXFORM(vmulesh, 4, 13),
|
||||
GEN_VXFORM_207(vmulesw, 4, 14),
|
||||
GEN_VXFORM(vslb, 2, 4),
|
||||
GEN_VXFORM(vslh, 2, 5),
|
||||
GEN_VXFORM_DUAL(vslw, vrlwnm, 2, 6, PPC_ALTIVEC, PPC_NONE),
|
||||
GEN_VXFORM_207(vsld, 2, 23),
|
||||
GEN_VXFORM(vsrb, 2, 8),
|
||||
GEN_VXFORM(vsrh, 2, 9),
|
||||
GEN_VXFORM(vsrw, 2, 10),
|
||||
GEN_VXFORM_207(vsrd, 2, 27),
|
||||
GEN_VXFORM(vsrab, 2, 12),
|
||||
GEN_VXFORM(vsrah, 2, 13),
|
||||
GEN_VXFORM(vsraw, 2, 14),
|
||||
GEN_VXFORM_207(vsrad, 2, 15),
|
||||
GEN_VXFORM_300(vsrv, 2, 28),
|
||||
GEN_VXFORM_300(vslv, 2, 29),
|
||||
GEN_VXFORM(vslo, 6, 16),
|
||||
GEN_VXFORM(vsro, 6, 17),
|
||||
GEN_VXFORM(vaddcuw, 0, 6),
|
||||
GEN_HANDLER_E_2(vprtybw, 0x4, 0x1, 0x18, 8, 0, PPC_NONE, PPC2_ISA300),
|
||||
GEN_HANDLER_E_2(vprtybd, 0x4, 0x1, 0x18, 9, 0, PPC_NONE, PPC2_ISA300),
|
||||
GEN_HANDLER_E_2(vprtybq, 0x4, 0x1, 0x18, 10, 0, PPC_NONE, PPC2_ISA300),
|
||||
|
||||
GEN_VXFORM_DUAL(vsubcuw, xpnd04_1, 0, 22, PPC_ALTIVEC, PPC_NONE),
|
||||
GEN_VXFORM_300(bcdsr, 0, 23),
|
||||
GEN_VXFORM_300(bcdsr, 0, 31),
|
||||
GEN_VXFORM_DUAL(vaddubs, vmul10uq, 0, 8, PPC_ALTIVEC, PPC_NONE),
|
||||
GEN_VXFORM_DUAL(vadduhs, vmul10euq, 0, 9, PPC_ALTIVEC, PPC_NONE),
|
||||
GEN_VXFORM(vadduws, 0, 10),
|
||||
GEN_VXFORM(vaddsbs, 0, 12),
|
||||
GEN_VXFORM_DUAL(vaddshs, bcdcpsgn, 0, 13, PPC_ALTIVEC, PPC_NONE),
|
||||
GEN_VXFORM(vaddsws, 0, 14),
|
||||
GEN_VXFORM_DUAL(vsububs, bcdadd, 0, 24, PPC_ALTIVEC, PPC_NONE),
|
||||
GEN_VXFORM_DUAL(vsubuhs, bcdsub, 0, 25, PPC_ALTIVEC, PPC_NONE),
|
||||
GEN_VXFORM(vsubuws, 0, 26),
|
||||
GEN_VXFORM_DUAL(vsubsbs, bcdtrunc, 0, 28, PPC_ALTIVEC, PPC2_ISA300),
|
||||
GEN_VXFORM(vsubshs, 0, 29),
|
||||
GEN_VXFORM_DUAL(vsubsws, xpnd04_2, 0, 30, PPC_ALTIVEC, PPC_NONE),
|
||||
GEN_VXFORM_207(vadduqm, 0, 4),
|
||||
GEN_VXFORM_207(vaddcuq, 0, 5),
|
||||
GEN_VXFORM_DUAL(vaddeuqm, vaddecuq, 30, 0xFF, PPC_NONE, PPC2_ALTIVEC_207),
|
||||
GEN_VXFORM_DUAL(vsubuqm, bcdtrunc, 0, 20, PPC2_ALTIVEC_207, PPC2_ISA300),
|
||||
GEN_VXFORM_DUAL(vsubcuq, bcdutrunc, 0, 21, PPC2_ALTIVEC_207, PPC2_ISA300),
|
||||
GEN_VXFORM_DUAL(vsubeuqm, vsubecuq, 31, 0xFF, PPC_NONE, PPC2_ALTIVEC_207),
|
||||
GEN_VXFORM(vrlb, 2, 0),
|
||||
GEN_VXFORM(vrlh, 2, 1),
|
||||
GEN_VXFORM_DUAL(vrlw, vrlwmi, 2, 2, PPC_ALTIVEC, PPC_NONE),
|
||||
GEN_VXFORM_DUAL(vrld, vrldmi, 2, 3, PPC_NONE, PPC2_ALTIVEC_207),
|
||||
GEN_VXFORM_DUAL(vsl, vrldnm, 2, 7, PPC_ALTIVEC, PPC_NONE),
|
||||
GEN_VXFORM(vsr, 2, 11),
|
||||
GEN_VXFORM(vpkuhum, 7, 0),
|
||||
GEN_VXFORM(vpkuwum, 7, 1),
|
||||
GEN_VXFORM_207(vpkudum, 7, 17),
|
||||
GEN_VXFORM(vpkuhus, 7, 2),
|
||||
GEN_VXFORM(vpkuwus, 7, 3),
|
||||
GEN_VXFORM_207(vpkudus, 7, 19),
|
||||
GEN_VXFORM(vpkshus, 7, 4),
|
||||
GEN_VXFORM(vpkswus, 7, 5),
|
||||
GEN_VXFORM_207(vpksdus, 7, 21),
|
||||
GEN_VXFORM(vpkshss, 7, 6),
|
||||
GEN_VXFORM(vpkswss, 7, 7),
|
||||
GEN_VXFORM_207(vpksdss, 7, 23),
|
||||
GEN_VXFORM(vpkpx, 7, 12),
|
||||
GEN_VXFORM(vsum4ubs, 4, 24),
|
||||
GEN_VXFORM(vsum4sbs, 4, 28),
|
||||
GEN_VXFORM(vsum4shs, 4, 25),
|
||||
GEN_VXFORM(vsum2sws, 4, 26),
|
||||
GEN_VXFORM(vsumsws, 4, 30),
|
||||
GEN_VXFORM(vaddfp, 5, 0),
|
||||
GEN_VXFORM(vsubfp, 5, 1),
|
||||
GEN_VXFORM(vmaxfp, 5, 16),
|
||||
GEN_VXFORM(vminfp, 5, 17),
|
||||
|
||||
#define GEN_VXRFORM1(opname, name, str, opc2, opc3) \
|
||||
GEN_HANDLER2(name, str, 0x4, opc2, opc3, 0x00000000, PPC_ALTIVEC),
|
||||
#define GEN_VXRFORM1_300(opname, name, str, opc2, opc3) \
|
||||
GEN_HANDLER2_E(name, str, 0x4, opc2, opc3, 0x00000000, PPC_NONE, PPC2_ISA300),
|
||||
#define GEN_VXRFORM(name, opc2, opc3) \
|
||||
GEN_VXRFORM1(name, name, #name, opc2, opc3) \
|
||||
GEN_VXRFORM1(name##_dot, name##_, #name ".", opc2, (opc3 | (0x1 << 4)))
|
||||
#define GEN_VXRFORM_300(name, opc2, opc3) \
|
||||
GEN_VXRFORM1_300(name, name, #name, opc2, opc3) \
|
||||
GEN_VXRFORM1_300(name##_dot, name##_, #name ".", opc2, (opc3 | (0x1 << 4)))
|
||||
|
||||
GEN_VXRFORM_300(vcmpnezb, 3, 4)
|
||||
GEN_VXRFORM_300(vcmpnezh, 3, 5)
|
||||
GEN_VXRFORM_300(vcmpnezw, 3, 6)
|
||||
GEN_VXRFORM(vcmpgtsb, 3, 12)
|
||||
GEN_VXRFORM(vcmpgtsh, 3, 13)
|
||||
GEN_VXRFORM(vcmpgtsw, 3, 14)
|
||||
GEN_VXRFORM(vcmpgtub, 3, 8)
|
||||
GEN_VXRFORM(vcmpgtuh, 3, 9)
|
||||
GEN_VXRFORM(vcmpgtuw, 3, 10)
|
||||
GEN_VXRFORM_DUAL(vcmpeqfp, vcmpequd, 3, 3, PPC_ALTIVEC, PPC_NONE)
|
||||
GEN_VXRFORM(vcmpgefp, 3, 7)
|
||||
GEN_VXRFORM_DUAL(vcmpgtfp, vcmpgtud, 3, 11, PPC_ALTIVEC, PPC_NONE)
|
||||
GEN_VXRFORM_DUAL(vcmpbfp, vcmpgtsd, 3, 15, PPC_ALTIVEC, PPC_NONE)
|
||||
GEN_VXRFORM_DUAL(vcmpequb, vcmpneb, 3, 0, PPC_ALTIVEC, PPC_NONE)
|
||||
GEN_VXRFORM_DUAL(vcmpequh, vcmpneh, 3, 1, PPC_ALTIVEC, PPC_NONE)
|
||||
GEN_VXRFORM_DUAL(vcmpequw, vcmpnew, 3, 2, PPC_ALTIVEC, PPC_NONE)
|
||||
|
||||
#define GEN_VXFORM_DUAL_INV(name0, name1, opc2, opc3, inval0, inval1, type) \
|
||||
GEN_OPCODE_DUAL(name0##_##name1, 0x04, opc2, opc3, inval0, inval1, type, \
|
||||
PPC_NONE)
|
||||
GEN_VXFORM_DUAL_INV(vspltb, vextractub, 6, 8, 0x00000000, 0x100000,
|
||||
PPC_ALTIVEC),
|
||||
GEN_VXFORM_DUAL_INV(vsplth, vextractuh, 6, 9, 0x00000000, 0x100000,
|
||||
PPC_ALTIVEC),
|
||||
GEN_VXFORM_DUAL_INV(vspltw, vextractuw, 6, 10, 0x00000000, 0x100000,
|
||||
PPC_ALTIVEC),
|
||||
GEN_VXFORM_300_EXT(vextractd, 6, 11, 0x100000),
|
||||
GEN_VXFORM_DUAL_INV(vspltisb, vinsertb, 6, 12, 0x00000000, 0x100000,
|
||||
PPC_ALTIVEC),
|
||||
GEN_VXFORM_DUAL_INV(vspltish, vinserth, 6, 13, 0x00000000, 0x100000,
|
||||
PPC_ALTIVEC),
|
||||
GEN_VXFORM_DUAL_INV(vspltisw, vinsertw, 6, 14, 0x00000000, 0x100000,
|
||||
PPC_ALTIVEC),
|
||||
GEN_VXFORM_300_EXT(vinsertd, 6, 15, 0x100000),
|
||||
GEN_VXFORM_300_EO(vnegw, 0x01, 0x18, 0x06),
|
||||
GEN_VXFORM_300_EO(vnegd, 0x01, 0x18, 0x07),
|
||||
GEN_VXFORM_300_EO(vextsb2w, 0x01, 0x18, 0x10),
|
||||
GEN_VXFORM_300_EO(vextsh2w, 0x01, 0x18, 0x11),
|
||||
GEN_VXFORM_300_EO(vextsb2d, 0x01, 0x18, 0x18),
|
||||
GEN_VXFORM_300_EO(vextsh2d, 0x01, 0x18, 0x19),
|
||||
GEN_VXFORM_300_EO(vextsw2d, 0x01, 0x18, 0x1A),
|
||||
GEN_VXFORM_300_EO(vctzb, 0x01, 0x18, 0x1C),
|
||||
GEN_VXFORM_300_EO(vctzh, 0x01, 0x18, 0x1D),
|
||||
GEN_VXFORM_300_EO(vctzw, 0x01, 0x18, 0x1E),
|
||||
GEN_VXFORM_300_EO(vctzd, 0x01, 0x18, 0x1F),
|
||||
GEN_VXFORM_300_EO(vclzlsbb, 0x01, 0x18, 0x0),
|
||||
GEN_VXFORM_300_EO(vctzlsbb, 0x01, 0x18, 0x1),
|
||||
GEN_VXFORM_300(vpermr, 0x1D, 0xFF),
|
||||
|
||||
#define GEN_VXFORM_NOA(name, opc2, opc3) \
|
||||
GEN_HANDLER(name, 0x04, opc2, opc3, 0x001f0000, PPC_ALTIVEC)
|
||||
GEN_VXFORM_NOA(vupkhsb, 7, 8),
|
||||
GEN_VXFORM_NOA(vupkhsh, 7, 9),
|
||||
GEN_VXFORM_207(vupkhsw, 7, 25),
|
||||
GEN_VXFORM_NOA(vupklsb, 7, 10),
|
||||
GEN_VXFORM_NOA(vupklsh, 7, 11),
|
||||
GEN_VXFORM_207(vupklsw, 7, 27),
|
||||
GEN_VXFORM_NOA(vupkhpx, 7, 13),
|
||||
GEN_VXFORM_NOA(vupklpx, 7, 15),
|
||||
GEN_VXFORM_NOA(vrefp, 5, 4),
|
||||
GEN_VXFORM_NOA(vrsqrtefp, 5, 5),
|
||||
GEN_VXFORM_NOA(vexptefp, 5, 6),
|
||||
GEN_VXFORM_NOA(vlogefp, 5, 7),
|
||||
GEN_VXFORM_NOA(vrfim, 5, 11),
|
||||
GEN_VXFORM_NOA(vrfin, 5, 8),
|
||||
GEN_VXFORM_NOA(vrfip, 5, 10),
|
||||
GEN_VXFORM_NOA(vrfiz, 5, 9),
|
||||
|
||||
#define GEN_VXFORM_UIMM(name, opc2, opc3) \
|
||||
GEN_HANDLER(name, 0x04, opc2, opc3, 0x00000000, PPC_ALTIVEC)
|
||||
GEN_VXFORM_UIMM(vcfux, 5, 12),
|
||||
GEN_VXFORM_UIMM(vcfsx, 5, 13),
|
||||
GEN_VXFORM_UIMM(vctuxs, 5, 14),
|
||||
GEN_VXFORM_UIMM(vctsxs, 5, 15),
|
||||
|
||||
|
||||
#define GEN_VAFORM_PAIRED(name0, name1, opc2) \
|
||||
GEN_HANDLER(name0##_##name1, 0x04, opc2, 0xFF, 0x00000000, PPC_ALTIVEC)
|
||||
GEN_VAFORM_PAIRED(vmhaddshs, vmhraddshs, 16),
|
||||
GEN_VAFORM_PAIRED(vmsumubm, vmsummbm, 18),
|
||||
GEN_VAFORM_PAIRED(vmsumuhm, vmsumuhs, 19),
|
||||
GEN_VAFORM_PAIRED(vmsumshm, vmsumshs, 20),
|
||||
GEN_VAFORM_PAIRED(vsel, vperm, 21),
|
||||
GEN_VAFORM_PAIRED(vmaddfp, vnmsubfp, 23),
|
||||
|
||||
GEN_VXFORM_DUAL(vclzb, vpopcntb, 1, 28, PPC_NONE, PPC2_ALTIVEC_207),
|
||||
GEN_VXFORM_DUAL(vclzh, vpopcnth, 1, 29, PPC_NONE, PPC2_ALTIVEC_207),
|
||||
GEN_VXFORM_DUAL(vclzw, vpopcntw, 1, 30, PPC_NONE, PPC2_ALTIVEC_207),
|
||||
GEN_VXFORM_DUAL(vclzd, vpopcntd, 1, 31, PPC_NONE, PPC2_ALTIVEC_207),
|
||||
|
||||
GEN_VXFORM_300(vbpermd, 6, 23),
|
||||
GEN_VXFORM_207(vbpermq, 6, 21),
|
||||
GEN_VXFORM_207(vgbbd, 6, 20),
|
||||
GEN_VXFORM_207(vpmsumb, 4, 16),
|
||||
GEN_VXFORM_207(vpmsumh, 4, 17),
|
||||
GEN_VXFORM_207(vpmsumw, 4, 18),
|
||||
GEN_VXFORM_207(vpmsumd, 4, 19),
|
||||
|
||||
GEN_VXFORM_207(vsbox, 4, 23),
|
||||
|
||||
GEN_VXFORM_DUAL(vcipher, vcipherlast, 4, 20, PPC_NONE, PPC2_ALTIVEC_207),
|
||||
GEN_VXFORM_DUAL(vncipher, vncipherlast, 4, 21, PPC_NONE, PPC2_ALTIVEC_207),
|
||||
|
||||
GEN_VXFORM_207(vshasigmaw, 1, 26),
|
||||
GEN_VXFORM_207(vshasigmad, 1, 27),
|
||||
|
||||
GEN_VXFORM_DUAL(vsldoi, vpermxor, 22, 0xFF, PPC_ALTIVEC, PPC_NONE),
|
||||
2118
qemu/target/ppc/translate/vsx-impl.inc.c
Normal file
2118
qemu/target/ppc/translate/vsx-impl.inc.c
Normal file
File diff suppressed because it is too large
Load Diff
401
qemu/target/ppc/translate/vsx-ops.inc.c
Normal file
401
qemu/target/ppc/translate/vsx-ops.inc.c
Normal file
@@ -0,0 +1,401 @@
|
||||
GEN_HANDLER_E(lxsdx, 0x1F, 0x0C, 0x12, 0, PPC_NONE, PPC2_VSX),
|
||||
GEN_HANDLER_E(lxsiwax, 0x1F, 0x0C, 0x02, 0, PPC_NONE, PPC2_VSX207),
|
||||
GEN_HANDLER_E(lxsiwzx, 0x1F, 0x0C, 0x00, 0, PPC_NONE, PPC2_VSX207),
|
||||
GEN_HANDLER_E(lxsibzx, 0x1F, 0x0D, 0x18, 0, PPC_NONE, PPC2_ISA300),
|
||||
GEN_HANDLER_E(lxsihzx, 0x1F, 0x0D, 0x19, 0, PPC_NONE, PPC2_ISA300),
|
||||
GEN_HANDLER_E(lxsspx, 0x1F, 0x0C, 0x10, 0, PPC_NONE, PPC2_VSX207),
|
||||
GEN_HANDLER_E(lxvd2x, 0x1F, 0x0C, 0x1A, 0, PPC_NONE, PPC2_VSX),
|
||||
GEN_HANDLER_E(lxvdsx, 0x1F, 0x0C, 0x0A, 0, PPC_NONE, PPC2_VSX),
|
||||
GEN_HANDLER_E(lxvw4x, 0x1F, 0x0C, 0x18, 0, PPC_NONE, PPC2_VSX),
|
||||
GEN_HANDLER_E(lxvh8x, 0x1F, 0x0C, 0x19, 0, PPC_NONE, PPC2_ISA300),
|
||||
GEN_HANDLER_E(lxvb16x, 0x1F, 0x0C, 0x1B, 0, PPC_NONE, PPC2_ISA300),
|
||||
GEN_HANDLER_E(lxvx, 0x1F, 0x0C, 0x08, 0x00000040, PPC_NONE, PPC2_ISA300),
|
||||
#if defined(TARGET_PPC64)
|
||||
GEN_HANDLER_E(lxvl, 0x1F, 0x0D, 0x08, 0, PPC_NONE, PPC2_ISA300),
|
||||
GEN_HANDLER_E(lxvll, 0x1F, 0x0D, 0x09, 0, PPC_NONE, PPC2_ISA300),
|
||||
#endif
|
||||
|
||||
GEN_HANDLER_E(stxsdx, 0x1F, 0xC, 0x16, 0, PPC_NONE, PPC2_VSX),
|
||||
GEN_HANDLER_E(stxsibx, 0x1F, 0xD, 0x1C, 0, PPC_NONE, PPC2_ISA300),
|
||||
GEN_HANDLER_E(stxsihx, 0x1F, 0xD, 0x1D, 0, PPC_NONE, PPC2_ISA300),
|
||||
GEN_HANDLER_E(stxsiwx, 0x1F, 0xC, 0x04, 0, PPC_NONE, PPC2_VSX207),
|
||||
GEN_HANDLER_E(stxsspx, 0x1F, 0xC, 0x14, 0, PPC_NONE, PPC2_VSX207),
|
||||
GEN_HANDLER_E(stxvd2x, 0x1F, 0xC, 0x1E, 0, PPC_NONE, PPC2_VSX),
|
||||
GEN_HANDLER_E(stxvw4x, 0x1F, 0xC, 0x1C, 0, PPC_NONE, PPC2_VSX),
|
||||
GEN_HANDLER_E(stxvh8x, 0x1F, 0x0C, 0x1D, 0, PPC_NONE, PPC2_ISA300),
|
||||
GEN_HANDLER_E(stxvb16x, 0x1F, 0x0C, 0x1F, 0, PPC_NONE, PPC2_ISA300),
|
||||
GEN_HANDLER_E(stxvx, 0x1F, 0x0C, 0x0C, 0, PPC_NONE, PPC2_ISA300),
|
||||
#if defined(TARGET_PPC64)
|
||||
GEN_HANDLER_E(stxvl, 0x1F, 0x0D, 0x0C, 0, PPC_NONE, PPC2_ISA300),
|
||||
GEN_HANDLER_E(stxvll, 0x1F, 0x0D, 0x0D, 0, PPC_NONE, PPC2_ISA300),
|
||||
#endif
|
||||
|
||||
GEN_HANDLER_E(mfvsrwz, 0x1F, 0x13, 0x03, 0x0000F800, PPC_NONE, PPC2_VSX207),
|
||||
GEN_HANDLER_E(mtvsrwa, 0x1F, 0x13, 0x06, 0x0000F800, PPC_NONE, PPC2_VSX207),
|
||||
GEN_HANDLER_E(mtvsrwz, 0x1F, 0x13, 0x07, 0x0000F800, PPC_NONE, PPC2_VSX207),
|
||||
#if defined(TARGET_PPC64)
|
||||
GEN_HANDLER_E(mfvsrd, 0x1F, 0x13, 0x01, 0x0000F800, PPC_NONE, PPC2_VSX207),
|
||||
GEN_HANDLER_E(mtvsrd, 0x1F, 0x13, 0x05, 0x0000F800, PPC_NONE, PPC2_VSX207),
|
||||
GEN_HANDLER_E(mfvsrld, 0X1F, 0x13, 0x09, 0x0000F800, PPC_NONE, PPC2_ISA300),
|
||||
GEN_HANDLER_E(mtvsrdd, 0X1F, 0x13, 0x0D, 0x0, PPC_NONE, PPC2_ISA300),
|
||||
GEN_HANDLER_E(mtvsrws, 0x1F, 0x13, 0x0C, 0x0000F800, PPC_NONE, PPC2_ISA300),
|
||||
#endif
|
||||
|
||||
#define GEN_XX1FORM(name, opc2, opc3, fl2) \
|
||||
GEN_HANDLER2_E(name, #name, 0x3C, opc2 | 0, opc3, 0, PPC_NONE, fl2), \
|
||||
GEN_HANDLER2_E(name, #name, 0x3C, opc2 | 1, opc3, 0, PPC_NONE, fl2)
|
||||
|
||||
#define GEN_XX2FORM(name, opc2, opc3, fl2) \
|
||||
GEN_HANDLER2_E(name, #name, 0x3C, opc2 | 0, opc3, 0, PPC_NONE, fl2), \
|
||||
GEN_HANDLER2_E(name, #name, 0x3C, opc2 | 1, opc3, 0, PPC_NONE, fl2)
|
||||
|
||||
#define GEN_XX2FORM_EXT(name, opc2, opc3, fl2) \
|
||||
GEN_HANDLER2_E(name, #name, 0x3C, opc2 | 0, opc3, 0x00100000, PPC_NONE, fl2), \
|
||||
GEN_HANDLER2_E(name, #name, 0x3C, opc2 | 1, opc3, 0x00100000, PPC_NONE, fl2)
|
||||
|
||||
#define GEN_XX2FORM_EO(name, opc2, opc3, opc4, fl2) \
|
||||
GEN_HANDLER2_E_2(name, #name, 0x3C, opc2 | 0, opc3, opc4, 0, PPC_NONE, fl2), \
|
||||
GEN_HANDLER2_E_2(name, #name, 0x3C, opc2 | 1, opc3, opc4, 0, PPC_NONE, fl2)
|
||||
|
||||
#define GEN_XX3FORM(name, opc2, opc3, fl2) \
|
||||
GEN_HANDLER2_E(name, #name, 0x3C, opc2 | 0, opc3, 0, PPC_NONE, fl2), \
|
||||
GEN_HANDLER2_E(name, #name, 0x3C, opc2 | 1, opc3, 0, PPC_NONE, fl2), \
|
||||
GEN_HANDLER2_E(name, #name, 0x3C, opc2 | 2, opc3, 0, PPC_NONE, fl2), \
|
||||
GEN_HANDLER2_E(name, #name, 0x3C, opc2 | 3, opc3, 0, PPC_NONE, fl2)
|
||||
|
||||
#define GEN_XX3FORM_NAME(name, opcname, opc2, opc3, fl2) \
|
||||
GEN_HANDLER2_E(name, opcname, 0x3C, opc2 | 0, opc3, 0, PPC_NONE, fl2), \
|
||||
GEN_HANDLER2_E(name, opcname, 0x3C, opc2 | 1, opc3, 0, PPC_NONE, fl2), \
|
||||
GEN_HANDLER2_E(name, opcname, 0x3C, opc2 | 2, opc3, 0, PPC_NONE, fl2), \
|
||||
GEN_HANDLER2_E(name, opcname, 0x3C, opc2 | 3, opc3, 0, PPC_NONE, fl2)
|
||||
|
||||
#define GEN_XX2IFORM(name, opc2, opc3, fl2) \
|
||||
GEN_HANDLER2_E(name, #name, 0x3C, opc2 | 0, opc3, 1, PPC_NONE, fl2), \
|
||||
GEN_HANDLER2_E(name, #name, 0x3C, opc2 | 1, opc3, 1, PPC_NONE, fl2), \
|
||||
GEN_HANDLER2_E(name, #name, 0x3C, opc2 | 2, opc3, 1, PPC_NONE, fl2), \
|
||||
GEN_HANDLER2_E(name, #name, 0x3C, opc2 | 3, opc3, 1, PPC_NONE, fl2)
|
||||
|
||||
#define GEN_XX3_RC_FORM(name, opc2, opc3, fl2) \
|
||||
GEN_HANDLER2_E(name, #name, 0x3C, opc2 | 0x00, opc3 | 0x00, 0, PPC_NONE, fl2), \
|
||||
GEN_HANDLER2_E(name, #name, 0x3C, opc2 | 0x01, opc3 | 0x00, 0, PPC_NONE, fl2), \
|
||||
GEN_HANDLER2_E(name, #name, 0x3C, opc2 | 0x02, opc3 | 0x00, 0, PPC_NONE, fl2), \
|
||||
GEN_HANDLER2_E(name, #name, 0x3C, opc2 | 0x03, opc3 | 0x00, 0, PPC_NONE, fl2), \
|
||||
GEN_HANDLER2_E(name, #name, 0x3C, opc2 | 0x00, opc3 | 0x10, 0, PPC_NONE, fl2), \
|
||||
GEN_HANDLER2_E(name, #name, 0x3C, opc2 | 0x01, opc3 | 0x10, 0, PPC_NONE, fl2), \
|
||||
GEN_HANDLER2_E(name, #name, 0x3C, opc2 | 0x02, opc3 | 0x10, 0, PPC_NONE, fl2), \
|
||||
GEN_HANDLER2_E(name, #name, 0x3C, opc2 | 0x03, opc3 | 0x10, 0, PPC_NONE, fl2)
|
||||
|
||||
#define GEN_XX3FORM_DM(name, opc2, opc3) \
|
||||
GEN_HANDLER2_E(name, #name, 0x3C, opc2|0x00, opc3|0x00, 0, PPC_NONE, PPC2_VSX),\
|
||||
GEN_HANDLER2_E(name, #name, 0x3C, opc2|0x01, opc3|0x00, 0, PPC_NONE, PPC2_VSX),\
|
||||
GEN_HANDLER2_E(name, #name, 0x3C, opc2|0x02, opc3|0x00, 0, PPC_NONE, PPC2_VSX),\
|
||||
GEN_HANDLER2_E(name, #name, 0x3C, opc2|0x03, opc3|0x00, 0, PPC_NONE, PPC2_VSX),\
|
||||
GEN_HANDLER2_E(name, #name, 0x3C, opc2|0x00, opc3|0x04, 0, PPC_NONE, PPC2_VSX),\
|
||||
GEN_HANDLER2_E(name, #name, 0x3C, opc2|0x01, opc3|0x04, 0, PPC_NONE, PPC2_VSX),\
|
||||
GEN_HANDLER2_E(name, #name, 0x3C, opc2|0x02, opc3|0x04, 0, PPC_NONE, PPC2_VSX),\
|
||||
GEN_HANDLER2_E(name, #name, 0x3C, opc2|0x03, opc3|0x04, 0, PPC_NONE, PPC2_VSX),\
|
||||
GEN_HANDLER2_E(name, #name, 0x3C, opc2|0x00, opc3|0x08, 0, PPC_NONE, PPC2_VSX),\
|
||||
GEN_HANDLER2_E(name, #name, 0x3C, opc2|0x01, opc3|0x08, 0, PPC_NONE, PPC2_VSX),\
|
||||
GEN_HANDLER2_E(name, #name, 0x3C, opc2|0x02, opc3|0x08, 0, PPC_NONE, PPC2_VSX),\
|
||||
GEN_HANDLER2_E(name, #name, 0x3C, opc2|0x03, opc3|0x08, 0, PPC_NONE, PPC2_VSX),\
|
||||
GEN_HANDLER2_E(name, #name, 0x3C, opc2|0x00, opc3|0x0C, 0, PPC_NONE, PPC2_VSX),\
|
||||
GEN_HANDLER2_E(name, #name, 0x3C, opc2|0x01, opc3|0x0C, 0, PPC_NONE, PPC2_VSX),\
|
||||
GEN_HANDLER2_E(name, #name, 0x3C, opc2|0x02, opc3|0x0C, 0, PPC_NONE, PPC2_VSX),\
|
||||
GEN_HANDLER2_E(name, #name, 0x3C, opc2|0x03, opc3|0x0C, 0, PPC_NONE, PPC2_VSX)
|
||||
|
||||
#define GEN_VSX_XFORM_300(name, opc2, opc3, inval) \
|
||||
GEN_HANDLER_E(name, 0x3F, opc2, opc3, inval, PPC_NONE, PPC2_ISA300)
|
||||
|
||||
#define GEN_VSX_XFORM_300_EO(name, opc2, opc3, opc4, inval) \
|
||||
GEN_HANDLER_E_2(name, 0x3F, opc2, opc3, opc4, inval, PPC_NONE, PPC2_ISA300)
|
||||
|
||||
#define GEN_VSX_Z23FORM_300(name, opc2, opc3, opc4, inval) \
|
||||
GEN_VSX_XFORM_300_EO(name, opc2, opc3 | 0x00, opc4 | 0x0, inval), \
|
||||
GEN_VSX_XFORM_300_EO(name, opc2, opc3 | 0x08, opc4 | 0x0, inval), \
|
||||
GEN_VSX_XFORM_300_EO(name, opc2, opc3 | 0x10, opc4 | 0x0, inval), \
|
||||
GEN_VSX_XFORM_300_EO(name, opc2, opc3 | 0x18, opc4 | 0x0, inval), \
|
||||
GEN_VSX_XFORM_300_EO(name, opc2, opc3 | 0x00, opc4 | 0x1, inval), \
|
||||
GEN_VSX_XFORM_300_EO(name, opc2, opc3 | 0x08, opc4 | 0x1, inval), \
|
||||
GEN_VSX_XFORM_300_EO(name, opc2, opc3 | 0x10, opc4 | 0x1, inval), \
|
||||
GEN_VSX_XFORM_300_EO(name, opc2, opc3 | 0x18, opc4 | 0x1, inval)
|
||||
|
||||
GEN_VSX_Z23FORM_300(xsrqpi, 0x05, 0x0, 0x0, 0x0),
|
||||
GEN_VSX_Z23FORM_300(xsrqpxp, 0x05, 0x1, 0x0, 0x0),
|
||||
GEN_VSX_XFORM_300_EO(xssqrtqp, 0x04, 0x19, 0x1B, 0x0),
|
||||
GEN_VSX_XFORM_300(xssubqp, 0x04, 0x10, 0x0),
|
||||
|
||||
GEN_XX2FORM(xsabsdp, 0x12, 0x15, PPC2_VSX),
|
||||
GEN_XX2FORM(xsnabsdp, 0x12, 0x16, PPC2_VSX),
|
||||
GEN_XX2FORM(xsnegdp, 0x12, 0x17, PPC2_VSX),
|
||||
GEN_XX3FORM(xscpsgndp, 0x00, 0x16, PPC2_VSX),
|
||||
|
||||
GEN_VSX_XFORM_300_EO(xsabsqp, 0x04, 0x19, 0x00, 0x00000001),
|
||||
GEN_VSX_XFORM_300_EO(xsnabsqp, 0x04, 0x19, 0x08, 0x00000001),
|
||||
GEN_VSX_XFORM_300_EO(xsnegqp, 0x04, 0x19, 0x10, 0x00000001),
|
||||
GEN_VSX_XFORM_300(xscpsgnqp, 0x04, 0x03, 0x00000001),
|
||||
GEN_VSX_XFORM_300_EO(xscvdpqp, 0x04, 0x1A, 0x16, 0x00000001),
|
||||
GEN_VSX_XFORM_300_EO(xscvqpdp, 0x04, 0x1A, 0x14, 0x0),
|
||||
GEN_VSX_XFORM_300_EO(xscvqpsdz, 0x04, 0x1A, 0x19, 0x00000001),
|
||||
GEN_VSX_XFORM_300_EO(xscvqpswz, 0x04, 0x1A, 0x09, 0x00000001),
|
||||
GEN_VSX_XFORM_300_EO(xscvqpudz, 0x04, 0x1A, 0x11, 0x00000001),
|
||||
GEN_VSX_XFORM_300_EO(xscvqpuwz, 0x04, 0x1A, 0x01, 0x00000001),
|
||||
|
||||
#ifdef TARGET_PPC64
|
||||
GEN_XX2FORM_EO(xsxexpdp, 0x16, 0x15, 0x00, PPC2_ISA300),
|
||||
GEN_VSX_XFORM_300_EO(xsxexpqp, 0x04, 0x19, 0x02, 0x00000001),
|
||||
GEN_XX2FORM_EO(xsxsigdp, 0x16, 0x15, 0x01, PPC2_ISA300),
|
||||
GEN_VSX_XFORM_300_EO(xsxsigqp, 0x04, 0x19, 0x12, 0x00000001),
|
||||
GEN_HANDLER_E(xsiexpdp, 0x3C, 0x16, 0x1C, 0, PPC_NONE, PPC2_ISA300),
|
||||
GEN_VSX_XFORM_300(xsiexpqp, 0x4, 0x1B, 0x00000001),
|
||||
#endif
|
||||
|
||||
GEN_XX2FORM(xststdcdp, 0x14, 0x16, PPC2_ISA300),
|
||||
GEN_XX2FORM(xststdcsp, 0x14, 0x12, PPC2_ISA300),
|
||||
GEN_VSX_XFORM_300(xststdcqp, 0x04, 0x16, 0x00000001),
|
||||
|
||||
GEN_XX3FORM(xviexpsp, 0x00, 0x1B, PPC2_ISA300),
|
||||
GEN_XX3FORM(xviexpdp, 0x00, 0x1F, PPC2_ISA300),
|
||||
GEN_XX2FORM_EO(xvxexpdp, 0x16, 0x1D, 0x00, PPC2_ISA300),
|
||||
GEN_XX2FORM_EO(xvxsigdp, 0x16, 0x1D, 0x01, PPC2_ISA300),
|
||||
GEN_XX2FORM_EO(xvxexpsp, 0x16, 0x1D, 0x08, PPC2_ISA300),
|
||||
GEN_XX2FORM_EO(xvxsigsp, 0x16, 0x1D, 0x09, PPC2_ISA300),
|
||||
|
||||
/* DCMX = bit[25] << 6 | bit[29] << 5 | bit[11:15] */
|
||||
#define GEN_XX2FORM_DCMX(name, opc2, opc3, fl2) \
|
||||
GEN_XX3FORM(name, opc2, opc3 | 0, fl2), \
|
||||
GEN_XX3FORM(name, opc2, opc3 | 1, fl2)
|
||||
|
||||
GEN_XX2FORM_DCMX(xvtstdcdp, 0x14, 0x1E, PPC2_ISA300),
|
||||
GEN_XX2FORM_DCMX(xvtstdcsp, 0x14, 0x1A, PPC2_ISA300),
|
||||
|
||||
GEN_XX2FORM(xvabsdp, 0x12, 0x1D, PPC2_VSX),
|
||||
GEN_XX2FORM(xvnabsdp, 0x12, 0x1E, PPC2_VSX),
|
||||
GEN_XX2FORM(xvnegdp, 0x12, 0x1F, PPC2_VSX),
|
||||
GEN_XX3FORM(xvcpsgndp, 0x00, 0x1E, PPC2_VSX),
|
||||
GEN_XX2FORM(xvabssp, 0x12, 0x19, PPC2_VSX),
|
||||
GEN_XX2FORM(xvnabssp, 0x12, 0x1A, PPC2_VSX),
|
||||
GEN_XX2FORM(xvnegsp, 0x12, 0x1B, PPC2_VSX),
|
||||
GEN_XX3FORM(xvcpsgnsp, 0x00, 0x1A, PPC2_VSX),
|
||||
|
||||
GEN_XX3FORM(xsadddp, 0x00, 0x04, PPC2_VSX),
|
||||
GEN_VSX_XFORM_300(xsaddqp, 0x04, 0x00, 0x0),
|
||||
GEN_XX3FORM(xssubdp, 0x00, 0x05, PPC2_VSX),
|
||||
GEN_XX3FORM(xsmuldp, 0x00, 0x06, PPC2_VSX),
|
||||
GEN_VSX_XFORM_300(xsmulqp, 0x04, 0x01, 0x0),
|
||||
GEN_XX3FORM(xsdivdp, 0x00, 0x07, PPC2_VSX),
|
||||
GEN_XX2FORM(xsredp, 0x14, 0x05, PPC2_VSX),
|
||||
GEN_XX2FORM(xssqrtdp, 0x16, 0x04, PPC2_VSX),
|
||||
GEN_XX2FORM(xsrsqrtedp, 0x14, 0x04, PPC2_VSX),
|
||||
GEN_XX3FORM(xstdivdp, 0x14, 0x07, PPC2_VSX),
|
||||
GEN_XX2FORM(xstsqrtdp, 0x14, 0x06, PPC2_VSX),
|
||||
GEN_XX3FORM_NAME(xsmadddp, "xsmaddadp", 0x04, 0x04, PPC2_VSX),
|
||||
GEN_XX3FORM_NAME(xsmadddp, "xsmaddmdp", 0x04, 0x05, PPC2_VSX),
|
||||
GEN_XX3FORM_NAME(xsmsubdp, "xsmsubadp", 0x04, 0x06, PPC2_VSX),
|
||||
GEN_XX3FORM_NAME(xsmsubdp, "xsmsubmdp", 0x04, 0x07, PPC2_VSX),
|
||||
GEN_XX3FORM_NAME(xsnmadddp, "xsnmaddadp", 0x04, 0x14, PPC2_VSX),
|
||||
GEN_XX3FORM_NAME(xsnmadddp, "xsnmaddmdp", 0x04, 0x15, PPC2_VSX),
|
||||
GEN_XX3FORM_NAME(xsnmsubdp, "xsnmsubadp", 0x04, 0x16, PPC2_VSX),
|
||||
GEN_XX3FORM_NAME(xsnmsubdp, "xsnmsubmdp", 0x04, 0x17, PPC2_VSX),
|
||||
GEN_XX3FORM(xscmpeqdp, 0x0C, 0x00, PPC2_ISA300),
|
||||
GEN_XX3FORM(xscmpgtdp, 0x0C, 0x01, PPC2_ISA300),
|
||||
GEN_XX3FORM(xscmpgedp, 0x0C, 0x02, PPC2_ISA300),
|
||||
GEN_XX3FORM(xscmpnedp, 0x0C, 0x03, PPC2_ISA300),
|
||||
GEN_XX3FORM(xscmpexpdp, 0x0C, 0x07, PPC2_ISA300),
|
||||
GEN_VSX_XFORM_300(xscmpexpqp, 0x04, 0x05, 0x00600001),
|
||||
GEN_XX2IFORM(xscmpodp, 0x0C, 0x05, PPC2_VSX),
|
||||
GEN_XX2IFORM(xscmpudp, 0x0C, 0x04, PPC2_VSX),
|
||||
GEN_VSX_XFORM_300(xscmpoqp, 0x04, 0x04, 0x00600001),
|
||||
GEN_VSX_XFORM_300(xscmpuqp, 0x04, 0x14, 0x00600001),
|
||||
GEN_XX3FORM(xsmaxdp, 0x00, 0x14, PPC2_VSX),
|
||||
GEN_XX3FORM(xsmindp, 0x00, 0x15, PPC2_VSX),
|
||||
GEN_XX3FORM(xsmaxcdp, 0x00, 0x10, PPC2_ISA300),
|
||||
GEN_XX3FORM(xsmincdp, 0x00, 0x11, PPC2_ISA300),
|
||||
GEN_XX3FORM(xsmaxjdp, 0x00, 0x12, PPC2_ISA300),
|
||||
GEN_XX3FORM(xsminjdp, 0x00, 0x13, PPC2_ISA300),
|
||||
GEN_XX2FORM_EO(xscvdphp, 0x16, 0x15, 0x11, PPC2_ISA300),
|
||||
GEN_XX2FORM(xscvdpsp, 0x12, 0x10, PPC2_VSX),
|
||||
GEN_XX2FORM(xscvdpspn, 0x16, 0x10, PPC2_VSX207),
|
||||
GEN_XX2FORM_EO(xscvhpdp, 0x16, 0x15, 0x10, PPC2_ISA300),
|
||||
GEN_VSX_XFORM_300_EO(xscvsdqp, 0x04, 0x1A, 0x0A, 0x00000001),
|
||||
GEN_XX2FORM(xscvspdp, 0x12, 0x14, PPC2_VSX),
|
||||
GEN_XX2FORM(xscvspdpn, 0x16, 0x14, PPC2_VSX207),
|
||||
GEN_XX2FORM(xscvdpsxds, 0x10, 0x15, PPC2_VSX),
|
||||
GEN_XX2FORM(xscvdpsxws, 0x10, 0x05, PPC2_VSX),
|
||||
GEN_XX2FORM(xscvdpuxds, 0x10, 0x14, PPC2_VSX),
|
||||
GEN_XX2FORM(xscvdpuxws, 0x10, 0x04, PPC2_VSX),
|
||||
GEN_XX2FORM(xscvsxddp, 0x10, 0x17, PPC2_VSX),
|
||||
GEN_VSX_XFORM_300_EO(xscvudqp, 0x04, 0x1A, 0x02, 0x00000001),
|
||||
GEN_XX2FORM(xscvuxddp, 0x10, 0x16, PPC2_VSX),
|
||||
GEN_XX2FORM(xsrdpi, 0x12, 0x04, PPC2_VSX),
|
||||
GEN_XX2FORM(xsrdpic, 0x16, 0x06, PPC2_VSX),
|
||||
GEN_XX2FORM(xsrdpim, 0x12, 0x07, PPC2_VSX),
|
||||
GEN_XX2FORM(xsrdpip, 0x12, 0x06, PPC2_VSX),
|
||||
GEN_XX2FORM(xsrdpiz, 0x12, 0x05, PPC2_VSX),
|
||||
|
||||
GEN_XX3FORM(xsaddsp, 0x00, 0x00, PPC2_VSX207),
|
||||
GEN_XX3FORM(xssubsp, 0x00, 0x01, PPC2_VSX207),
|
||||
GEN_XX3FORM(xsmulsp, 0x00, 0x02, PPC2_VSX207),
|
||||
GEN_XX3FORM(xsdivsp, 0x00, 0x03, PPC2_VSX207),
|
||||
GEN_VSX_XFORM_300(xsdivqp, 0x04, 0x11, 0x0),
|
||||
GEN_XX2FORM(xsresp, 0x14, 0x01, PPC2_VSX207),
|
||||
GEN_XX2FORM(xsrsp, 0x12, 0x11, PPC2_VSX207),
|
||||
GEN_XX2FORM(xssqrtsp, 0x16, 0x00, PPC2_VSX207),
|
||||
GEN_XX2FORM(xsrsqrtesp, 0x14, 0x00, PPC2_VSX207),
|
||||
GEN_XX3FORM_NAME(xsmaddsp, "xsmaddasp", 0x04, 0x00, PPC2_VSX207),
|
||||
GEN_XX3FORM_NAME(xsmaddsp, "xsmaddmsp", 0x04, 0x01, PPC2_VSX207),
|
||||
GEN_XX3FORM_NAME(xsmsubsp, "xsmsubasp", 0x04, 0x02, PPC2_VSX207),
|
||||
GEN_XX3FORM_NAME(xsmsubsp, "xsmsubmsp", 0x04, 0x03, PPC2_VSX207),
|
||||
GEN_XX3FORM_NAME(xsnmaddsp, "xsnmaddasp", 0x04, 0x10, PPC2_VSX207),
|
||||
GEN_XX3FORM_NAME(xsnmaddsp, "xsnmaddmsp", 0x04, 0x11, PPC2_VSX207),
|
||||
GEN_XX3FORM_NAME(xsnmsubsp, "xsnmsubasp", 0x04, 0x12, PPC2_VSX207),
|
||||
GEN_XX3FORM_NAME(xsnmsubsp, "xsnmsubmsp", 0x04, 0x13, PPC2_VSX207),
|
||||
GEN_XX2FORM(xscvsxdsp, 0x10, 0x13, PPC2_VSX207),
|
||||
GEN_XX2FORM(xscvuxdsp, 0x10, 0x12, PPC2_VSX207),
|
||||
|
||||
GEN_XX3FORM(xvadddp, 0x00, 0x0C, PPC2_VSX),
|
||||
GEN_XX3FORM(xvsubdp, 0x00, 0x0D, PPC2_VSX),
|
||||
GEN_XX3FORM(xvmuldp, 0x00, 0x0E, PPC2_VSX),
|
||||
GEN_XX3FORM(xvdivdp, 0x00, 0x0F, PPC2_VSX),
|
||||
GEN_XX2FORM(xvredp, 0x14, 0x0D, PPC2_VSX),
|
||||
GEN_XX2FORM(xvsqrtdp, 0x16, 0x0C, PPC2_VSX),
|
||||
GEN_XX2FORM(xvrsqrtedp, 0x14, 0x0C, PPC2_VSX),
|
||||
GEN_XX3FORM(xvtdivdp, 0x14, 0x0F, PPC2_VSX),
|
||||
GEN_XX2FORM(xvtsqrtdp, 0x14, 0x0E, PPC2_VSX),
|
||||
GEN_XX3FORM_NAME(xvmadddp, "xvmaddadp", 0x04, 0x0C, PPC2_VSX),
|
||||
GEN_XX3FORM_NAME(xvmadddp, "xvmaddmdp", 0x04, 0x0D, PPC2_VSX),
|
||||
GEN_XX3FORM_NAME(xvmsubdp, "xvmsubadp", 0x04, 0x0E, PPC2_VSX),
|
||||
GEN_XX3FORM_NAME(xvmsubdp, "xvmsubmdp", 0x04, 0x0F, PPC2_VSX),
|
||||
GEN_XX3FORM_NAME(xvnmadddp, "xvnmaddadp", 0x04, 0x1C, PPC2_VSX),
|
||||
GEN_XX3FORM_NAME(xvnmadddp, "xvnmaddmdp", 0x04, 0x1D, PPC2_VSX),
|
||||
GEN_XX3FORM_NAME(xvnmsubdp, "xvnmsubadp", 0x04, 0x1E, PPC2_VSX),
|
||||
GEN_XX3FORM_NAME(xvnmsubdp, "xvnmsubmdp", 0x04, 0x1F, PPC2_VSX),
|
||||
GEN_XX3FORM(xvmaxdp, 0x00, 0x1C, PPC2_VSX),
|
||||
GEN_XX3FORM(xvmindp, 0x00, 0x1D, PPC2_VSX),
|
||||
GEN_XX3_RC_FORM(xvcmpeqdp, 0x0C, 0x0C, PPC2_VSX),
|
||||
GEN_XX3_RC_FORM(xvcmpgtdp, 0x0C, 0x0D, PPC2_VSX),
|
||||
GEN_XX3_RC_FORM(xvcmpgedp, 0x0C, 0x0E, PPC2_VSX),
|
||||
GEN_XX3_RC_FORM(xvcmpnedp, 0x0C, 0x0F, PPC2_ISA300),
|
||||
GEN_XX2FORM(xvcvdpsp, 0x12, 0x18, PPC2_VSX),
|
||||
GEN_XX2FORM(xvcvdpsxds, 0x10, 0x1D, PPC2_VSX),
|
||||
GEN_XX2FORM(xvcvdpsxws, 0x10, 0x0D, PPC2_VSX),
|
||||
GEN_XX2FORM(xvcvdpuxds, 0x10, 0x1C, PPC2_VSX),
|
||||
GEN_XX2FORM(xvcvdpuxws, 0x10, 0x0C, PPC2_VSX),
|
||||
GEN_XX2FORM(xvcvsxddp, 0x10, 0x1F, PPC2_VSX),
|
||||
GEN_XX2FORM(xvcvuxddp, 0x10, 0x1E, PPC2_VSX),
|
||||
GEN_XX2FORM(xvcvsxwdp, 0x10, 0x0F, PPC2_VSX),
|
||||
GEN_XX2FORM(xvcvuxwdp, 0x10, 0x0E, PPC2_VSX),
|
||||
GEN_XX2FORM(xvrdpi, 0x12, 0x0C, PPC2_VSX),
|
||||
GEN_XX2FORM(xvrdpic, 0x16, 0x0E, PPC2_VSX),
|
||||
GEN_XX2FORM(xvrdpim, 0x12, 0x0F, PPC2_VSX),
|
||||
GEN_XX2FORM(xvrdpip, 0x12, 0x0E, PPC2_VSX),
|
||||
GEN_XX2FORM(xvrdpiz, 0x12, 0x0D, PPC2_VSX),
|
||||
|
||||
GEN_XX3FORM(xvaddsp, 0x00, 0x08, PPC2_VSX),
|
||||
GEN_XX3FORM(xvsubsp, 0x00, 0x09, PPC2_VSX),
|
||||
GEN_XX3FORM(xvmulsp, 0x00, 0x0A, PPC2_VSX),
|
||||
GEN_XX3FORM(xvdivsp, 0x00, 0x0B, PPC2_VSX),
|
||||
GEN_XX2FORM(xvresp, 0x14, 0x09, PPC2_VSX),
|
||||
GEN_XX2FORM(xvsqrtsp, 0x16, 0x08, PPC2_VSX),
|
||||
GEN_XX2FORM(xvrsqrtesp, 0x14, 0x08, PPC2_VSX),
|
||||
GEN_XX3FORM(xvtdivsp, 0x14, 0x0B, PPC2_VSX),
|
||||
GEN_XX2FORM(xvtsqrtsp, 0x14, 0x0A, PPC2_VSX),
|
||||
GEN_XX3FORM_NAME(xvmaddsp, "xvmaddasp", 0x04, 0x08, PPC2_VSX),
|
||||
GEN_XX3FORM_NAME(xvmaddsp, "xvmaddmsp", 0x04, 0x09, PPC2_VSX),
|
||||
GEN_XX3FORM_NAME(xvmsubsp, "xvmsubasp", 0x04, 0x0A, PPC2_VSX),
|
||||
GEN_XX3FORM_NAME(xvmsubsp, "xvmsubmsp", 0x04, 0x0B, PPC2_VSX),
|
||||
GEN_XX3FORM_NAME(xvnmaddsp, "xvnmaddasp", 0x04, 0x18, PPC2_VSX),
|
||||
GEN_XX3FORM_NAME(xvnmaddsp, "xvnmaddmsp", 0x04, 0x19, PPC2_VSX),
|
||||
GEN_XX3FORM_NAME(xvnmsubsp, "xvnmsubasp", 0x04, 0x1A, PPC2_VSX),
|
||||
GEN_XX3FORM_NAME(xvnmsubsp, "xvnmsubmsp", 0x04, 0x1B, PPC2_VSX),
|
||||
GEN_XX3FORM(xvmaxsp, 0x00, 0x18, PPC2_VSX),
|
||||
GEN_XX3FORM(xvminsp, 0x00, 0x19, PPC2_VSX),
|
||||
GEN_XX3_RC_FORM(xvcmpeqsp, 0x0C, 0x08, PPC2_VSX),
|
||||
GEN_XX3_RC_FORM(xvcmpgtsp, 0x0C, 0x09, PPC2_VSX),
|
||||
GEN_XX3_RC_FORM(xvcmpgesp, 0x0C, 0x0A, PPC2_VSX),
|
||||
GEN_XX3_RC_FORM(xvcmpnesp, 0x0C, 0x0B, PPC2_ISA300),
|
||||
GEN_XX2FORM(xvcvspdp, 0x12, 0x1C, PPC2_VSX),
|
||||
GEN_XX2FORM(xvcvspsxds, 0x10, 0x19, PPC2_VSX),
|
||||
GEN_XX2FORM(xvcvspsxws, 0x10, 0x09, PPC2_VSX),
|
||||
GEN_XX2FORM(xvcvspuxds, 0x10, 0x18, PPC2_VSX),
|
||||
GEN_XX2FORM(xvcvspuxws, 0x10, 0x08, PPC2_VSX),
|
||||
GEN_XX2FORM(xvcvsxdsp, 0x10, 0x1B, PPC2_VSX),
|
||||
GEN_XX2FORM(xvcvuxdsp, 0x10, 0x1A, PPC2_VSX),
|
||||
GEN_XX2FORM(xvcvsxwsp, 0x10, 0x0B, PPC2_VSX),
|
||||
GEN_XX2FORM(xvcvuxwsp, 0x10, 0x0A, PPC2_VSX),
|
||||
GEN_XX2FORM(xvrspi, 0x12, 0x08, PPC2_VSX),
|
||||
GEN_XX2FORM(xvrspic, 0x16, 0x0A, PPC2_VSX),
|
||||
GEN_XX2FORM(xvrspim, 0x12, 0x0B, PPC2_VSX),
|
||||
GEN_XX2FORM(xvrspip, 0x12, 0x0A, PPC2_VSX),
|
||||
GEN_XX2FORM(xvrspiz, 0x12, 0x09, PPC2_VSX),
|
||||
GEN_XX2FORM_EO(xxbrh, 0x16, 0x1D, 0x07, PPC2_ISA300),
|
||||
GEN_XX2FORM_EO(xxbrw, 0x16, 0x1D, 0x0F, PPC2_ISA300),
|
||||
GEN_XX2FORM_EO(xxbrd, 0x16, 0x1D, 0x17, PPC2_ISA300),
|
||||
GEN_XX2FORM_EO(xvcvhpsp, 0x16, 0x1D, 0x18, PPC2_ISA300),
|
||||
GEN_XX2FORM_EO(xvcvsphp, 0x16, 0x1D, 0x19, PPC2_ISA300),
|
||||
GEN_XX2FORM_EO(xxbrq, 0x16, 0x1D, 0x1F, PPC2_ISA300),
|
||||
|
||||
#define VSX_LOGICAL(name, opc2, opc3, fl2) \
|
||||
GEN_XX3FORM(name, opc2, opc3, fl2)
|
||||
|
||||
VSX_LOGICAL(xxland, 0x8, 0x10, PPC2_VSX),
|
||||
VSX_LOGICAL(xxlandc, 0x8, 0x11, PPC2_VSX),
|
||||
VSX_LOGICAL(xxlor, 0x8, 0x12, PPC2_VSX),
|
||||
VSX_LOGICAL(xxlxor, 0x8, 0x13, PPC2_VSX),
|
||||
VSX_LOGICAL(xxlnor, 0x8, 0x14, PPC2_VSX),
|
||||
VSX_LOGICAL(xxleqv, 0x8, 0x17, PPC2_VSX207),
|
||||
VSX_LOGICAL(xxlnand, 0x8, 0x16, PPC2_VSX207),
|
||||
VSX_LOGICAL(xxlorc, 0x8, 0x15, PPC2_VSX207),
|
||||
GEN_XX3FORM(xxmrghw, 0x08, 0x02, PPC2_VSX),
|
||||
GEN_XX3FORM(xxmrglw, 0x08, 0x06, PPC2_VSX),
|
||||
GEN_XX3FORM(xxperm, 0x08, 0x03, PPC2_ISA300),
|
||||
GEN_XX3FORM(xxpermr, 0x08, 0x07, PPC2_ISA300),
|
||||
GEN_XX2FORM(xxspltw, 0x08, 0x0A, PPC2_VSX),
|
||||
GEN_XX1FORM(xxspltib, 0x08, 0x0B, PPC2_ISA300),
|
||||
GEN_XX3FORM_DM(xxsldwi, 0x08, 0x00),
|
||||
GEN_XX2FORM_EXT(xxextractuw, 0x0A, 0x0A, PPC2_ISA300),
|
||||
GEN_XX2FORM_EXT(xxinsertw, 0x0A, 0x0B, PPC2_ISA300),
|
||||
|
||||
#define GEN_XXSEL_ROW(opc3) \
|
||||
GEN_HANDLER2_E(xxsel, "xxsel", 0x3C, 0x18, opc3, 0, PPC_NONE, PPC2_VSX), \
|
||||
GEN_HANDLER2_E(xxsel, "xxsel", 0x3C, 0x19, opc3, 0, PPC_NONE, PPC2_VSX), \
|
||||
GEN_HANDLER2_E(xxsel, "xxsel", 0x3C, 0x1A, opc3, 0, PPC_NONE, PPC2_VSX), \
|
||||
GEN_HANDLER2_E(xxsel, "xxsel", 0x3C, 0x1B, opc3, 0, PPC_NONE, PPC2_VSX), \
|
||||
GEN_HANDLER2_E(xxsel, "xxsel", 0x3C, 0x1C, opc3, 0, PPC_NONE, PPC2_VSX), \
|
||||
GEN_HANDLER2_E(xxsel, "xxsel", 0x3C, 0x1D, opc3, 0, PPC_NONE, PPC2_VSX), \
|
||||
GEN_HANDLER2_E(xxsel, "xxsel", 0x3C, 0x1E, opc3, 0, PPC_NONE, PPC2_VSX), \
|
||||
GEN_HANDLER2_E(xxsel, "xxsel", 0x3C, 0x1F, opc3, 0, PPC_NONE, PPC2_VSX), \
|
||||
|
||||
GEN_XXSEL_ROW(0x00)
|
||||
GEN_XXSEL_ROW(0x01)
|
||||
GEN_XXSEL_ROW(0x02)
|
||||
GEN_XXSEL_ROW(0x03)
|
||||
GEN_XXSEL_ROW(0x04)
|
||||
GEN_XXSEL_ROW(0x05)
|
||||
GEN_XXSEL_ROW(0x06)
|
||||
GEN_XXSEL_ROW(0x07)
|
||||
GEN_XXSEL_ROW(0x08)
|
||||
GEN_XXSEL_ROW(0x09)
|
||||
GEN_XXSEL_ROW(0x0A)
|
||||
GEN_XXSEL_ROW(0x0B)
|
||||
GEN_XXSEL_ROW(0x0C)
|
||||
GEN_XXSEL_ROW(0x0D)
|
||||
GEN_XXSEL_ROW(0x0E)
|
||||
GEN_XXSEL_ROW(0x0F)
|
||||
GEN_XXSEL_ROW(0x10)
|
||||
GEN_XXSEL_ROW(0x11)
|
||||
GEN_XXSEL_ROW(0x12)
|
||||
GEN_XXSEL_ROW(0x13)
|
||||
GEN_XXSEL_ROW(0x14)
|
||||
GEN_XXSEL_ROW(0x15)
|
||||
GEN_XXSEL_ROW(0x16)
|
||||
GEN_XXSEL_ROW(0x17)
|
||||
GEN_XXSEL_ROW(0x18)
|
||||
GEN_XXSEL_ROW(0x19)
|
||||
GEN_XXSEL_ROW(0x1A)
|
||||
GEN_XXSEL_ROW(0x1B)
|
||||
GEN_XXSEL_ROW(0x1C)
|
||||
GEN_XXSEL_ROW(0x1D)
|
||||
GEN_XXSEL_ROW(0x1E)
|
||||
GEN_XXSEL_ROW(0x1F)
|
||||
|
||||
GEN_XX3FORM_DM(xxpermdi, 0x08, 0x01),
|
||||
Reference in New Issue
Block a user