import Unicorn2
This commit is contained in:
Nguyen Anh Quynh
22
qemu/target/m68k/cpu-param.h
Normal file
22
qemu/target/m68k/cpu-param.h
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@@ -0,0 +1,22 @@
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/*
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* m68k cpu parameters for qemu.
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*
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* Copyright (c) 2005-2007 CodeSourcery
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* SPDX-License-Identifier: LGPL-2.0+
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*/
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#ifndef M68K_CPU_PARAM_H
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#define M68K_CPU_PARAM_H 1
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#define TARGET_LONG_BITS 32
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/*
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* Coldfire Linux uses 8k pages
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* and m68k linux uses 4k pages
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* use the smallest one
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*/
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#define TARGET_PAGE_BITS 12
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#define TARGET_PHYS_ADDR_SPACE_BITS 32
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#define TARGET_VIRT_ADDR_SPACE_BITS 32
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#define NB_MMU_MODES 2
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#endif
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46
qemu/target/m68k/cpu-qom.h
Normal file
46
qemu/target/m68k/cpu-qom.h
Normal file
@@ -0,0 +1,46 @@
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/*
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* QEMU Motorola 68k CPU
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*
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* Copyright (c) 2012 SUSE LINUX Products GmbH
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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||||
* Lesser General Public License for more details.
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||||
*
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||||
* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see
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* <http://www.gnu.org/licenses/lgpl-2.1.html>
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*/
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#ifndef QEMU_M68K_CPU_QOM_H
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#define QEMU_M68K_CPU_QOM_H
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#include "hw/core/cpu.h"
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#define M68K_CPU(obj) ((M68kCPU *)obj)
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#define M68K_CPU_CLASS(klass) ((M68kCPUClass *)klass)
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#define M68K_CPU_GET_CLASS(obj) (&((M68kCPU *)obj)->cc)
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/*
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* M68kCPUClass:
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* @parent_realize: The parent class' realize handler.
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* @parent_reset: The parent class' reset handler.
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*
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* A Motorola 68k CPU model.
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*/
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typedef struct M68kCPUClass {
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/*< private >*/
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CPUClass parent_class;
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/*< public >*/
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void (*parent_reset)(CPUState *cpu);
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} M68kCPUClass;
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typedef struct M68kCPU M68kCPU;
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#endif
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307
qemu/target/m68k/cpu.c
Normal file
307
qemu/target/m68k/cpu.c
Normal file
@@ -0,0 +1,307 @@
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/*
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* QEMU Motorola 68k CPU
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*
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* Copyright (c) 2012 SUSE LINUX Products GmbH
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
|
||||
* License as published by the Free Software Foundation; either
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||||
* version 2.1 of the License, or (at your option) any later version.
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*
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||||
* This library is distributed in the hope that it will be useful,
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||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
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||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see
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* <http://www.gnu.org/licenses/lgpl-2.1.html>
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*/
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#include "qemu/osdep.h"
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#include "cpu.h"
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#include "fpu/softfloat.h"
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#include "exec/exec-all.h"
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static void m68k_cpu_set_pc(CPUState *cs, vaddr value)
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{
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M68kCPU *cpu = M68K_CPU(cs);
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cpu->env.pc = value;
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}
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static bool m68k_cpu_has_work(CPUState *cs)
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{
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return cs->interrupt_request & CPU_INTERRUPT_HARD;
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}
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static void m68k_set_feature(CPUM68KState *env, int feature)
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{
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env->features |= (1u << feature);
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}
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static void m68k_cpu_reset(CPUState *dev)
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{
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CPUState *s = CPU(dev);
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M68kCPU *cpu = M68K_CPU(s);
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M68kCPUClass *mcc = M68K_CPU_GET_CLASS(cpu);
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CPUM68KState *env = &cpu->env;
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floatx80 nan = floatx80_default_nan(NULL);
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int i;
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mcc->parent_reset(dev);
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memset(env, 0, offsetof(CPUM68KState, end_reset_fields));
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cpu_m68k_set_sr(env, SR_S | SR_I);
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for (i = 0; i < 8; i++) {
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env->fregs[i].d = nan;
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}
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cpu_m68k_set_fpcr(env, 0);
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env->fpsr = 0;
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/* TODO: We should set PC from the interrupt vector. */
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env->pc = 0;
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}
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/* CPU models */
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static void m5206_cpu_initfn(CPUState *obj)
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{
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M68kCPU *cpu = M68K_CPU(obj);
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CPUM68KState *env = &cpu->env;
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m68k_set_feature(env, M68K_FEATURE_CF_ISA_A);
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}
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static void m68000_cpu_initfn(CPUState *obj)
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{
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M68kCPU *cpu = M68K_CPU(obj);
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CPUM68KState *env = &cpu->env;
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m68k_set_feature(env, M68K_FEATURE_M68000);
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m68k_set_feature(env, M68K_FEATURE_USP);
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m68k_set_feature(env, M68K_FEATURE_WORD_INDEX);
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m68k_set_feature(env, M68K_FEATURE_MOVEP);
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}
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/* common features for 68020, 68030 and 68040 */
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static void m680x0_cpu_common(CPUM68KState *env)
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{
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m68k_set_feature(env, M68K_FEATURE_M68000);
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m68k_set_feature(env, M68K_FEATURE_USP);
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m68k_set_feature(env, M68K_FEATURE_WORD_INDEX);
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m68k_set_feature(env, M68K_FEATURE_QUAD_MULDIV);
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m68k_set_feature(env, M68K_FEATURE_BRAL);
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m68k_set_feature(env, M68K_FEATURE_BCCL);
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m68k_set_feature(env, M68K_FEATURE_BITFIELD);
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m68k_set_feature(env, M68K_FEATURE_EXT_FULL);
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m68k_set_feature(env, M68K_FEATURE_SCALED_INDEX);
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m68k_set_feature(env, M68K_FEATURE_LONG_MULDIV);
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m68k_set_feature(env, M68K_FEATURE_FPU);
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m68k_set_feature(env, M68K_FEATURE_CAS);
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m68k_set_feature(env, M68K_FEATURE_BKPT);
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m68k_set_feature(env, M68K_FEATURE_RTD);
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m68k_set_feature(env, M68K_FEATURE_CHK2);
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m68k_set_feature(env, M68K_FEATURE_MOVEP);
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}
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static void m68020_cpu_initfn(CPUState *obj)
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{
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M68kCPU *cpu = M68K_CPU(obj);
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CPUM68KState *env = &cpu->env;
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m680x0_cpu_common(env);
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m68k_set_feature(env, M68K_FEATURE_M68020);
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}
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static void m68030_cpu_initfn(CPUState *obj)
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{
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M68kCPU *cpu = M68K_CPU(obj);
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CPUM68KState *env = &cpu->env;
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m680x0_cpu_common(env);
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m68k_set_feature(env, M68K_FEATURE_M68030);
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}
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static void m68040_cpu_initfn(CPUState *obj)
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{
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M68kCPU *cpu = M68K_CPU(obj);
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CPUM68KState *env = &cpu->env;
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m680x0_cpu_common(env);
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m68k_set_feature(env, M68K_FEATURE_M68040);
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}
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static void m68060_cpu_initfn(CPUState *obj)
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{
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M68kCPU *cpu = M68K_CPU(obj);
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CPUM68KState *env = &cpu->env;
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m68k_set_feature(env, M68K_FEATURE_M68000);
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m68k_set_feature(env, M68K_FEATURE_USP);
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m68k_set_feature(env, M68K_FEATURE_WORD_INDEX);
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m68k_set_feature(env, M68K_FEATURE_BRAL);
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m68k_set_feature(env, M68K_FEATURE_BCCL);
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m68k_set_feature(env, M68K_FEATURE_BITFIELD);
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m68k_set_feature(env, M68K_FEATURE_EXT_FULL);
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m68k_set_feature(env, M68K_FEATURE_SCALED_INDEX);
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m68k_set_feature(env, M68K_FEATURE_LONG_MULDIV);
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m68k_set_feature(env, M68K_FEATURE_FPU);
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m68k_set_feature(env, M68K_FEATURE_CAS);
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m68k_set_feature(env, M68K_FEATURE_BKPT);
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m68k_set_feature(env, M68K_FEATURE_RTD);
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m68k_set_feature(env, M68K_FEATURE_CHK2);
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m68k_set_feature(env, M68K_FEATURE_M68060);
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}
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static void m5208_cpu_initfn(CPUState *obj)
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{
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M68kCPU *cpu = M68K_CPU(obj);
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CPUM68KState *env = &cpu->env;
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m68k_set_feature(env, M68K_FEATURE_CF_ISA_A);
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m68k_set_feature(env, M68K_FEATURE_CF_ISA_APLUSC);
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m68k_set_feature(env, M68K_FEATURE_BRAL);
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m68k_set_feature(env, M68K_FEATURE_CF_EMAC);
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m68k_set_feature(env, M68K_FEATURE_USP);
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}
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static void cfv4e_cpu_initfn(CPUState *obj)
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{
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M68kCPU *cpu = M68K_CPU(obj);
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CPUM68KState *env = &cpu->env;
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m68k_set_feature(env, M68K_FEATURE_CF_ISA_A);
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m68k_set_feature(env, M68K_FEATURE_CF_ISA_B);
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m68k_set_feature(env, M68K_FEATURE_BRAL);
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m68k_set_feature(env, M68K_FEATURE_CF_FPU);
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m68k_set_feature(env, M68K_FEATURE_CF_EMAC);
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m68k_set_feature(env, M68K_FEATURE_USP);
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}
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static void any_cpu_initfn(CPUState *obj)
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{
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M68kCPU *cpu = M68K_CPU(obj);
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CPUM68KState *env = &cpu->env;
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m68k_set_feature(env, M68K_FEATURE_CF_ISA_A);
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m68k_set_feature(env, M68K_FEATURE_CF_ISA_B);
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m68k_set_feature(env, M68K_FEATURE_CF_ISA_APLUSC);
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m68k_set_feature(env, M68K_FEATURE_BRAL);
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m68k_set_feature(env, M68K_FEATURE_CF_FPU);
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/*
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||||
* MAC and EMAC are mututally exclusive, so pick EMAC.
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||||
* It's mostly backwards compatible.
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*/
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m68k_set_feature(env, M68K_FEATURE_CF_EMAC);
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m68k_set_feature(env, M68K_FEATURE_CF_EMAC_B);
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m68k_set_feature(env, M68K_FEATURE_USP);
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m68k_set_feature(env, M68K_FEATURE_EXT_FULL);
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||||
m68k_set_feature(env, M68K_FEATURE_WORD_INDEX);
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||||
}
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static void m68k_cpu_realizefn(CPUState *dev)
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{
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||||
CPUState *cs = CPU(dev);
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M68kCPU *cpu = M68K_CPU(dev);
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|
||||
register_m68k_insns(&cpu->env);
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cpu_exec_realizefn(cs);
|
||||
}
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||||
|
||||
static void m68k_cpu_initfn(struct uc_struct *uc, CPUState *obj)
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||||
{
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||||
M68kCPU *cpu = M68K_CPU(obj);
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||||
CPUM68KState *env = &cpu->env;
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||||
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||||
env->uc = uc;
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cpu_set_cpustate_pointers(cpu);
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||||
}
|
||||
|
||||
static void m68k_cpu_class_init(CPUClass *c)
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||||
{
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||||
M68kCPUClass *mcc = M68K_CPU_CLASS(c);
|
||||
CPUClass *cc = CPU_CLASS(c);
|
||||
|
||||
/* parent class is CPUClass, parent_reset() is cpu_common_reset(). */
|
||||
mcc->parent_reset = cc->reset;
|
||||
/* overwrite the CPUClass->reset to arch reset: x86_cpu_reset(). */
|
||||
cc->reset = m68k_cpu_reset;
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||||
cc->has_work = m68k_cpu_has_work;
|
||||
cc->do_interrupt = m68k_cpu_do_interrupt;
|
||||
cc->cpu_exec_interrupt = m68k_cpu_exec_interrupt;
|
||||
cc->set_pc = m68k_cpu_set_pc;
|
||||
cc->tlb_fill = m68k_cpu_tlb_fill;
|
||||
cc->get_phys_page_debug = m68k_cpu_get_phys_page_debug;
|
||||
cc->tcg_initialize = m68k_tcg_init;
|
||||
}
|
||||
|
||||
#define DEFINE_M68K_CPU_TYPE(cpu_model, initfn) \
|
||||
{ \
|
||||
.name = cpu_model, \
|
||||
.initfn = initfn, \
|
||||
}
|
||||
|
||||
struct M68kCPUInfo {
|
||||
const char *name;
|
||||
void (*initfn)(CPUState *obj);
|
||||
};
|
||||
|
||||
static struct M68kCPUInfo m68k_cpus_type_infos[] = {
|
||||
{ "m68000", m68000_cpu_initfn },
|
||||
{ "m68020", m68020_cpu_initfn },
|
||||
{ "m68030", m68030_cpu_initfn },
|
||||
{ "m68040", m68040_cpu_initfn },
|
||||
{ "m68060", m68060_cpu_initfn },
|
||||
{ "m5206", m5206_cpu_initfn },
|
||||
{ "m5208", m5208_cpu_initfn },
|
||||
{ "cfv4e", cfv4e_cpu_initfn },
|
||||
{ "any", any_cpu_initfn },
|
||||
};
|
||||
|
||||
M68kCPU *cpu_m68k_init(struct uc_struct *uc, const char *cpu_model)
|
||||
{
|
||||
M68kCPU *cpu;
|
||||
CPUState *cs;
|
||||
CPUClass *cc;
|
||||
int i;
|
||||
|
||||
if (cpu_model == NULL) {
|
||||
cpu_model = "cfv4e";
|
||||
}
|
||||
|
||||
cpu = calloc(1, sizeof(*cpu));
|
||||
if (cpu == NULL) {
|
||||
return NULL;
|
||||
}
|
||||
|
||||
cs = (CPUState *)cpu;
|
||||
cc = (CPUClass *)&cpu->cc;
|
||||
cs->cc = cc;
|
||||
cs->uc = uc;
|
||||
uc->cpu = cs;
|
||||
|
||||
cpu_class_init(uc, cc);
|
||||
|
||||
m68k_cpu_class_init(cc);
|
||||
|
||||
cpu_common_initfn(uc, cs);
|
||||
|
||||
m68k_cpu_initfn(uc, cs);
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(m68k_cpus_type_infos); i++) {
|
||||
if (strcasecmp(cpu_model, m68k_cpus_type_infos[i].name) == 0) {
|
||||
m68k_cpus_type_infos[i].initfn(cs);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
m68k_cpu_realizefn(cs);
|
||||
|
||||
// init address space
|
||||
cpu_address_space_init(cs, 0, cs->memory);
|
||||
|
||||
qemu_init_vcpu(cs);
|
||||
|
||||
return cpu;
|
||||
}
|
||||
563
qemu/target/m68k/cpu.h
Normal file
563
qemu/target/m68k/cpu.h
Normal file
@@ -0,0 +1,563 @@
|
||||
/*
|
||||
* m68k virtual CPU header
|
||||
*
|
||||
* Copyright (c) 2005-2007 CodeSourcery
|
||||
* Written by Paul Brook
|
||||
*
|
||||
* This library is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU Lesser General Public
|
||||
* License as published by the Free Software Foundation; either
|
||||
* version 2.1 of the License, or (at your option) any later version.
|
||||
*
|
||||
* This library is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* Lesser General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU Lesser General Public
|
||||
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
#ifndef M68K_CPU_H
|
||||
#define M68K_CPU_H
|
||||
|
||||
#include "exec/cpu-defs.h"
|
||||
#include "cpu-qom.h"
|
||||
|
||||
#define OS_BYTE 0
|
||||
#define OS_WORD 1
|
||||
#define OS_LONG 2
|
||||
#define OS_SINGLE 3
|
||||
#define OS_DOUBLE 4
|
||||
#define OS_EXTENDED 5
|
||||
#define OS_PACKED 6
|
||||
#define OS_UNSIZED 7
|
||||
|
||||
#define MAX_QREGS 32
|
||||
|
||||
#define EXCP_ACCESS 2 /* Access (MMU) error. */
|
||||
#define EXCP_ADDRESS 3 /* Address error. */
|
||||
#define EXCP_ILLEGAL 4 /* Illegal instruction. */
|
||||
#define EXCP_DIV0 5 /* Divide by zero */
|
||||
#define EXCP_CHK 6 /* CHK, CHK2 Instructions */
|
||||
#define EXCP_TRAPCC 7 /* FTRAPcc, TRAPcc, TRAPV Instructions */
|
||||
#define EXCP_PRIVILEGE 8 /* Privilege violation. */
|
||||
#define EXCP_TRACE 9
|
||||
#define EXCP_LINEA 10 /* Unimplemented line-A (MAC) opcode. */
|
||||
#define EXCP_LINEF 11 /* Unimplemented line-F (FPU) opcode. */
|
||||
#define EXCP_DEBUGNBP 12 /* Non-breakpoint debug interrupt. */
|
||||
#define EXCP_DEBEGBP 13 /* Breakpoint debug interrupt. */
|
||||
#define EXCP_FORMAT 14 /* RTE format error. */
|
||||
#define EXCP_UNINITIALIZED 15
|
||||
#define EXCP_SPURIOUS 24 /* Spurious interrupt */
|
||||
#define EXCP_INT_LEVEL_1 25 /* Level 1 Interrupt autovector */
|
||||
#define EXCP_INT_LEVEL_7 31 /* Level 7 Interrupt autovector */
|
||||
#define EXCP_TRAP0 32 /* User trap #0. */
|
||||
#define EXCP_TRAP15 47 /* User trap #15. */
|
||||
#define EXCP_FP_BSUN 48 /* Branch Set on Unordered */
|
||||
#define EXCP_FP_INEX 49 /* Inexact result */
|
||||
#define EXCP_FP_DZ 50 /* Divide by Zero */
|
||||
#define EXCP_FP_UNFL 51 /* Underflow */
|
||||
#define EXCP_FP_OPERR 52 /* Operand Error */
|
||||
#define EXCP_FP_OVFL 53 /* Overflow */
|
||||
#define EXCP_FP_SNAN 54 /* Signaling Not-A-Number */
|
||||
#define EXCP_FP_UNIMP 55 /* Unimplemented Data type */
|
||||
#define EXCP_MMU_CONF 56 /* MMU Configuration Error */
|
||||
#define EXCP_MMU_ILLEGAL 57 /* MMU Illegal Operation Error */
|
||||
#define EXCP_MMU_ACCESS 58 /* MMU Access Level Violation Error */
|
||||
|
||||
#define EXCP_RTE 0x100
|
||||
#define EXCP_HALT_INSN 0x101
|
||||
|
||||
#define M68K_DTTR0 0
|
||||
#define M68K_DTTR1 1
|
||||
#define M68K_ITTR0 2
|
||||
#define M68K_ITTR1 3
|
||||
|
||||
#define M68K_MAX_TTR 2
|
||||
#define TTR(type, index) ttr[((type & ACCESS_CODE) == ACCESS_CODE) * 2 + index]
|
||||
|
||||
#define TARGET_INSN_START_EXTRA_WORDS 1
|
||||
|
||||
typedef CPU_LDoubleU FPReg;
|
||||
|
||||
typedef struct CPUM68KState {
|
||||
uint32_t dregs[8];
|
||||
uint32_t aregs[8];
|
||||
uint32_t pc;
|
||||
uint32_t sr;
|
||||
|
||||
/* SSP and USP. The current_sp is stored in aregs[7], the other here. */
|
||||
int current_sp;
|
||||
uint32_t sp[3];
|
||||
|
||||
/* Condition flags. */
|
||||
uint32_t cc_op;
|
||||
uint32_t cc_x; /* always 0/1 */
|
||||
uint32_t cc_n; /* in bit 31 (i.e. negative) */
|
||||
uint32_t cc_v; /* in bit 31, unused, or computed from cc_n and cc_v */
|
||||
uint32_t cc_c; /* either 0/1, unused, or computed from cc_n and cc_v */
|
||||
uint32_t cc_z; /* == 0 or unused */
|
||||
|
||||
FPReg fregs[8];
|
||||
FPReg fp_result;
|
||||
uint32_t fpcr;
|
||||
uint32_t fpsr;
|
||||
float_status fp_status;
|
||||
|
||||
uint64_t mactmp;
|
||||
/*
|
||||
* EMAC Hardware deals with 48-bit values composed of one 32-bit and
|
||||
* two 8-bit parts. We store a single 64-bit value and
|
||||
* rearrange/extend this when changing modes.
|
||||
*/
|
||||
uint64_t macc[4];
|
||||
uint32_t macsr;
|
||||
uint32_t mac_mask;
|
||||
|
||||
/* MMU status. */
|
||||
struct {
|
||||
uint32_t ar;
|
||||
uint32_t ssw;
|
||||
/* 68040 */
|
||||
uint16_t tcr;
|
||||
uint32_t urp;
|
||||
uint32_t srp;
|
||||
bool fault;
|
||||
uint32_t ttr[4];
|
||||
uint32_t mmusr;
|
||||
} mmu;
|
||||
|
||||
/* Control registers. */
|
||||
uint32_t vbr;
|
||||
uint32_t mbar;
|
||||
uint32_t rambar0;
|
||||
uint32_t cacr;
|
||||
uint32_t sfc;
|
||||
uint32_t dfc;
|
||||
|
||||
int pending_vector;
|
||||
int pending_level;
|
||||
|
||||
uint32_t qregs[MAX_QREGS];
|
||||
|
||||
/* Fields up to this point are cleared by a CPU reset */
|
||||
int end_reset_fields;
|
||||
|
||||
/* Fields from here on are preserved across CPU reset. */
|
||||
uint32_t features;
|
||||
|
||||
// Unicorn engine
|
||||
struct uc_struct *uc;
|
||||
} CPUM68KState;
|
||||
|
||||
/*
|
||||
* M68kCPU:
|
||||
* @env: #CPUM68KState
|
||||
*
|
||||
* A Motorola 68k CPU.
|
||||
*/
|
||||
struct M68kCPU {
|
||||
/*< private >*/
|
||||
CPUState parent_obj;
|
||||
/*< public >*/
|
||||
|
||||
CPUNegativeOffsetState neg;
|
||||
CPUM68KState env;
|
||||
|
||||
struct M68kCPUClass cc;
|
||||
};
|
||||
|
||||
|
||||
void m68k_cpu_do_interrupt(CPUState *cpu);
|
||||
bool m68k_cpu_exec_interrupt(CPUState *cpu, int int_req);
|
||||
hwaddr m68k_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
|
||||
|
||||
void m68k_tcg_init(struct uc_struct *uc);
|
||||
/*
|
||||
* you can call this signal handler from your SIGBUS and SIGSEGV
|
||||
* signal handlers to inform the virtual CPU of exceptions. non zero
|
||||
* is returned if the signal was handled by the virtual CPU.
|
||||
*/
|
||||
int cpu_m68k_signal_handler(int host_signum, void *pinfo,
|
||||
void *puc);
|
||||
uint32_t cpu_m68k_get_ccr(CPUM68KState *env);
|
||||
void cpu_m68k_set_ccr(CPUM68KState *env, uint32_t);
|
||||
void cpu_m68k_set_sr(CPUM68KState *env, uint32_t);
|
||||
void cpu_m68k_set_fpcr(CPUM68KState *env, uint32_t val);
|
||||
|
||||
|
||||
/*
|
||||
* Instead of computing the condition codes after each m68k instruction,
|
||||
* QEMU just stores one operand (called CC_SRC), the result
|
||||
* (called CC_DEST) and the type of operation (called CC_OP). When the
|
||||
* condition codes are needed, the condition codes can be calculated
|
||||
* using this information. Condition codes are not generated if they
|
||||
* are only needed for conditional branches.
|
||||
*/
|
||||
typedef enum {
|
||||
/* Translator only -- use env->cc_op. */
|
||||
CC_OP_DYNAMIC,
|
||||
|
||||
/* Each flag bit computed into cc_[xcnvz]. */
|
||||
CC_OP_FLAGS,
|
||||
|
||||
/* X in cc_x, C = X, N in cc_n, Z in cc_n, V via cc_n/cc_v. */
|
||||
CC_OP_ADDB, CC_OP_ADDW, CC_OP_ADDL,
|
||||
CC_OP_SUBB, CC_OP_SUBW, CC_OP_SUBL,
|
||||
|
||||
/* X in cc_x, {N,Z,C,V} via cc_n/cc_v. */
|
||||
CC_OP_CMPB, CC_OP_CMPW, CC_OP_CMPL,
|
||||
|
||||
/* X in cc_x, C = 0, V = 0, N in cc_n, Z in cc_n. */
|
||||
CC_OP_LOGIC,
|
||||
|
||||
CC_OP_NB
|
||||
} CCOp;
|
||||
|
||||
#define CCF_C 0x01
|
||||
#define CCF_V 0x02
|
||||
#define CCF_Z 0x04
|
||||
#define CCF_N 0x08
|
||||
#define CCF_X 0x10
|
||||
|
||||
#define SR_I_SHIFT 8
|
||||
#define SR_I 0x0700
|
||||
#define SR_M 0x1000
|
||||
#define SR_S 0x2000
|
||||
#define SR_T_SHIFT 14
|
||||
#define SR_T 0xc000
|
||||
|
||||
#define M68K_SSP 0
|
||||
#define M68K_USP 1
|
||||
#define M68K_ISP 2
|
||||
|
||||
/* bits for 68040 special status word */
|
||||
#define M68K_CP_040 0x8000
|
||||
#define M68K_CU_040 0x4000
|
||||
#define M68K_CT_040 0x2000
|
||||
#define M68K_CM_040 0x1000
|
||||
#define M68K_MA_040 0x0800
|
||||
#define M68K_ATC_040 0x0400
|
||||
#define M68K_LK_040 0x0200
|
||||
#define M68K_RW_040 0x0100
|
||||
#define M68K_SIZ_040 0x0060
|
||||
#define M68K_TT_040 0x0018
|
||||
#define M68K_TM_040 0x0007
|
||||
|
||||
#define M68K_TM_040_DATA 0x0001
|
||||
#define M68K_TM_040_CODE 0x0002
|
||||
#define M68K_TM_040_SUPER 0x0004
|
||||
|
||||
/* bits for 68040 write back status word */
|
||||
#define M68K_WBV_040 0x80
|
||||
#define M68K_WBSIZ_040 0x60
|
||||
#define M68K_WBBYT_040 0x20
|
||||
#define M68K_WBWRD_040 0x40
|
||||
#define M68K_WBLNG_040 0x00
|
||||
#define M68K_WBTT_040 0x18
|
||||
#define M68K_WBTM_040 0x07
|
||||
|
||||
/* bus access size codes */
|
||||
#define M68K_BA_SIZE_MASK 0x60
|
||||
#define M68K_BA_SIZE_BYTE 0x20
|
||||
#define M68K_BA_SIZE_WORD 0x40
|
||||
#define M68K_BA_SIZE_LONG 0x00
|
||||
#define M68K_BA_SIZE_LINE 0x60
|
||||
|
||||
/* bus access transfer type codes */
|
||||
#define M68K_BA_TT_MOVE16 0x08
|
||||
|
||||
/* bits for 68040 MMU status register (mmusr) */
|
||||
#define M68K_MMU_B_040 0x0800
|
||||
#define M68K_MMU_G_040 0x0400
|
||||
#define M68K_MMU_U1_040 0x0200
|
||||
#define M68K_MMU_U0_040 0x0100
|
||||
#define M68K_MMU_S_040 0x0080
|
||||
#define M68K_MMU_CM_040 0x0060
|
||||
#define M68K_MMU_M_040 0x0010
|
||||
#define M68K_MMU_WP_040 0x0004
|
||||
#define M68K_MMU_T_040 0x0002
|
||||
#define M68K_MMU_R_040 0x0001
|
||||
|
||||
#define M68K_MMU_SR_MASK_040 (M68K_MMU_G_040 | M68K_MMU_U1_040 | \
|
||||
M68K_MMU_U0_040 | M68K_MMU_S_040 | \
|
||||
M68K_MMU_CM_040 | M68K_MMU_M_040 | \
|
||||
M68K_MMU_WP_040)
|
||||
|
||||
/* bits for 68040 MMU Translation Control Register */
|
||||
#define M68K_TCR_ENABLED 0x8000
|
||||
#define M68K_TCR_PAGE_8K 0x4000
|
||||
|
||||
/* bits for 68040 MMU Table Descriptor / Page Descriptor / TTR */
|
||||
#define M68K_DESC_WRITEPROT 0x00000004
|
||||
#define M68K_DESC_USED 0x00000008
|
||||
#define M68K_DESC_MODIFIED 0x00000010
|
||||
#define M68K_DESC_CACHEMODE 0x00000060
|
||||
#define M68K_DESC_CM_WRTHRU 0x00000000
|
||||
#define M68K_DESC_CM_COPYBK 0x00000020
|
||||
#define M68K_DESC_CM_SERIAL 0x00000040
|
||||
#define M68K_DESC_CM_NCACHE 0x00000060
|
||||
#define M68K_DESC_SUPERONLY 0x00000080
|
||||
#define M68K_DESC_USERATTR 0x00000300
|
||||
#define M68K_DESC_USERATTR_SHIFT 8
|
||||
#define M68K_DESC_GLOBAL 0x00000400
|
||||
#define M68K_DESC_URESERVED 0x00000800
|
||||
|
||||
#define M68K_ROOT_POINTER_ENTRIES 128
|
||||
#define M68K_4K_PAGE_MASK (~0xff)
|
||||
#define M68K_POINTER_BASE(entry) (entry & ~0x1ff)
|
||||
#define M68K_ROOT_INDEX(addr) ((address >> 23) & 0x1fc)
|
||||
#define M68K_POINTER_INDEX(addr) ((address >> 16) & 0x1fc)
|
||||
#define M68K_4K_PAGE_BASE(entry) (next & M68K_4K_PAGE_MASK)
|
||||
#define M68K_4K_PAGE_INDEX(addr) ((address >> 10) & 0xfc)
|
||||
#define M68K_8K_PAGE_MASK (~0x7f)
|
||||
#define M68K_8K_PAGE_BASE(entry) (next & M68K_8K_PAGE_MASK)
|
||||
#define M68K_8K_PAGE_INDEX(addr) ((address >> 11) & 0x7c)
|
||||
#define M68K_UDT_VALID(entry) (entry & 2)
|
||||
#define M68K_PDT_VALID(entry) (entry & 3)
|
||||
#define M68K_PDT_INDIRECT(entry) ((entry & 3) == 2)
|
||||
#define M68K_INDIRECT_POINTER(addr) (addr & ~3)
|
||||
#define M68K_TTS_POINTER_SHIFT 18
|
||||
#define M68K_TTS_ROOT_SHIFT 25
|
||||
|
||||
/* bits for 68040 MMU Transparent Translation Registers */
|
||||
#define M68K_TTR_ADDR_BASE 0xff000000
|
||||
#define M68K_TTR_ADDR_MASK 0x00ff0000
|
||||
#define M68K_TTR_ADDR_MASK_SHIFT 8
|
||||
#define M68K_TTR_ENABLED 0x00008000
|
||||
#define M68K_TTR_SFIELD 0x00006000
|
||||
#define M68K_TTR_SFIELD_USER 0x0000
|
||||
#define M68K_TTR_SFIELD_SUPER 0x2000
|
||||
|
||||
/* m68k Control Registers */
|
||||
|
||||
/* ColdFire */
|
||||
/* Memory Management Control Registers */
|
||||
#define M68K_CR_ASID 0x003
|
||||
#define M68K_CR_ACR0 0x004
|
||||
#define M68K_CR_ACR1 0x005
|
||||
#define M68K_CR_ACR2 0x006
|
||||
#define M68K_CR_ACR3 0x007
|
||||
#define M68K_CR_MMUBAR 0x008
|
||||
|
||||
/* Processor Miscellaneous Registers */
|
||||
#define M68K_CR_PC 0x80F
|
||||
|
||||
/* Local Memory and Module Control Registers */
|
||||
#define M68K_CR_ROMBAR0 0xC00
|
||||
#define M68K_CR_ROMBAR1 0xC01
|
||||
#define M68K_CR_RAMBAR0 0xC04
|
||||
#define M68K_CR_RAMBAR1 0xC05
|
||||
#define M68K_CR_MPCR 0xC0C
|
||||
#define M68K_CR_EDRAMBAR 0xC0D
|
||||
#define M68K_CR_SECMBAR 0xC0E
|
||||
#define M68K_CR_MBAR 0xC0F
|
||||
|
||||
/* Local Memory Address Permutation Control Registers */
|
||||
#define M68K_CR_PCR1U0 0xD02
|
||||
#define M68K_CR_PCR1L0 0xD03
|
||||
#define M68K_CR_PCR2U0 0xD04
|
||||
#define M68K_CR_PCR2L0 0xD05
|
||||
#define M68K_CR_PCR3U0 0xD06
|
||||
#define M68K_CR_PCR3L0 0xD07
|
||||
#define M68K_CR_PCR1U1 0xD0A
|
||||
#define M68K_CR_PCR1L1 0xD0B
|
||||
#define M68K_CR_PCR2U1 0xD0C
|
||||
#define M68K_CR_PCR2L1 0xD0D
|
||||
#define M68K_CR_PCR3U1 0xD0E
|
||||
#define M68K_CR_PCR3L1 0xD0F
|
||||
|
||||
/* MC680x0 */
|
||||
/* MC680[1234]0/CPU32 */
|
||||
#define M68K_CR_SFC 0x000
|
||||
#define M68K_CR_DFC 0x001
|
||||
#define M68K_CR_USP 0x800
|
||||
#define M68K_CR_VBR 0x801 /* + Coldfire */
|
||||
|
||||
/* MC680[234]0 */
|
||||
#define M68K_CR_CACR 0x002 /* + Coldfire */
|
||||
#define M68K_CR_CAAR 0x802 /* MC68020 and MC68030 only */
|
||||
#define M68K_CR_MSP 0x803
|
||||
#define M68K_CR_ISP 0x804
|
||||
|
||||
/* MC68040/MC68LC040 */
|
||||
#define M68K_CR_TC 0x003
|
||||
#define M68K_CR_ITT0 0x004
|
||||
#define M68K_CR_ITT1 0x005
|
||||
#define M68K_CR_DTT0 0x006
|
||||
#define M68K_CR_DTT1 0x007
|
||||
#define M68K_CR_MMUSR 0x805
|
||||
#define M68K_CR_URP 0x806
|
||||
#define M68K_CR_SRP 0x807
|
||||
|
||||
/* MC68EC040 */
|
||||
#define M68K_CR_IACR0 0x004
|
||||
#define M68K_CR_IACR1 0x005
|
||||
#define M68K_CR_DACR0 0x006
|
||||
#define M68K_CR_DACR1 0x007
|
||||
|
||||
#define M68K_FPIAR_SHIFT 0
|
||||
#define M68K_FPIAR (1 << M68K_FPIAR_SHIFT)
|
||||
#define M68K_FPSR_SHIFT 1
|
||||
#define M68K_FPSR (1 << M68K_FPSR_SHIFT)
|
||||
#define M68K_FPCR_SHIFT 2
|
||||
#define M68K_FPCR (1 << M68K_FPCR_SHIFT)
|
||||
|
||||
/* Floating-Point Status Register */
|
||||
|
||||
/* Condition Code */
|
||||
#define FPSR_CC_MASK 0x0f000000
|
||||
#define FPSR_CC_A 0x01000000 /* Not-A-Number */
|
||||
#define FPSR_CC_I 0x02000000 /* Infinity */
|
||||
#define FPSR_CC_Z 0x04000000 /* Zero */
|
||||
#define FPSR_CC_N 0x08000000 /* Negative */
|
||||
|
||||
/* Quotient */
|
||||
|
||||
#define FPSR_QT_MASK 0x00ff0000
|
||||
#define FPSR_QT_SHIFT 16
|
||||
|
||||
/* Floating-Point Control Register */
|
||||
/* Rounding mode */
|
||||
#define FPCR_RND_MASK 0x0030
|
||||
#define FPCR_RND_N 0x0000
|
||||
#define FPCR_RND_Z 0x0010
|
||||
#define FPCR_RND_M 0x0020
|
||||
#define FPCR_RND_P 0x0030
|
||||
|
||||
/* Rounding precision */
|
||||
#define FPCR_PREC_MASK 0x00c0
|
||||
#define FPCR_PREC_X 0x0000
|
||||
#define FPCR_PREC_S 0x0040
|
||||
#define FPCR_PREC_D 0x0080
|
||||
#define FPCR_PREC_U 0x00c0
|
||||
|
||||
#define FPCR_EXCP_MASK 0xff00
|
||||
|
||||
/* CACR fields are implementation defined, but some bits are common. */
|
||||
#define M68K_CACR_EUSP 0x10
|
||||
|
||||
#define MACSR_PAV0 0x100
|
||||
#define MACSR_OMC 0x080
|
||||
#define MACSR_SU 0x040
|
||||
#define MACSR_FI 0x020
|
||||
#define MACSR_RT 0x010
|
||||
#define MACSR_N 0x008
|
||||
#define MACSR_Z 0x004
|
||||
#define MACSR_V 0x002
|
||||
#define MACSR_EV 0x001
|
||||
|
||||
void m68k_set_irq_level(M68kCPU *cpu, int level, uint8_t vector);
|
||||
void m68k_switch_sp(CPUM68KState *env);
|
||||
|
||||
void do_m68k_semihosting(CPUM68KState *env, int nr);
|
||||
|
||||
/*
|
||||
* There are 4 ColdFire core ISA revisions: A, A+, B and C.
|
||||
* Each feature covers the subset of instructions common to the
|
||||
* ISA revisions mentioned.
|
||||
*/
|
||||
|
||||
enum m68k_features {
|
||||
M68K_FEATURE_M68000,
|
||||
M68K_FEATURE_M68020,
|
||||
M68K_FEATURE_M68030,
|
||||
M68K_FEATURE_M68040,
|
||||
M68K_FEATURE_M68060,
|
||||
M68K_FEATURE_CF_ISA_A,
|
||||
M68K_FEATURE_CF_ISA_B, /* (ISA B or C). */
|
||||
M68K_FEATURE_CF_ISA_APLUSC, /* BIT/BITREV, FF1, STRLDSR (ISA A+ or C). */
|
||||
M68K_FEATURE_BRAL, /* Long unconditional branch. (ISA A+ or B). */
|
||||
M68K_FEATURE_CF_FPU,
|
||||
M68K_FEATURE_CF_MAC,
|
||||
M68K_FEATURE_CF_EMAC,
|
||||
M68K_FEATURE_CF_EMAC_B, /* Revision B EMAC (dual accumulate). */
|
||||
M68K_FEATURE_USP, /* User Stack Pointer. (ISA A+, B or C). */
|
||||
M68K_FEATURE_EXT_FULL, /* 68020+ full extension word. */
|
||||
M68K_FEATURE_WORD_INDEX, /* word sized address index registers. */
|
||||
M68K_FEATURE_SCALED_INDEX, /* scaled address index registers. */
|
||||
M68K_FEATURE_LONG_MULDIV, /* 32 bit multiply/divide. */
|
||||
M68K_FEATURE_QUAD_MULDIV, /* 64 bit multiply/divide. */
|
||||
M68K_FEATURE_BCCL, /* Long conditional branches. */
|
||||
M68K_FEATURE_BITFIELD, /* Bit field insns. */
|
||||
M68K_FEATURE_FPU,
|
||||
M68K_FEATURE_CAS,
|
||||
M68K_FEATURE_BKPT,
|
||||
M68K_FEATURE_RTD,
|
||||
M68K_FEATURE_CHK2,
|
||||
M68K_FEATURE_MOVEP,
|
||||
};
|
||||
|
||||
static inline int m68k_feature(CPUM68KState *env, int feature)
|
||||
{
|
||||
return (env->features & (1u << feature)) != 0;
|
||||
}
|
||||
|
||||
void m68k_cpu_list(void);
|
||||
|
||||
void register_m68k_insns (CPUM68KState *env);
|
||||
|
||||
enum {
|
||||
/* 1 bit to define user level / supervisor access */
|
||||
ACCESS_SUPER = 0x01,
|
||||
/* 1 bit to indicate direction */
|
||||
ACCESS_STORE = 0x02,
|
||||
/* 1 bit to indicate debug access */
|
||||
ACCESS_DEBUG = 0x04,
|
||||
/* PTEST instruction */
|
||||
ACCESS_PTEST = 0x08,
|
||||
/* Type of instruction that generated the access */
|
||||
ACCESS_CODE = 0x10, /* Code fetch access */
|
||||
ACCESS_DATA = 0x20, /* Data load/store access */
|
||||
};
|
||||
|
||||
#define cpu_signal_handler cpu_m68k_signal_handler
|
||||
#define cpu_list m68k_cpu_list
|
||||
|
||||
/* MMU modes definitions */
|
||||
#define MMU_KERNEL_IDX 0
|
||||
#define MMU_USER_IDX 1
|
||||
static inline int cpu_mmu_index (CPUM68KState *env, bool ifetch)
|
||||
{
|
||||
return (env->sr & SR_S) == 0 ? 1 : 0;
|
||||
}
|
||||
|
||||
bool m68k_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
|
||||
MMUAccessType access_type, int mmu_idx,
|
||||
bool probe, uintptr_t retaddr);
|
||||
void m68k_cpu_transaction_failed(CPUState *cs, hwaddr physaddr, vaddr addr,
|
||||
unsigned size, MMUAccessType access_type,
|
||||
int mmu_idx, MemTxAttrs attrs,
|
||||
MemTxResult response, uintptr_t retaddr);
|
||||
|
||||
typedef CPUM68KState CPUArchState;
|
||||
typedef M68kCPU ArchCPU;
|
||||
|
||||
#include "exec/cpu-all.h"
|
||||
|
||||
/* TB flags */
|
||||
#define TB_FLAGS_MACSR 0x0f
|
||||
#define TB_FLAGS_MSR_S_BIT 13
|
||||
#define TB_FLAGS_MSR_S (1 << TB_FLAGS_MSR_S_BIT)
|
||||
#define TB_FLAGS_SFC_S_BIT 14
|
||||
#define TB_FLAGS_SFC_S (1 << TB_FLAGS_SFC_S_BIT)
|
||||
#define TB_FLAGS_DFC_S_BIT 15
|
||||
#define TB_FLAGS_DFC_S (1 << TB_FLAGS_DFC_S_BIT)
|
||||
|
||||
static inline void cpu_get_tb_cpu_state(CPUM68KState *env, target_ulong *pc,
|
||||
target_ulong *cs_base, uint32_t *flags)
|
||||
{
|
||||
*pc = env->pc;
|
||||
*cs_base = 0;
|
||||
*flags = (env->macsr >> 4) & TB_FLAGS_MACSR;
|
||||
if (env->sr & SR_S) {
|
||||
*flags |= TB_FLAGS_MSR_S;
|
||||
*flags |= (env->sfc << (TB_FLAGS_SFC_S_BIT - 2)) & TB_FLAGS_SFC_S;
|
||||
*flags |= (env->dfc << (TB_FLAGS_DFC_S_BIT - 2)) & TB_FLAGS_DFC_S;
|
||||
}
|
||||
}
|
||||
|
||||
// M68kCPU *cpu_m68k_init(struct uc_struct *uc, const char *cpu_model);
|
||||
|
||||
#endif
|
||||
658
qemu/target/m68k/fpu_helper.c
Normal file
658
qemu/target/m68k/fpu_helper.c
Normal file
@@ -0,0 +1,658 @@
|
||||
/*
|
||||
* m68k FPU helpers
|
||||
*
|
||||
* Copyright (c) 2006-2007 CodeSourcery
|
||||
* Written by Paul Brook
|
||||
*
|
||||
* This library is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU Lesser General Public
|
||||
* License as published by the Free Software Foundation; either
|
||||
* version 2.1 of the License, or (at your option) any later version.
|
||||
*
|
||||
* This library is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* Lesser General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU Lesser General Public
|
||||
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
#include "qemu/osdep.h"
|
||||
#include "cpu.h"
|
||||
#include "exec/helper-proto.h"
|
||||
#include "exec/exec-all.h"
|
||||
#include "exec/cpu_ldst.h"
|
||||
#include "softfloat.h"
|
||||
|
||||
/*
|
||||
* Undefined offsets may be different on various FPU.
|
||||
* On 68040 they return 0.0 (floatx80_zero)
|
||||
*/
|
||||
|
||||
static const floatx80 fpu_rom[128] = {
|
||||
[0x00] = make_floatx80_init(0x4000, 0xc90fdaa22168c235ULL), /* Pi */
|
||||
[0x0b] = make_floatx80_init(0x3ffd, 0x9a209a84fbcff798ULL), /* Log10(2) */
|
||||
[0x0c] = make_floatx80_init(0x4000, 0xadf85458a2bb4a9aULL), /* e */
|
||||
[0x0d] = make_floatx80_init(0x3fff, 0xb8aa3b295c17f0bcULL), /* Log2(e) */
|
||||
[0x0e] = make_floatx80_init(0x3ffd, 0xde5bd8a937287195ULL), /* Log10(e) */
|
||||
[0x0f] = make_floatx80_init(0x0000, 0x0000000000000000ULL), /* Zero */
|
||||
[0x30] = make_floatx80_init(0x3ffe, 0xb17217f7d1cf79acULL), /* ln(2) */
|
||||
[0x31] = make_floatx80_init(0x4000, 0x935d8dddaaa8ac17ULL), /* ln(10) */
|
||||
[0x32] = make_floatx80_init(0x3fff, 0x8000000000000000ULL), /* 10^0 */
|
||||
[0x33] = make_floatx80_init(0x4002, 0xa000000000000000ULL), /* 10^1 */
|
||||
[0x34] = make_floatx80_init(0x4005, 0xc800000000000000ULL), /* 10^2 */
|
||||
[0x35] = make_floatx80_init(0x400c, 0x9c40000000000000ULL), /* 10^4 */
|
||||
[0x36] = make_floatx80_init(0x4019, 0xbebc200000000000ULL), /* 10^8 */
|
||||
[0x37] = make_floatx80_init(0x4034, 0x8e1bc9bf04000000ULL), /* 10^16 */
|
||||
[0x38] = make_floatx80_init(0x4069, 0x9dc5ada82b70b59eULL), /* 10^32 */
|
||||
[0x39] = make_floatx80_init(0x40d3, 0xc2781f49ffcfa6d5ULL), /* 10^64 */
|
||||
[0x3a] = make_floatx80_init(0x41a8, 0x93ba47c980e98ce0ULL), /* 10^128 */
|
||||
[0x3b] = make_floatx80_init(0x4351, 0xaa7eebfb9df9de8eULL), /* 10^256 */
|
||||
[0x3c] = make_floatx80_init(0x46a3, 0xe319a0aea60e91c7ULL), /* 10^512 */
|
||||
[0x3d] = make_floatx80_init(0x4d48, 0xc976758681750c17ULL), /* 10^1024 */
|
||||
[0x3e] = make_floatx80_init(0x5a92, 0x9e8b3b5dc53d5de5ULL), /* 10^2048 */
|
||||
[0x3f] = make_floatx80_init(0x7525, 0xc46052028a20979bULL), /* 10^4096 */
|
||||
};
|
||||
|
||||
int32_t HELPER(reds32)(CPUM68KState *env, FPReg *val)
|
||||
{
|
||||
return floatx80_to_int32(val->d, &env->fp_status);
|
||||
}
|
||||
|
||||
float32 HELPER(redf32)(CPUM68KState *env, FPReg *val)
|
||||
{
|
||||
return floatx80_to_float32(val->d, &env->fp_status);
|
||||
}
|
||||
|
||||
void HELPER(exts32)(CPUM68KState *env, FPReg *res, int32_t val)
|
||||
{
|
||||
res->d = int32_to_floatx80(val, &env->fp_status);
|
||||
}
|
||||
|
||||
void HELPER(extf32)(CPUM68KState *env, FPReg *res, float32 val)
|
||||
{
|
||||
res->d = float32_to_floatx80(val, &env->fp_status);
|
||||
}
|
||||
|
||||
void HELPER(extf64)(CPUM68KState *env, FPReg *res, float64 val)
|
||||
{
|
||||
res->d = float64_to_floatx80(val, &env->fp_status);
|
||||
}
|
||||
|
||||
float64 HELPER(redf64)(CPUM68KState *env, FPReg *val)
|
||||
{
|
||||
return floatx80_to_float64(val->d, &env->fp_status);
|
||||
}
|
||||
|
||||
void HELPER(firound)(CPUM68KState *env, FPReg *res, FPReg *val)
|
||||
{
|
||||
res->d = floatx80_round_to_int(val->d, &env->fp_status);
|
||||
}
|
||||
|
||||
static void m68k_restore_precision_mode(CPUM68KState *env)
|
||||
{
|
||||
switch (env->fpcr & FPCR_PREC_MASK) {
|
||||
case FPCR_PREC_X: /* extended */
|
||||
set_floatx80_rounding_precision(80, &env->fp_status);
|
||||
break;
|
||||
case FPCR_PREC_S: /* single */
|
||||
set_floatx80_rounding_precision(32, &env->fp_status);
|
||||
break;
|
||||
case FPCR_PREC_D: /* double */
|
||||
set_floatx80_rounding_precision(64, &env->fp_status);
|
||||
break;
|
||||
case FPCR_PREC_U: /* undefined */
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
static void cf_restore_precision_mode(CPUM68KState *env)
|
||||
{
|
||||
if (env->fpcr & FPCR_PREC_S) { /* single */
|
||||
set_floatx80_rounding_precision(32, &env->fp_status);
|
||||
} else { /* double */
|
||||
set_floatx80_rounding_precision(64, &env->fp_status);
|
||||
}
|
||||
}
|
||||
|
||||
static void restore_rounding_mode(CPUM68KState *env)
|
||||
{
|
||||
switch (env->fpcr & FPCR_RND_MASK) {
|
||||
case FPCR_RND_N: /* round to nearest */
|
||||
set_float_rounding_mode(float_round_nearest_even, &env->fp_status);
|
||||
break;
|
||||
case FPCR_RND_Z: /* round to zero */
|
||||
set_float_rounding_mode(float_round_to_zero, &env->fp_status);
|
||||
break;
|
||||
case FPCR_RND_M: /* round toward minus infinity */
|
||||
set_float_rounding_mode(float_round_down, &env->fp_status);
|
||||
break;
|
||||
case FPCR_RND_P: /* round toward positive infinity */
|
||||
set_float_rounding_mode(float_round_up, &env->fp_status);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
void cpu_m68k_set_fpcr(CPUM68KState *env, uint32_t val)
|
||||
{
|
||||
env->fpcr = val & 0xffff;
|
||||
|
||||
if (m68k_feature(env, M68K_FEATURE_CF_FPU)) {
|
||||
cf_restore_precision_mode(env);
|
||||
} else {
|
||||
m68k_restore_precision_mode(env);
|
||||
}
|
||||
restore_rounding_mode(env);
|
||||
}
|
||||
|
||||
void HELPER(fitrunc)(CPUM68KState *env, FPReg *res, FPReg *val)
|
||||
{
|
||||
int rounding_mode = get_float_rounding_mode(&env->fp_status);
|
||||
set_float_rounding_mode(float_round_to_zero, &env->fp_status);
|
||||
res->d = floatx80_round_to_int(val->d, &env->fp_status);
|
||||
set_float_rounding_mode(rounding_mode, &env->fp_status);
|
||||
}
|
||||
|
||||
void HELPER(set_fpcr)(CPUM68KState *env, uint32_t val)
|
||||
{
|
||||
cpu_m68k_set_fpcr(env, val);
|
||||
}
|
||||
|
||||
#define PREC_BEGIN(prec) \
|
||||
do { \
|
||||
int old; \
|
||||
old = get_floatx80_rounding_precision(&env->fp_status); \
|
||||
set_floatx80_rounding_precision(prec, &env->fp_status) \
|
||||
|
||||
#define PREC_END() \
|
||||
set_floatx80_rounding_precision(old, &env->fp_status); \
|
||||
} while (0)
|
||||
|
||||
void HELPER(fsround)(CPUM68KState *env, FPReg *res, FPReg *val)
|
||||
{
|
||||
PREC_BEGIN(32);
|
||||
res->d = floatx80_round(val->d, &env->fp_status);
|
||||
PREC_END();
|
||||
}
|
||||
|
||||
void HELPER(fdround)(CPUM68KState *env, FPReg *res, FPReg *val)
|
||||
{
|
||||
PREC_BEGIN(64);
|
||||
res->d = floatx80_round(val->d, &env->fp_status);
|
||||
PREC_END();
|
||||
}
|
||||
|
||||
void HELPER(fsqrt)(CPUM68KState *env, FPReg *res, FPReg *val)
|
||||
{
|
||||
res->d = floatx80_sqrt(val->d, &env->fp_status);
|
||||
}
|
||||
|
||||
void HELPER(fssqrt)(CPUM68KState *env, FPReg *res, FPReg *val)
|
||||
{
|
||||
PREC_BEGIN(32);
|
||||
res->d = floatx80_sqrt(val->d, &env->fp_status);
|
||||
PREC_END();
|
||||
}
|
||||
|
||||
void HELPER(fdsqrt)(CPUM68KState *env, FPReg *res, FPReg *val)
|
||||
{
|
||||
PREC_BEGIN(64);
|
||||
res->d = floatx80_sqrt(val->d, &env->fp_status);
|
||||
PREC_END();
|
||||
}
|
||||
|
||||
void HELPER(fabs)(CPUM68KState *env, FPReg *res, FPReg *val)
|
||||
{
|
||||
res->d = floatx80_round(floatx80_abs(val->d), &env->fp_status);
|
||||
}
|
||||
|
||||
void HELPER(fsabs)(CPUM68KState *env, FPReg *res, FPReg *val)
|
||||
{
|
||||
PREC_BEGIN(32);
|
||||
res->d = floatx80_round(floatx80_abs(val->d), &env->fp_status);
|
||||
PREC_END();
|
||||
}
|
||||
|
||||
void HELPER(fdabs)(CPUM68KState *env, FPReg *res, FPReg *val)
|
||||
{
|
||||
PREC_BEGIN(64);
|
||||
res->d = floatx80_round(floatx80_abs(val->d), &env->fp_status);
|
||||
PREC_END();
|
||||
}
|
||||
|
||||
void HELPER(fneg)(CPUM68KState *env, FPReg *res, FPReg *val)
|
||||
{
|
||||
res->d = floatx80_round(floatx80_chs(val->d), &env->fp_status);
|
||||
}
|
||||
|
||||
void HELPER(fsneg)(CPUM68KState *env, FPReg *res, FPReg *val)
|
||||
{
|
||||
PREC_BEGIN(32);
|
||||
res->d = floatx80_round(floatx80_chs(val->d), &env->fp_status);
|
||||
PREC_END();
|
||||
}
|
||||
|
||||
void HELPER(fdneg)(CPUM68KState *env, FPReg *res, FPReg *val)
|
||||
{
|
||||
PREC_BEGIN(64);
|
||||
res->d = floatx80_round(floatx80_chs(val->d), &env->fp_status);
|
||||
PREC_END();
|
||||
}
|
||||
|
||||
void HELPER(fadd)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1)
|
||||
{
|
||||
res->d = floatx80_add(val0->d, val1->d, &env->fp_status);
|
||||
}
|
||||
|
||||
void HELPER(fsadd)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1)
|
||||
{
|
||||
PREC_BEGIN(32);
|
||||
res->d = floatx80_add(val0->d, val1->d, &env->fp_status);
|
||||
PREC_END();
|
||||
}
|
||||
|
||||
void HELPER(fdadd)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1)
|
||||
{
|
||||
PREC_BEGIN(64);
|
||||
res->d = floatx80_add(val0->d, val1->d, &env->fp_status);
|
||||
PREC_END();
|
||||
}
|
||||
|
||||
void HELPER(fsub)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1)
|
||||
{
|
||||
res->d = floatx80_sub(val1->d, val0->d, &env->fp_status);
|
||||
}
|
||||
|
||||
void HELPER(fssub)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1)
|
||||
{
|
||||
PREC_BEGIN(32);
|
||||
res->d = floatx80_sub(val1->d, val0->d, &env->fp_status);
|
||||
PREC_END();
|
||||
}
|
||||
|
||||
void HELPER(fdsub)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1)
|
||||
{
|
||||
PREC_BEGIN(64);
|
||||
res->d = floatx80_sub(val1->d, val0->d, &env->fp_status);
|
||||
PREC_END();
|
||||
}
|
||||
|
||||
void HELPER(fmul)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1)
|
||||
{
|
||||
res->d = floatx80_mul(val0->d, val1->d, &env->fp_status);
|
||||
}
|
||||
|
||||
void HELPER(fsmul)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1)
|
||||
{
|
||||
PREC_BEGIN(32);
|
||||
res->d = floatx80_mul(val0->d, val1->d, &env->fp_status);
|
||||
PREC_END();
|
||||
}
|
||||
|
||||
void HELPER(fdmul)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1)
|
||||
{
|
||||
PREC_BEGIN(64);
|
||||
res->d = floatx80_mul(val0->d, val1->d, &env->fp_status);
|
||||
PREC_END();
|
||||
}
|
||||
|
||||
void HELPER(fsglmul)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1)
|
||||
{
|
||||
int rounding_mode = get_float_rounding_mode(&env->fp_status);
|
||||
floatx80 a, b;
|
||||
|
||||
PREC_BEGIN(32);
|
||||
set_float_rounding_mode(float_round_to_zero, &env->fp_status);
|
||||
a = floatx80_round(val0->d, &env->fp_status);
|
||||
b = floatx80_round(val1->d, &env->fp_status);
|
||||
set_float_rounding_mode(rounding_mode, &env->fp_status);
|
||||
res->d = floatx80_mul(a, b, &env->fp_status);
|
||||
PREC_END();
|
||||
}
|
||||
|
||||
void HELPER(fdiv)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1)
|
||||
{
|
||||
res->d = floatx80_div(val1->d, val0->d, &env->fp_status);
|
||||
}
|
||||
|
||||
void HELPER(fsdiv)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1)
|
||||
{
|
||||
PREC_BEGIN(32);
|
||||
res->d = floatx80_div(val1->d, val0->d, &env->fp_status);
|
||||
PREC_END();
|
||||
}
|
||||
|
||||
void HELPER(fddiv)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1)
|
||||
{
|
||||
PREC_BEGIN(64);
|
||||
res->d = floatx80_div(val1->d, val0->d, &env->fp_status);
|
||||
PREC_END();
|
||||
}
|
||||
|
||||
void HELPER(fsgldiv)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1)
|
||||
{
|
||||
int rounding_mode = get_float_rounding_mode(&env->fp_status);
|
||||
floatx80 a, b;
|
||||
|
||||
PREC_BEGIN(32);
|
||||
set_float_rounding_mode(float_round_to_zero, &env->fp_status);
|
||||
a = floatx80_round(val1->d, &env->fp_status);
|
||||
b = floatx80_round(val0->d, &env->fp_status);
|
||||
set_float_rounding_mode(rounding_mode, &env->fp_status);
|
||||
res->d = floatx80_div(a, b, &env->fp_status);
|
||||
PREC_END();
|
||||
}
|
||||
|
||||
static int float_comp_to_cc(int float_compare)
|
||||
{
|
||||
switch (float_compare) {
|
||||
case float_relation_equal:
|
||||
return FPSR_CC_Z;
|
||||
case float_relation_less:
|
||||
return FPSR_CC_N;
|
||||
case float_relation_unordered:
|
||||
return FPSR_CC_A;
|
||||
case float_relation_greater:
|
||||
return 0;
|
||||
default:
|
||||
// g_assert_not_reached();
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
void HELPER(fcmp)(CPUM68KState *env, FPReg *val0, FPReg *val1)
|
||||
{
|
||||
int float_compare;
|
||||
|
||||
float_compare = floatx80_compare(val1->d, val0->d, &env->fp_status);
|
||||
env->fpsr = (env->fpsr & ~FPSR_CC_MASK) | float_comp_to_cc(float_compare);
|
||||
}
|
||||
|
||||
void HELPER(ftst)(CPUM68KState *env, FPReg *val)
|
||||
{
|
||||
uint32_t cc = 0;
|
||||
|
||||
if (floatx80_is_neg(val->d)) {
|
||||
cc |= FPSR_CC_N;
|
||||
}
|
||||
|
||||
if (floatx80_is_any_nan(val->d)) {
|
||||
cc |= FPSR_CC_A;
|
||||
} else if (floatx80_is_infinity(val->d)) {
|
||||
cc |= FPSR_CC_I;
|
||||
} else if (floatx80_is_zero(val->d)) {
|
||||
cc |= FPSR_CC_Z;
|
||||
}
|
||||
env->fpsr = (env->fpsr & ~FPSR_CC_MASK) | cc;
|
||||
}
|
||||
|
||||
void HELPER(fconst)(CPUM68KState *env, FPReg *val, uint32_t offset)
|
||||
{
|
||||
val->d = fpu_rom[offset];
|
||||
}
|
||||
|
||||
typedef int (*float_access)(CPUM68KState *env, uint32_t addr, FPReg *fp,
|
||||
uintptr_t ra);
|
||||
|
||||
static uint32_t fmovem_predec(CPUM68KState *env, uint32_t addr, uint32_t mask,
|
||||
float_access access_fn)
|
||||
{
|
||||
uintptr_t ra = GETPC();
|
||||
int i, size;
|
||||
|
||||
for (i = 7; i >= 0; i--, mask <<= 1) {
|
||||
if (mask & 0x80) {
|
||||
size = access_fn(env, addr, &env->fregs[i], ra);
|
||||
if ((mask & 0xff) != 0x80) {
|
||||
addr -= size;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return addr;
|
||||
}
|
||||
|
||||
static uint32_t fmovem_postinc(CPUM68KState *env, uint32_t addr, uint32_t mask,
|
||||
float_access access_fn)
|
||||
{
|
||||
uintptr_t ra = GETPC();
|
||||
int i, size;
|
||||
|
||||
for (i = 0; i < 8; i++, mask <<= 1) {
|
||||
if (mask & 0x80) {
|
||||
size = access_fn(env, addr, &env->fregs[i], ra);
|
||||
addr += size;
|
||||
}
|
||||
}
|
||||
|
||||
return addr;
|
||||
}
|
||||
|
||||
static int cpu_ld_floatx80_ra(CPUM68KState *env, uint32_t addr, FPReg *fp,
|
||||
uintptr_t ra)
|
||||
{
|
||||
uint32_t high;
|
||||
uint64_t low;
|
||||
|
||||
high = cpu_ldl_data_ra(env, addr, ra);
|
||||
low = cpu_ldq_data_ra(env, addr + 4, ra);
|
||||
|
||||
fp->l.upper = high >> 16;
|
||||
fp->l.lower = low;
|
||||
|
||||
return 12;
|
||||
}
|
||||
|
||||
static int cpu_st_floatx80_ra(CPUM68KState *env, uint32_t addr, FPReg *fp,
|
||||
uintptr_t ra)
|
||||
{
|
||||
cpu_stl_data_ra(env, addr, fp->l.upper << 16, ra);
|
||||
cpu_stq_data_ra(env, addr + 4, fp->l.lower, ra);
|
||||
|
||||
return 12;
|
||||
}
|
||||
|
||||
static int cpu_ld_float64_ra(CPUM68KState *env, uint32_t addr, FPReg *fp,
|
||||
uintptr_t ra)
|
||||
{
|
||||
uint64_t val;
|
||||
|
||||
val = cpu_ldq_data_ra(env, addr, ra);
|
||||
fp->d = float64_to_floatx80(*(float64 *)&val, &env->fp_status);
|
||||
|
||||
return 8;
|
||||
}
|
||||
|
||||
static int cpu_st_float64_ra(CPUM68KState *env, uint32_t addr, FPReg *fp,
|
||||
uintptr_t ra)
|
||||
{
|
||||
float64 val;
|
||||
|
||||
val = floatx80_to_float64(fp->d, &env->fp_status);
|
||||
cpu_stq_data_ra(env, addr, *(uint64_t *)&val, ra);
|
||||
|
||||
return 8;
|
||||
}
|
||||
|
||||
uint32_t HELPER(fmovemx_st_predec)(CPUM68KState *env, uint32_t addr,
|
||||
uint32_t mask)
|
||||
{
|
||||
return fmovem_predec(env, addr, mask, cpu_st_floatx80_ra);
|
||||
}
|
||||
|
||||
uint32_t HELPER(fmovemx_st_postinc)(CPUM68KState *env, uint32_t addr,
|
||||
uint32_t mask)
|
||||
{
|
||||
return fmovem_postinc(env, addr, mask, cpu_st_floatx80_ra);
|
||||
}
|
||||
|
||||
uint32_t HELPER(fmovemx_ld_postinc)(CPUM68KState *env, uint32_t addr,
|
||||
uint32_t mask)
|
||||
{
|
||||
return fmovem_postinc(env, addr, mask, cpu_ld_floatx80_ra);
|
||||
}
|
||||
|
||||
uint32_t HELPER(fmovemd_st_predec)(CPUM68KState *env, uint32_t addr,
|
||||
uint32_t mask)
|
||||
{
|
||||
return fmovem_predec(env, addr, mask, cpu_st_float64_ra);
|
||||
}
|
||||
|
||||
uint32_t HELPER(fmovemd_st_postinc)(CPUM68KState *env, uint32_t addr,
|
||||
uint32_t mask)
|
||||
{
|
||||
return fmovem_postinc(env, addr, mask, cpu_st_float64_ra);
|
||||
}
|
||||
|
||||
uint32_t HELPER(fmovemd_ld_postinc)(CPUM68KState *env, uint32_t addr,
|
||||
uint32_t mask)
|
||||
{
|
||||
return fmovem_postinc(env, addr, mask, cpu_ld_float64_ra);
|
||||
}
|
||||
|
||||
static void make_quotient(CPUM68KState *env, floatx80 val)
|
||||
{
|
||||
int32_t quotient;
|
||||
int sign;
|
||||
|
||||
if (floatx80_is_any_nan(val)) {
|
||||
return;
|
||||
}
|
||||
|
||||
quotient = floatx80_to_int32(val, &env->fp_status);
|
||||
sign = quotient < 0;
|
||||
if (sign) {
|
||||
quotient = -quotient;
|
||||
}
|
||||
|
||||
quotient = (sign << 7) | (quotient & 0x7f);
|
||||
env->fpsr = (env->fpsr & ~FPSR_QT_MASK) | (quotient << FPSR_QT_SHIFT);
|
||||
}
|
||||
|
||||
void HELPER(fmod)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1)
|
||||
{
|
||||
res->d = floatx80_mod(val1->d, val0->d, &env->fp_status);
|
||||
|
||||
make_quotient(env, res->d);
|
||||
}
|
||||
|
||||
void HELPER(frem)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1)
|
||||
{
|
||||
res->d = floatx80_rem(val1->d, val0->d, &env->fp_status);
|
||||
|
||||
make_quotient(env, res->d);
|
||||
}
|
||||
|
||||
void HELPER(fgetexp)(CPUM68KState *env, FPReg *res, FPReg *val)
|
||||
{
|
||||
res->d = floatx80_getexp(val->d, &env->fp_status);
|
||||
}
|
||||
|
||||
void HELPER(fgetman)(CPUM68KState *env, FPReg *res, FPReg *val)
|
||||
{
|
||||
res->d = floatx80_getman(val->d, &env->fp_status);
|
||||
}
|
||||
|
||||
void HELPER(fscale)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1)
|
||||
{
|
||||
res->d = floatx80_scale(val1->d, val0->d, &env->fp_status);
|
||||
}
|
||||
|
||||
void HELPER(flognp1)(CPUM68KState *env, FPReg *res, FPReg *val)
|
||||
{
|
||||
res->d = floatx80_lognp1(val->d, &env->fp_status);
|
||||
}
|
||||
|
||||
void HELPER(flogn)(CPUM68KState *env, FPReg *res, FPReg *val)
|
||||
{
|
||||
res->d = floatx80_logn(val->d, &env->fp_status);
|
||||
}
|
||||
|
||||
void HELPER(flog10)(CPUM68KState *env, FPReg *res, FPReg *val)
|
||||
{
|
||||
res->d = floatx80_log10(val->d, &env->fp_status);
|
||||
}
|
||||
|
||||
void HELPER(flog2)(CPUM68KState *env, FPReg *res, FPReg *val)
|
||||
{
|
||||
res->d = floatx80_log2(val->d, &env->fp_status);
|
||||
}
|
||||
|
||||
void HELPER(fetox)(CPUM68KState *env, FPReg *res, FPReg *val)
|
||||
{
|
||||
res->d = floatx80_etox(val->d, &env->fp_status);
|
||||
}
|
||||
|
||||
void HELPER(ftwotox)(CPUM68KState *env, FPReg *res, FPReg *val)
|
||||
{
|
||||
res->d = floatx80_twotox(val->d, &env->fp_status);
|
||||
}
|
||||
|
||||
void HELPER(ftentox)(CPUM68KState *env, FPReg *res, FPReg *val)
|
||||
{
|
||||
res->d = floatx80_tentox(val->d, &env->fp_status);
|
||||
}
|
||||
|
||||
void HELPER(ftan)(CPUM68KState *env, FPReg *res, FPReg *val)
|
||||
{
|
||||
res->d = floatx80_tan(val->d, &env->fp_status);
|
||||
}
|
||||
|
||||
void HELPER(fsin)(CPUM68KState *env, FPReg *res, FPReg *val)
|
||||
{
|
||||
res->d = floatx80_sin(val->d, &env->fp_status);
|
||||
}
|
||||
|
||||
void HELPER(fcos)(CPUM68KState *env, FPReg *res, FPReg *val)
|
||||
{
|
||||
res->d = floatx80_cos(val->d, &env->fp_status);
|
||||
}
|
||||
|
||||
void HELPER(fsincos)(CPUM68KState *env, FPReg *res0, FPReg *res1, FPReg *val)
|
||||
{
|
||||
floatx80 a = val->d;
|
||||
/*
|
||||
* If res0 and res1 specify the same floating-point data register,
|
||||
* the sine result is stored in the register, and the cosine
|
||||
* result is discarded.
|
||||
*/
|
||||
res1->d = floatx80_cos(a, &env->fp_status);
|
||||
res0->d = floatx80_sin(a, &env->fp_status);
|
||||
}
|
||||
|
||||
void HELPER(fatan)(CPUM68KState *env, FPReg *res, FPReg *val)
|
||||
{
|
||||
res->d = floatx80_atan(val->d, &env->fp_status);
|
||||
}
|
||||
|
||||
void HELPER(fasin)(CPUM68KState *env, FPReg *res, FPReg *val)
|
||||
{
|
||||
res->d = floatx80_asin(val->d, &env->fp_status);
|
||||
}
|
||||
|
||||
void HELPER(facos)(CPUM68KState *env, FPReg *res, FPReg *val)
|
||||
{
|
||||
res->d = floatx80_acos(val->d, &env->fp_status);
|
||||
}
|
||||
|
||||
void HELPER(fatanh)(CPUM68KState *env, FPReg *res, FPReg *val)
|
||||
{
|
||||
res->d = floatx80_atanh(val->d, &env->fp_status);
|
||||
}
|
||||
|
||||
void HELPER(ftanh)(CPUM68KState *env, FPReg *res, FPReg *val)
|
||||
{
|
||||
res->d = floatx80_tanh(val->d, &env->fp_status);
|
||||
}
|
||||
|
||||
void HELPER(fsinh)(CPUM68KState *env, FPReg *res, FPReg *val)
|
||||
{
|
||||
res->d = floatx80_sinh(val->d, &env->fp_status);
|
||||
}
|
||||
|
||||
void HELPER(fcosh)(CPUM68KState *env, FPReg *res, FPReg *val)
|
||||
{
|
||||
res->d = floatx80_cosh(val->d, &env->fp_status);
|
||||
}
|
||||
1047
qemu/target/m68k/helper.c
Normal file
1047
qemu/target/m68k/helper.c
Normal file
File diff suppressed because it is too large
Load Diff
130
qemu/target/m68k/helper.h
Normal file
130
qemu/target/m68k/helper.h
Normal file
@@ -0,0 +1,130 @@
|
||||
DEF_HELPER_4(uc_tracecode, void, i32, i32, ptr, i64)
|
||||
|
||||
DEF_HELPER_1(bitrev, i32, i32)
|
||||
DEF_HELPER_1(ff1, i32, i32)
|
||||
DEF_HELPER_FLAGS_2(sats, TCG_CALL_NO_RWG_SE, i32, i32, i32)
|
||||
DEF_HELPER_3(divuw, void, env, int, i32)
|
||||
DEF_HELPER_3(divsw, void, env, int, s32)
|
||||
DEF_HELPER_4(divul, void, env, int, int, i32)
|
||||
DEF_HELPER_4(divsl, void, env, int, int, s32)
|
||||
DEF_HELPER_4(divull, void, env, int, int, i32)
|
||||
DEF_HELPER_4(divsll, void, env, int, int, s32)
|
||||
DEF_HELPER_2(set_sr, void, env, i32)
|
||||
DEF_HELPER_3(cf_movec_to, void, env, i32, i32)
|
||||
DEF_HELPER_3(m68k_movec_to, void, env, i32, i32)
|
||||
DEF_HELPER_2(m68k_movec_from, i32, env, i32)
|
||||
DEF_HELPER_4(cas2w, void, env, i32, i32, i32)
|
||||
DEF_HELPER_4(cas2l, void, env, i32, i32, i32)
|
||||
DEF_HELPER_4(cas2l_parallel, void, env, i32, i32, i32)
|
||||
|
||||
#define dh_alias_fp ptr
|
||||
#define dh_ctype_fp FPReg *
|
||||
#define dh_is_signed_fp dh_is_signed_ptr
|
||||
|
||||
DEF_HELPER_3(exts32, void, env, fp, s32)
|
||||
DEF_HELPER_3(extf32, void, env, fp, f32)
|
||||
DEF_HELPER_3(extf64, void, env, fp, f64)
|
||||
DEF_HELPER_2(redf32, f32, env, fp)
|
||||
DEF_HELPER_2(redf64, f64, env, fp)
|
||||
DEF_HELPER_2(reds32, s32, env, fp)
|
||||
|
||||
DEF_HELPER_3(fsround, void, env, fp, fp)
|
||||
DEF_HELPER_3(fdround, void, env, fp, fp)
|
||||
DEF_HELPER_3(firound, void, env, fp, fp)
|
||||
DEF_HELPER_3(fitrunc, void, env, fp, fp)
|
||||
DEF_HELPER_3(fsqrt, void, env, fp, fp)
|
||||
DEF_HELPER_3(fssqrt, void, env, fp, fp)
|
||||
DEF_HELPER_3(fdsqrt, void, env, fp, fp)
|
||||
DEF_HELPER_3(fabs, void, env, fp, fp)
|
||||
DEF_HELPER_3(fsabs, void, env, fp, fp)
|
||||
DEF_HELPER_3(fdabs, void, env, fp, fp)
|
||||
DEF_HELPER_3(fneg, void, env, fp, fp)
|
||||
DEF_HELPER_3(fsneg, void, env, fp, fp)
|
||||
DEF_HELPER_3(fdneg, void, env, fp, fp)
|
||||
DEF_HELPER_4(fadd, void, env, fp, fp, fp)
|
||||
DEF_HELPER_4(fsadd, void, env, fp, fp, fp)
|
||||
DEF_HELPER_4(fdadd, void, env, fp, fp, fp)
|
||||
DEF_HELPER_4(fsub, void, env, fp, fp, fp)
|
||||
DEF_HELPER_4(fssub, void, env, fp, fp, fp)
|
||||
DEF_HELPER_4(fdsub, void, env, fp, fp, fp)
|
||||
DEF_HELPER_4(fmul, void, env, fp, fp, fp)
|
||||
DEF_HELPER_4(fsmul, void, env, fp, fp, fp)
|
||||
DEF_HELPER_4(fdmul, void, env, fp, fp, fp)
|
||||
DEF_HELPER_4(fsglmul, void, env, fp, fp, fp)
|
||||
DEF_HELPER_4(fdiv, void, env, fp, fp, fp)
|
||||
DEF_HELPER_4(fsdiv, void, env, fp, fp, fp)
|
||||
DEF_HELPER_4(fddiv, void, env, fp, fp, fp)
|
||||
DEF_HELPER_4(fsgldiv, void, env, fp, fp, fp)
|
||||
DEF_HELPER_FLAGS_3(fcmp, TCG_CALL_NO_RWG, void, env, fp, fp)
|
||||
DEF_HELPER_FLAGS_2(set_fpcr, TCG_CALL_NO_RWG, void, env, i32)
|
||||
DEF_HELPER_FLAGS_2(ftst, TCG_CALL_NO_RWG, void, env, fp)
|
||||
DEF_HELPER_3(fconst, void, env, fp, i32)
|
||||
DEF_HELPER_3(fmovemx_st_predec, i32, env, i32, i32)
|
||||
DEF_HELPER_3(fmovemx_st_postinc, i32, env, i32, i32)
|
||||
DEF_HELPER_3(fmovemx_ld_postinc, i32, env, i32, i32)
|
||||
DEF_HELPER_3(fmovemd_st_predec, i32, env, i32, i32)
|
||||
DEF_HELPER_3(fmovemd_st_postinc, i32, env, i32, i32)
|
||||
DEF_HELPER_3(fmovemd_ld_postinc, i32, env, i32, i32)
|
||||
DEF_HELPER_4(fmod, void, env, fp, fp, fp)
|
||||
DEF_HELPER_4(frem, void, env, fp, fp, fp)
|
||||
DEF_HELPER_3(fgetexp, void, env, fp, fp)
|
||||
DEF_HELPER_3(fgetman, void, env, fp, fp)
|
||||
DEF_HELPER_4(fscale, void, env, fp, fp, fp)
|
||||
DEF_HELPER_3(flognp1, void, env, fp, fp)
|
||||
DEF_HELPER_3(flogn, void, env, fp, fp)
|
||||
DEF_HELPER_3(flog10, void, env, fp, fp)
|
||||
DEF_HELPER_3(flog2, void, env, fp, fp)
|
||||
DEF_HELPER_3(fetox, void, env, fp, fp)
|
||||
DEF_HELPER_3(ftwotox, void, env, fp, fp)
|
||||
DEF_HELPER_3(ftentox, void, env, fp, fp)
|
||||
DEF_HELPER_3(ftan, void, env, fp, fp)
|
||||
DEF_HELPER_3(fsin, void, env, fp, fp)
|
||||
DEF_HELPER_3(fcos, void, env, fp, fp)
|
||||
DEF_HELPER_4(fsincos, void, env, fp, fp, fp)
|
||||
DEF_HELPER_3(fatan, void, env, fp, fp)
|
||||
DEF_HELPER_3(fasin, void, env, fp, fp)
|
||||
DEF_HELPER_3(facos, void, env, fp, fp)
|
||||
DEF_HELPER_3(fatanh, void, env, fp, fp)
|
||||
DEF_HELPER_3(ftanh, void, env, fp, fp)
|
||||
DEF_HELPER_3(fsinh, void, env, fp, fp)
|
||||
DEF_HELPER_3(fcosh, void, env, fp, fp)
|
||||
|
||||
DEF_HELPER_3(mac_move, void, env, i32, i32)
|
||||
DEF_HELPER_3(macmulf, i64, env, i32, i32)
|
||||
DEF_HELPER_3(macmuls, i64, env, i32, i32)
|
||||
DEF_HELPER_3(macmulu, i64, env, i32, i32)
|
||||
DEF_HELPER_2(macsats, void, env, i32)
|
||||
DEF_HELPER_2(macsatu, void, env, i32)
|
||||
DEF_HELPER_2(macsatf, void, env, i32)
|
||||
DEF_HELPER_2(mac_set_flags, void, env, i32)
|
||||
DEF_HELPER_2(set_macsr, void, env, i32)
|
||||
DEF_HELPER_2(get_macf, i32, env, i64)
|
||||
DEF_HELPER_1(get_macs, i32, i64)
|
||||
DEF_HELPER_1(get_macu, i32, i64)
|
||||
DEF_HELPER_2(get_mac_extf, i32, env, i32)
|
||||
DEF_HELPER_2(get_mac_exti, i32, env, i32)
|
||||
DEF_HELPER_3(set_mac_extf, void, env, i32, i32)
|
||||
DEF_HELPER_3(set_mac_exts, void, env, i32, i32)
|
||||
DEF_HELPER_3(set_mac_extu, void, env, i32, i32)
|
||||
|
||||
DEF_HELPER_2(flush_flags, void, env, i32)
|
||||
DEF_HELPER_2(set_ccr, void, env, i32)
|
||||
DEF_HELPER_FLAGS_1(get_ccr, TCG_CALL_NO_WG_SE, i32, env)
|
||||
DEF_HELPER_2(raise_exception, void, env, i32)
|
||||
|
||||
DEF_HELPER_FLAGS_3(bfffo_reg, TCG_CALL_NO_RWG_SE, i32, i32, i32, i32)
|
||||
|
||||
DEF_HELPER_FLAGS_4(bfexts_mem, TCG_CALL_NO_WG, i32, env, i32, s32, i32)
|
||||
DEF_HELPER_FLAGS_4(bfextu_mem, TCG_CALL_NO_WG, i64, env, i32, s32, i32)
|
||||
DEF_HELPER_FLAGS_5(bfins_mem, TCG_CALL_NO_WG, i32, env, i32, i32, s32, i32)
|
||||
DEF_HELPER_FLAGS_4(bfchg_mem, TCG_CALL_NO_WG, i32, env, i32, s32, i32)
|
||||
DEF_HELPER_FLAGS_4(bfclr_mem, TCG_CALL_NO_WG, i32, env, i32, s32, i32)
|
||||
DEF_HELPER_FLAGS_4(bfset_mem, TCG_CALL_NO_WG, i32, env, i32, s32, i32)
|
||||
DEF_HELPER_FLAGS_4(bfffo_mem, TCG_CALL_NO_WG, i64, env, i32, s32, i32)
|
||||
|
||||
DEF_HELPER_3(chk, void, env, s32, s32)
|
||||
DEF_HELPER_4(chk2, void, env, s32, s32, s32)
|
||||
|
||||
DEF_HELPER_3(ptest, void, env, i32, i32)
|
||||
DEF_HELPER_3(pflush, void, env, i32, i32)
|
||||
DEF_HELPER_FLAGS_1(reset, TCG_CALL_NO_RWG, void, env)
|
||||
1000
qemu/target/m68k/op_helper.c
Normal file
1000
qemu/target/m68k/op_helper.c
Normal file
File diff suppressed because it is too large
Load Diff
10
qemu/target/m68k/qregs.def
Normal file
10
qemu/target/m68k/qregs.def
Normal file
@@ -0,0 +1,10 @@
|
||||
DEFO32(PC, pc)
|
||||
DEFO32(SR, sr)
|
||||
DEFO32(CC_OP, cc_op)
|
||||
DEFO32(CC_X, cc_x)
|
||||
DEFO32(CC_C, cc_c)
|
||||
DEFO32(CC_N, cc_n)
|
||||
DEFO32(CC_V, cc_v)
|
||||
DEFO32(CC_Z, cc_z)
|
||||
DEFO32(MACSR, macsr)
|
||||
DEFO32(MAC_MASK, mac_mask)
|
||||
2900
qemu/target/m68k/softfloat.c
Normal file
2900
qemu/target/m68k/softfloat.c
Normal file
File diff suppressed because it is too large
Load Diff
49
qemu/target/m68k/softfloat.h
Normal file
49
qemu/target/m68k/softfloat.h
Normal file
@@ -0,0 +1,49 @@
|
||||
/*
|
||||
* Ported from a work by Andreas Grabher for Previous, NeXT Computer Emulator,
|
||||
* derived from NetBSD M68040 FPSP functions,
|
||||
* derived from release 2a of the SoftFloat IEC/IEEE Floating-point Arithmetic
|
||||
* Package. Those parts of the code (and some later contributions) are
|
||||
* provided under that license, as detailed below.
|
||||
* It has subsequently been modified by contributors to the QEMU Project,
|
||||
* so some portions are provided under:
|
||||
* the SoftFloat-2a license
|
||||
* the BSD license
|
||||
* GPL-v2-or-later
|
||||
*
|
||||
* Any future contributions to this file will be taken to be licensed under
|
||||
* the Softfloat-2a license unless specifically indicated otherwise.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Portions of this work are licensed under the terms of the GNU GPL,
|
||||
* version 2 or later. See the COPYING file in the top-level directory.
|
||||
*/
|
||||
|
||||
#ifndef TARGET_M68K_SOFTFLOAT_H
|
||||
#define TARGET_M68K_SOFTFLOAT_H
|
||||
#include "fpu/softfloat.h"
|
||||
|
||||
floatx80 floatx80_mod(floatx80 a, floatx80 b, float_status *status);
|
||||
floatx80 floatx80_getman(floatx80 a, float_status *status);
|
||||
floatx80 floatx80_getexp(floatx80 a, float_status *status);
|
||||
floatx80 floatx80_scale(floatx80 a, floatx80 b, float_status *status);
|
||||
floatx80 floatx80_move(floatx80 a, float_status *status);
|
||||
floatx80 floatx80_lognp1(floatx80 a, float_status *status);
|
||||
floatx80 floatx80_logn(floatx80 a, float_status *status);
|
||||
floatx80 floatx80_log10(floatx80 a, float_status *status);
|
||||
floatx80 floatx80_log2(floatx80 a, float_status *status);
|
||||
floatx80 floatx80_etox(floatx80 a, float_status *status);
|
||||
floatx80 floatx80_twotox(floatx80 a, float_status *status);
|
||||
floatx80 floatx80_tentox(floatx80 a, float_status *status);
|
||||
floatx80 floatx80_tan(floatx80 a, float_status *status);
|
||||
floatx80 floatx80_sin(floatx80 a, float_status *status);
|
||||
floatx80 floatx80_cos(floatx80 a, float_status *status);
|
||||
floatx80 floatx80_atan(floatx80 a, float_status *status);
|
||||
floatx80 floatx80_asin(floatx80 a, float_status *status);
|
||||
floatx80 floatx80_acos(floatx80 a, float_status *status);
|
||||
floatx80 floatx80_atanh(floatx80 a, float_status *status);
|
||||
floatx80 floatx80_etoxm1(floatx80 a, float_status *status);
|
||||
floatx80 floatx80_tanh(floatx80 a, float_status *status);
|
||||
floatx80 floatx80_sinh(floatx80 a, float_status *status);
|
||||
floatx80 floatx80_cosh(floatx80 a, float_status *status);
|
||||
#endif
|
||||
642
qemu/target/m68k/softfloat_fpsp_tables.h
Normal file
642
qemu/target/m68k/softfloat_fpsp_tables.h
Normal file
@@ -0,0 +1,642 @@
|
||||
/*
|
||||
* Ported from a work by Andreas Grabher for Previous, NeXT Computer Emulator,
|
||||
* derived from NetBSD M68040 FPSP functions,
|
||||
* derived from release 2a of the SoftFloat IEC/IEEE Floating-point Arithmetic
|
||||
* Package. Those parts of the code (and some later contributions) are
|
||||
* provided under that license, as detailed below.
|
||||
* It has subsequently been modified by contributors to the QEMU Project,
|
||||
* so some portions are provided under:
|
||||
* the SoftFloat-2a license
|
||||
* the BSD license
|
||||
* GPL-v2-or-later
|
||||
*
|
||||
* Any future contributions to this file will be taken to be licensed under
|
||||
* the Softfloat-2a license unless specifically indicated otherwise.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Portions of this work are licensed under the terms of the GNU GPL,
|
||||
* version 2 or later. See the COPYING file in the top-level directory.
|
||||
*/
|
||||
|
||||
#ifndef TARGET_M68K_SOFTFLOAT_FPSP_TABLES_H
|
||||
#define TARGET_M68K_SOFTFLOAT_FPSP_TABLES_H
|
||||
|
||||
static const floatx80 log_tbl[128] = {
|
||||
make_floatx80_init(0x3FFE, 0xFE03F80FE03F80FE),
|
||||
make_floatx80_init(0x3FF7, 0xFF015358833C47E2),
|
||||
make_floatx80_init(0x3FFE, 0xFA232CF252138AC0),
|
||||
make_floatx80_init(0x3FF9, 0xBDC8D83EAD88D549),
|
||||
make_floatx80_init(0x3FFE, 0xF6603D980F6603DA),
|
||||
make_floatx80_init(0x3FFA, 0x9CF43DCFF5EAFD48),
|
||||
make_floatx80_init(0x3FFE, 0xF2B9D6480F2B9D65),
|
||||
make_floatx80_init(0x3FFA, 0xDA16EB88CB8DF614),
|
||||
make_floatx80_init(0x3FFE, 0xEF2EB71FC4345238),
|
||||
make_floatx80_init(0x3FFB, 0x8B29B7751BD70743),
|
||||
make_floatx80_init(0x3FFE, 0xEBBDB2A5C1619C8C),
|
||||
make_floatx80_init(0x3FFB, 0xA8D839F830C1FB49),
|
||||
make_floatx80_init(0x3FFE, 0xE865AC7B7603A197),
|
||||
make_floatx80_init(0x3FFB, 0xC61A2EB18CD907AD),
|
||||
make_floatx80_init(0x3FFE, 0xE525982AF70C880E),
|
||||
make_floatx80_init(0x3FFB, 0xE2F2A47ADE3A18AF),
|
||||
make_floatx80_init(0x3FFE, 0xE1FC780E1FC780E2),
|
||||
make_floatx80_init(0x3FFB, 0xFF64898EDF55D551),
|
||||
make_floatx80_init(0x3FFE, 0xDEE95C4CA037BA57),
|
||||
make_floatx80_init(0x3FFC, 0x8DB956A97B3D0148),
|
||||
make_floatx80_init(0x3FFE, 0xDBEB61EED19C5958),
|
||||
make_floatx80_init(0x3FFC, 0x9B8FE100F47BA1DE),
|
||||
make_floatx80_init(0x3FFE, 0xD901B2036406C80E),
|
||||
make_floatx80_init(0x3FFC, 0xA9372F1D0DA1BD17),
|
||||
make_floatx80_init(0x3FFE, 0xD62B80D62B80D62C),
|
||||
make_floatx80_init(0x3FFC, 0xB6B07F38CE90E46B),
|
||||
make_floatx80_init(0x3FFE, 0xD3680D3680D3680D),
|
||||
make_floatx80_init(0x3FFC, 0xC3FD032906488481),
|
||||
make_floatx80_init(0x3FFE, 0xD0B69FCBD2580D0B),
|
||||
make_floatx80_init(0x3FFC, 0xD11DE0FF15AB18CA),
|
||||
make_floatx80_init(0x3FFE, 0xCE168A7725080CE1),
|
||||
make_floatx80_init(0x3FFC, 0xDE1433A16C66B150),
|
||||
make_floatx80_init(0x3FFE, 0xCB8727C065C393E0),
|
||||
make_floatx80_init(0x3FFC, 0xEAE10B5A7DDC8ADD),
|
||||
make_floatx80_init(0x3FFE, 0xC907DA4E871146AD),
|
||||
make_floatx80_init(0x3FFC, 0xF7856E5EE2C9B291),
|
||||
make_floatx80_init(0x3FFE, 0xC6980C6980C6980C),
|
||||
make_floatx80_init(0x3FFD, 0x82012CA5A68206D7),
|
||||
make_floatx80_init(0x3FFE, 0xC4372F855D824CA6),
|
||||
make_floatx80_init(0x3FFD, 0x882C5FCD7256A8C5),
|
||||
make_floatx80_init(0x3FFE, 0xC1E4BBD595F6E947),
|
||||
make_floatx80_init(0x3FFD, 0x8E44C60B4CCFD7DE),
|
||||
make_floatx80_init(0x3FFE, 0xBFA02FE80BFA02FF),
|
||||
make_floatx80_init(0x3FFD, 0x944AD09EF4351AF6),
|
||||
make_floatx80_init(0x3FFE, 0xBD69104707661AA3),
|
||||
make_floatx80_init(0x3FFD, 0x9A3EECD4C3EAA6B2),
|
||||
make_floatx80_init(0x3FFE, 0xBB3EE721A54D880C),
|
||||
make_floatx80_init(0x3FFD, 0xA0218434353F1DE8),
|
||||
make_floatx80_init(0x3FFE, 0xB92143FA36F5E02E),
|
||||
make_floatx80_init(0x3FFD, 0xA5F2FCABBBC506DA),
|
||||
make_floatx80_init(0x3FFE, 0xB70FBB5A19BE3659),
|
||||
make_floatx80_init(0x3FFD, 0xABB3B8BA2AD362A5),
|
||||
make_floatx80_init(0x3FFE, 0xB509E68A9B94821F),
|
||||
make_floatx80_init(0x3FFD, 0xB1641795CE3CA97B),
|
||||
make_floatx80_init(0x3FFE, 0xB30F63528917C80B),
|
||||
make_floatx80_init(0x3FFD, 0xB70475515D0F1C61),
|
||||
make_floatx80_init(0x3FFE, 0xB11FD3B80B11FD3C),
|
||||
make_floatx80_init(0x3FFD, 0xBC952AFEEA3D13E1),
|
||||
make_floatx80_init(0x3FFE, 0xAF3ADDC680AF3ADE),
|
||||
make_floatx80_init(0x3FFD, 0xC2168ED0F458BA4A),
|
||||
make_floatx80_init(0x3FFE, 0xAD602B580AD602B6),
|
||||
make_floatx80_init(0x3FFD, 0xC788F439B3163BF1),
|
||||
make_floatx80_init(0x3FFE, 0xAB8F69E28359CD11),
|
||||
make_floatx80_init(0x3FFD, 0xCCECAC08BF04565D),
|
||||
make_floatx80_init(0x3FFE, 0xA9C84A47A07F5638),
|
||||
make_floatx80_init(0x3FFD, 0xD24204872DD85160),
|
||||
make_floatx80_init(0x3FFE, 0xA80A80A80A80A80B),
|
||||
make_floatx80_init(0x3FFD, 0xD78949923BC3588A),
|
||||
make_floatx80_init(0x3FFE, 0xA655C4392D7B73A8),
|
||||
make_floatx80_init(0x3FFD, 0xDCC2C4B49887DACC),
|
||||
make_floatx80_init(0x3FFE, 0xA4A9CF1D96833751),
|
||||
make_floatx80_init(0x3FFD, 0xE1EEBD3E6D6A6B9E),
|
||||
make_floatx80_init(0x3FFE, 0xA3065E3FAE7CD0E0),
|
||||
make_floatx80_init(0x3FFD, 0xE70D785C2F9F5BDC),
|
||||
make_floatx80_init(0x3FFE, 0xA16B312EA8FC377D),
|
||||
make_floatx80_init(0x3FFD, 0xEC1F392C5179F283),
|
||||
make_floatx80_init(0x3FFE, 0x9FD809FD809FD80A),
|
||||
make_floatx80_init(0x3FFD, 0xF12440D3E36130E6),
|
||||
make_floatx80_init(0x3FFE, 0x9E4CAD23DD5F3A20),
|
||||
make_floatx80_init(0x3FFD, 0xF61CCE92346600BB),
|
||||
make_floatx80_init(0x3FFE, 0x9CC8E160C3FB19B9),
|
||||
make_floatx80_init(0x3FFD, 0xFB091FD38145630A),
|
||||
make_floatx80_init(0x3FFE, 0x9B4C6F9EF03A3CAA),
|
||||
make_floatx80_init(0x3FFD, 0xFFE97042BFA4C2AD),
|
||||
make_floatx80_init(0x3FFE, 0x99D722DABDE58F06),
|
||||
make_floatx80_init(0x3FFE, 0x825EFCED49369330),
|
||||
make_floatx80_init(0x3FFE, 0x9868C809868C8098),
|
||||
make_floatx80_init(0x3FFE, 0x84C37A7AB9A905C9),
|
||||
make_floatx80_init(0x3FFE, 0x97012E025C04B809),
|
||||
make_floatx80_init(0x3FFE, 0x87224C2E8E645FB7),
|
||||
make_floatx80_init(0x3FFE, 0x95A02568095A0257),
|
||||
make_floatx80_init(0x3FFE, 0x897B8CAC9F7DE298),
|
||||
make_floatx80_init(0x3FFE, 0x9445809445809446),
|
||||
make_floatx80_init(0x3FFE, 0x8BCF55DEC4CD05FE),
|
||||
make_floatx80_init(0x3FFE, 0x92F113840497889C),
|
||||
make_floatx80_init(0x3FFE, 0x8E1DC0FB89E125E5),
|
||||
make_floatx80_init(0x3FFE, 0x91A2B3C4D5E6F809),
|
||||
make_floatx80_init(0x3FFE, 0x9066E68C955B6C9B),
|
||||
make_floatx80_init(0x3FFE, 0x905A38633E06C43B),
|
||||
make_floatx80_init(0x3FFE, 0x92AADE74C7BE59E0),
|
||||
make_floatx80_init(0x3FFE, 0x8F1779D9FDC3A219),
|
||||
make_floatx80_init(0x3FFE, 0x94E9BFF615845643),
|
||||
make_floatx80_init(0x3FFE, 0x8DDA520237694809),
|
||||
make_floatx80_init(0x3FFE, 0x9723A1B720134203),
|
||||
make_floatx80_init(0x3FFE, 0x8CA29C046514E023),
|
||||
make_floatx80_init(0x3FFE, 0x995899C890EB8990),
|
||||
make_floatx80_init(0x3FFE, 0x8B70344A139BC75A),
|
||||
make_floatx80_init(0x3FFE, 0x9B88BDAA3A3DAE2F),
|
||||
make_floatx80_init(0x3FFE, 0x8A42F8705669DB46),
|
||||
make_floatx80_init(0x3FFE, 0x9DB4224FFFE1157C),
|
||||
make_floatx80_init(0x3FFE, 0x891AC73AE9819B50),
|
||||
make_floatx80_init(0x3FFE, 0x9FDADC268B7A12DA),
|
||||
make_floatx80_init(0x3FFE, 0x87F78087F78087F8),
|
||||
make_floatx80_init(0x3FFE, 0xA1FCFF17CE733BD4),
|
||||
make_floatx80_init(0x3FFE, 0x86D905447A34ACC6),
|
||||
make_floatx80_init(0x3FFE, 0xA41A9E8F5446FB9F),
|
||||
make_floatx80_init(0x3FFE, 0x85BF37612CEE3C9B),
|
||||
make_floatx80_init(0x3FFE, 0xA633CD7E6771CD8B),
|
||||
make_floatx80_init(0x3FFE, 0x84A9F9C8084A9F9D),
|
||||
make_floatx80_init(0x3FFE, 0xA8489E600B435A5E),
|
||||
make_floatx80_init(0x3FFE, 0x839930523FBE3368),
|
||||
make_floatx80_init(0x3FFE, 0xAA59233CCCA4BD49),
|
||||
make_floatx80_init(0x3FFE, 0x828CBFBEB9A020A3),
|
||||
make_floatx80_init(0x3FFE, 0xAC656DAE6BCC4985),
|
||||
make_floatx80_init(0x3FFE, 0x81848DA8FAF0D277),
|
||||
make_floatx80_init(0x3FFE, 0xAE6D8EE360BB2468),
|
||||
make_floatx80_init(0x3FFE, 0x8080808080808081),
|
||||
make_floatx80_init(0x3FFE, 0xB07197A23C46C654)
|
||||
};
|
||||
|
||||
static const floatx80 exp_tbl[64] = {
|
||||
make_floatx80_init(0x3FFF, 0x8000000000000000),
|
||||
make_floatx80_init(0x3FFF, 0x8164D1F3BC030774),
|
||||
make_floatx80_init(0x3FFF, 0x82CD8698AC2BA1D8),
|
||||
make_floatx80_init(0x3FFF, 0x843A28C3ACDE4048),
|
||||
make_floatx80_init(0x3FFF, 0x85AAC367CC487B14),
|
||||
make_floatx80_init(0x3FFF, 0x871F61969E8D1010),
|
||||
make_floatx80_init(0x3FFF, 0x88980E8092DA8528),
|
||||
make_floatx80_init(0x3FFF, 0x8A14D575496EFD9C),
|
||||
make_floatx80_init(0x3FFF, 0x8B95C1E3EA8BD6E8),
|
||||
make_floatx80_init(0x3FFF, 0x8D1ADF5B7E5BA9E4),
|
||||
make_floatx80_init(0x3FFF, 0x8EA4398B45CD53C0),
|
||||
make_floatx80_init(0x3FFF, 0x9031DC431466B1DC),
|
||||
make_floatx80_init(0x3FFF, 0x91C3D373AB11C338),
|
||||
make_floatx80_init(0x3FFF, 0x935A2B2F13E6E92C),
|
||||
make_floatx80_init(0x3FFF, 0x94F4EFA8FEF70960),
|
||||
make_floatx80_init(0x3FFF, 0x96942D3720185A00),
|
||||
make_floatx80_init(0x3FFF, 0x9837F0518DB8A970),
|
||||
make_floatx80_init(0x3FFF, 0x99E0459320B7FA64),
|
||||
make_floatx80_init(0x3FFF, 0x9B8D39B9D54E5538),
|
||||
make_floatx80_init(0x3FFF, 0x9D3ED9A72CFFB750),
|
||||
make_floatx80_init(0x3FFF, 0x9EF5326091A111AC),
|
||||
make_floatx80_init(0x3FFF, 0xA0B0510FB9714FC4),
|
||||
make_floatx80_init(0x3FFF, 0xA27043030C496818),
|
||||
make_floatx80_init(0x3FFF, 0xA43515AE09E680A0),
|
||||
make_floatx80_init(0x3FFF, 0xA5FED6A9B15138EC),
|
||||
make_floatx80_init(0x3FFF, 0xA7CD93B4E9653568),
|
||||
make_floatx80_init(0x3FFF, 0xA9A15AB4EA7C0EF8),
|
||||
make_floatx80_init(0x3FFF, 0xAB7A39B5A93ED338),
|
||||
make_floatx80_init(0x3FFF, 0xAD583EEA42A14AC8),
|
||||
make_floatx80_init(0x3FFF, 0xAF3B78AD690A4374),
|
||||
make_floatx80_init(0x3FFF, 0xB123F581D2AC2590),
|
||||
make_floatx80_init(0x3FFF, 0xB311C412A9112488),
|
||||
make_floatx80_init(0x3FFF, 0xB504F333F9DE6484),
|
||||
make_floatx80_init(0x3FFF, 0xB6FD91E328D17790),
|
||||
make_floatx80_init(0x3FFF, 0xB8FBAF4762FB9EE8),
|
||||
make_floatx80_init(0x3FFF, 0xBAFF5AB2133E45FC),
|
||||
make_floatx80_init(0x3FFF, 0xBD08A39F580C36C0),
|
||||
make_floatx80_init(0x3FFF, 0xBF1799B67A731084),
|
||||
make_floatx80_init(0x3FFF, 0xC12C4CCA66709458),
|
||||
make_floatx80_init(0x3FFF, 0xC346CCDA24976408),
|
||||
make_floatx80_init(0x3FFF, 0xC5672A115506DADC),
|
||||
make_floatx80_init(0x3FFF, 0xC78D74C8ABB9B15C),
|
||||
make_floatx80_init(0x3FFF, 0xC9B9BD866E2F27A4),
|
||||
make_floatx80_init(0x3FFF, 0xCBEC14FEF2727C5C),
|
||||
make_floatx80_init(0x3FFF, 0xCE248C151F8480E4),
|
||||
make_floatx80_init(0x3FFF, 0xD06333DAEF2B2594),
|
||||
make_floatx80_init(0x3FFF, 0xD2A81D91F12AE45C),
|
||||
make_floatx80_init(0x3FFF, 0xD4F35AABCFEDFA20),
|
||||
make_floatx80_init(0x3FFF, 0xD744FCCAD69D6AF4),
|
||||
make_floatx80_init(0x3FFF, 0xD99D15C278AFD7B4),
|
||||
make_floatx80_init(0x3FFF, 0xDBFBB797DAF23754),
|
||||
make_floatx80_init(0x3FFF, 0xDE60F4825E0E9124),
|
||||
make_floatx80_init(0x3FFF, 0xE0CCDEEC2A94E110),
|
||||
make_floatx80_init(0x3FFF, 0xE33F8972BE8A5A50),
|
||||
make_floatx80_init(0x3FFF, 0xE5B906E77C8348A8),
|
||||
make_floatx80_init(0x3FFF, 0xE8396A503C4BDC68),
|
||||
make_floatx80_init(0x3FFF, 0xEAC0C6E7DD243930),
|
||||
make_floatx80_init(0x3FFF, 0xED4F301ED9942B84),
|
||||
make_floatx80_init(0x3FFF, 0xEFE4B99BDCDAF5CC),
|
||||
make_floatx80_init(0x3FFF, 0xF281773C59FFB138),
|
||||
make_floatx80_init(0x3FFF, 0xF5257D152486CC2C),
|
||||
make_floatx80_init(0x3FFF, 0xF7D0DF730AD13BB8),
|
||||
make_floatx80_init(0x3FFF, 0xFA83B2DB722A033C),
|
||||
make_floatx80_init(0x3FFF, 0xFD3E0C0CF486C174)
|
||||
};
|
||||
|
||||
static const float32 exp_tbl2[64] = {
|
||||
const_float32(0x00000000),
|
||||
const_float32(0x9F841A9B),
|
||||
const_float32(0x9FC1D5B9),
|
||||
const_float32(0xA0728369),
|
||||
const_float32(0x1FC5C95C),
|
||||
const_float32(0x1EE85C9F),
|
||||
const_float32(0x9FA20729),
|
||||
const_float32(0xA07BF9AF),
|
||||
const_float32(0xA0020DCF),
|
||||
const_float32(0x205A63DA),
|
||||
const_float32(0x1EB70051),
|
||||
const_float32(0x1F6EB029),
|
||||
const_float32(0xA0781494),
|
||||
const_float32(0x9EB319B0),
|
||||
const_float32(0x2017457D),
|
||||
const_float32(0x1F11D537),
|
||||
const_float32(0x9FB952DD),
|
||||
const_float32(0x1FE43087),
|
||||
const_float32(0x1FA2A818),
|
||||
const_float32(0x1FDE494D),
|
||||
const_float32(0x20504890),
|
||||
const_float32(0xA073691C),
|
||||
const_float32(0x1F9B7A05),
|
||||
const_float32(0xA0797126),
|
||||
const_float32(0xA071A140),
|
||||
const_float32(0x204F62DA),
|
||||
const_float32(0x1F283C4A),
|
||||
const_float32(0x9F9A7FDC),
|
||||
const_float32(0xA05B3FAC),
|
||||
const_float32(0x1FDF2610),
|
||||
const_float32(0x9F705F90),
|
||||
const_float32(0x201F678A),
|
||||
const_float32(0x1F32FB13),
|
||||
const_float32(0x20038B30),
|
||||
const_float32(0x200DC3CC),
|
||||
const_float32(0x9F8B2AE6),
|
||||
const_float32(0xA02BBF70),
|
||||
const_float32(0xA00BF518),
|
||||
const_float32(0xA041DD41),
|
||||
const_float32(0x9FDF137B),
|
||||
const_float32(0x201F1568),
|
||||
const_float32(0x1FC13A2E),
|
||||
const_float32(0xA03F8F03),
|
||||
const_float32(0x1FF4907D),
|
||||
const_float32(0x9E6E53E4),
|
||||
const_float32(0x1FD6D45C),
|
||||
const_float32(0xA076EDB9),
|
||||
const_float32(0x9FA6DE21),
|
||||
const_float32(0x1EE69A2F),
|
||||
const_float32(0x207F439F),
|
||||
const_float32(0x201EC207),
|
||||
const_float32(0x9E8BE175),
|
||||
const_float32(0x20032C4B),
|
||||
const_float32(0x2004DFF5),
|
||||
const_float32(0x1E72F47A),
|
||||
const_float32(0x1F722F22),
|
||||
const_float32(0xA017E945),
|
||||
const_float32(0x1F401A5B),
|
||||
const_float32(0x9FB9A9E3),
|
||||
const_float32(0x20744C05),
|
||||
const_float32(0x1F773A19),
|
||||
const_float32(0x1FFE90D5),
|
||||
const_float32(0xA041ED22),
|
||||
const_float32(0x1F853F3A),
|
||||
};
|
||||
|
||||
static const floatx80 exp2_tbl[64] = {
|
||||
make_floatx80_init(0x3FFF, 0x8000000000000000),
|
||||
make_floatx80_init(0x3FFF, 0x8164D1F3BC030773),
|
||||
make_floatx80_init(0x3FFF, 0x82CD8698AC2BA1D7),
|
||||
make_floatx80_init(0x3FFF, 0x843A28C3ACDE4046),
|
||||
make_floatx80_init(0x3FFF, 0x85AAC367CC487B15),
|
||||
make_floatx80_init(0x3FFF, 0x871F61969E8D1010),
|
||||
make_floatx80_init(0x3FFF, 0x88980E8092DA8527),
|
||||
make_floatx80_init(0x3FFF, 0x8A14D575496EFD9A),
|
||||
make_floatx80_init(0x3FFF, 0x8B95C1E3EA8BD6E7),
|
||||
make_floatx80_init(0x3FFF, 0x8D1ADF5B7E5BA9E6),
|
||||
make_floatx80_init(0x3FFF, 0x8EA4398B45CD53C0),
|
||||
make_floatx80_init(0x3FFF, 0x9031DC431466B1DC),
|
||||
make_floatx80_init(0x3FFF, 0x91C3D373AB11C336),
|
||||
make_floatx80_init(0x3FFF, 0x935A2B2F13E6E92C),
|
||||
make_floatx80_init(0x3FFF, 0x94F4EFA8FEF70961),
|
||||
make_floatx80_init(0x3FFF, 0x96942D3720185A00),
|
||||
make_floatx80_init(0x3FFF, 0x9837F0518DB8A96F),
|
||||
make_floatx80_init(0x3FFF, 0x99E0459320B7FA65),
|
||||
make_floatx80_init(0x3FFF, 0x9B8D39B9D54E5539),
|
||||
make_floatx80_init(0x3FFF, 0x9D3ED9A72CFFB751),
|
||||
make_floatx80_init(0x3FFF, 0x9EF5326091A111AE),
|
||||
make_floatx80_init(0x3FFF, 0xA0B0510FB9714FC2),
|
||||
make_floatx80_init(0x3FFF, 0xA27043030C496819),
|
||||
make_floatx80_init(0x3FFF, 0xA43515AE09E6809E),
|
||||
make_floatx80_init(0x3FFF, 0xA5FED6A9B15138EA),
|
||||
make_floatx80_init(0x3FFF, 0xA7CD93B4E965356A),
|
||||
make_floatx80_init(0x3FFF, 0xA9A15AB4EA7C0EF8),
|
||||
make_floatx80_init(0x3FFF, 0xAB7A39B5A93ED337),
|
||||
make_floatx80_init(0x3FFF, 0xAD583EEA42A14AC6),
|
||||
make_floatx80_init(0x3FFF, 0xAF3B78AD690A4375),
|
||||
make_floatx80_init(0x3FFF, 0xB123F581D2AC2590),
|
||||
make_floatx80_init(0x3FFF, 0xB311C412A9112489),
|
||||
make_floatx80_init(0x3FFF, 0xB504F333F9DE6484),
|
||||
make_floatx80_init(0x3FFF, 0xB6FD91E328D17791),
|
||||
make_floatx80_init(0x3FFF, 0xB8FBAF4762FB9EE9),
|
||||
make_floatx80_init(0x3FFF, 0xBAFF5AB2133E45FB),
|
||||
make_floatx80_init(0x3FFF, 0xBD08A39F580C36BF),
|
||||
make_floatx80_init(0x3FFF, 0xBF1799B67A731083),
|
||||
make_floatx80_init(0x3FFF, 0xC12C4CCA66709456),
|
||||
make_floatx80_init(0x3FFF, 0xC346CCDA24976407),
|
||||
make_floatx80_init(0x3FFF, 0xC5672A115506DADD),
|
||||
make_floatx80_init(0x3FFF, 0xC78D74C8ABB9B15D),
|
||||
make_floatx80_init(0x3FFF, 0xC9B9BD866E2F27A3),
|
||||
make_floatx80_init(0x3FFF, 0xCBEC14FEF2727C5D),
|
||||
make_floatx80_init(0x3FFF, 0xCE248C151F8480E4),
|
||||
make_floatx80_init(0x3FFF, 0xD06333DAEF2B2595),
|
||||
make_floatx80_init(0x3FFF, 0xD2A81D91F12AE45A),
|
||||
make_floatx80_init(0x3FFF, 0xD4F35AABCFEDFA1F),
|
||||
make_floatx80_init(0x3FFF, 0xD744FCCAD69D6AF4),
|
||||
make_floatx80_init(0x3FFF, 0xD99D15C278AFD7B6),
|
||||
make_floatx80_init(0x3FFF, 0xDBFBB797DAF23755),
|
||||
make_floatx80_init(0x3FFF, 0xDE60F4825E0E9124),
|
||||
make_floatx80_init(0x3FFF, 0xE0CCDEEC2A94E111),
|
||||
make_floatx80_init(0x3FFF, 0xE33F8972BE8A5A51),
|
||||
make_floatx80_init(0x3FFF, 0xE5B906E77C8348A8),
|
||||
make_floatx80_init(0x3FFF, 0xE8396A503C4BDC68),
|
||||
make_floatx80_init(0x3FFF, 0xEAC0C6E7DD24392F),
|
||||
make_floatx80_init(0x3FFF, 0xED4F301ED9942B84),
|
||||
make_floatx80_init(0x3FFF, 0xEFE4B99BDCDAF5CB),
|
||||
make_floatx80_init(0x3FFF, 0xF281773C59FFB13A),
|
||||
make_floatx80_init(0x3FFF, 0xF5257D152486CC2C),
|
||||
make_floatx80_init(0x3FFF, 0xF7D0DF730AD13BB9),
|
||||
make_floatx80_init(0x3FFF, 0xFA83B2DB722A033A),
|
||||
make_floatx80_init(0x3FFF, 0xFD3E0C0CF486C175)
|
||||
};
|
||||
|
||||
static const uint32_t exp2_tbl2[64] = {
|
||||
0x3F738000, 0x3FBEF7CA, 0x3FBDF8A9, 0x3FBCD7C9,
|
||||
0xBFBDE8DA, 0x3FBDE85C, 0x3FBEBBF1, 0x3FBB80CA,
|
||||
0xBFBA8373, 0xBFBE9670, 0x3FBDB700, 0x3FBEEEB0,
|
||||
0x3FBBFD6D, 0xBFBDB319, 0x3FBDBA2B, 0x3FBE91D5,
|
||||
0x3FBE8D5A, 0xBFBCDE7B, 0xBFBEBAAF, 0xBFBD86DA,
|
||||
0xBFBEBEDD, 0x3FBCC96E, 0xBFBEC90B, 0x3FBBD1DB,
|
||||
0x3FBCE5EB, 0xBFBEC274, 0x3FBEA83C, 0x3FBECB00,
|
||||
0x3FBE9301, 0xBFBD8367, 0xBFBEF05F, 0x3FBDFB3C,
|
||||
0x3FBEB2FB, 0x3FBAE2CB, 0x3FBCDC3C, 0x3FBEE9AA,
|
||||
0xBFBEAEFD, 0xBFBCBF51, 0x3FBEF88A, 0x3FBD83B2,
|
||||
0x3FBDF8AB, 0xBFBDFB17, 0xBFBEFE3C, 0xBFBBB6F8,
|
||||
0xBFBCEE53, 0xBFBDA4AE, 0x3FBC9124, 0x3FBEB243,
|
||||
0x3FBDE69A, 0xBFB8BC61, 0x3FBDF610, 0xBFBD8BE1,
|
||||
0x3FBACB12, 0x3FBB9BFE, 0x3FBCF2F4, 0x3FBEF22F,
|
||||
0xBFBDBF4A, 0x3FBEC01A, 0x3FBE8CAC, 0xBFBCBB3F,
|
||||
0x3FBEF73A, 0xBFB8B795, 0x3FBEF84B, 0xBFBEF581
|
||||
};
|
||||
|
||||
static const floatx80 pi_tbl[65] = {
|
||||
make_floatx80_init(0xC004, 0xC90FDAA22168C235),
|
||||
make_floatx80_init(0xC004, 0xC2C75BCD105D7C23),
|
||||
make_floatx80_init(0xC004, 0xBC7EDCF7FF523611),
|
||||
make_floatx80_init(0xC004, 0xB6365E22EE46F000),
|
||||
make_floatx80_init(0xC004, 0xAFEDDF4DDD3BA9EE),
|
||||
make_floatx80_init(0xC004, 0xA9A56078CC3063DD),
|
||||
make_floatx80_init(0xC004, 0xA35CE1A3BB251DCB),
|
||||
make_floatx80_init(0xC004, 0x9D1462CEAA19D7B9),
|
||||
make_floatx80_init(0xC004, 0x96CBE3F9990E91A8),
|
||||
make_floatx80_init(0xC004, 0x9083652488034B96),
|
||||
make_floatx80_init(0xC004, 0x8A3AE64F76F80584),
|
||||
make_floatx80_init(0xC004, 0x83F2677A65ECBF73),
|
||||
make_floatx80_init(0xC003, 0xFB53D14AA9C2F2C2),
|
||||
make_floatx80_init(0xC003, 0xEEC2D3A087AC669F),
|
||||
make_floatx80_init(0xC003, 0xE231D5F66595DA7B),
|
||||
make_floatx80_init(0xC003, 0xD5A0D84C437F4E58),
|
||||
make_floatx80_init(0xC003, 0xC90FDAA22168C235),
|
||||
make_floatx80_init(0xC003, 0xBC7EDCF7FF523611),
|
||||
make_floatx80_init(0xC003, 0xAFEDDF4DDD3BA9EE),
|
||||
make_floatx80_init(0xC003, 0xA35CE1A3BB251DCB),
|
||||
make_floatx80_init(0xC003, 0x96CBE3F9990E91A8),
|
||||
make_floatx80_init(0xC003, 0x8A3AE64F76F80584),
|
||||
make_floatx80_init(0xC002, 0xFB53D14AA9C2F2C2),
|
||||
make_floatx80_init(0xC002, 0xE231D5F66595DA7B),
|
||||
make_floatx80_init(0xC002, 0xC90FDAA22168C235),
|
||||
make_floatx80_init(0xC002, 0xAFEDDF4DDD3BA9EE),
|
||||
make_floatx80_init(0xC002, 0x96CBE3F9990E91A8),
|
||||
make_floatx80_init(0xC001, 0xFB53D14AA9C2F2C2),
|
||||
make_floatx80_init(0xC001, 0xC90FDAA22168C235),
|
||||
make_floatx80_init(0xC001, 0x96CBE3F9990E91A8),
|
||||
make_floatx80_init(0xC000, 0xC90FDAA22168C235),
|
||||
make_floatx80_init(0xBFFF, 0xC90FDAA22168C235),
|
||||
make_floatx80_init(0x0000, 0x0000000000000000),
|
||||
make_floatx80_init(0x3FFF, 0xC90FDAA22168C235),
|
||||
make_floatx80_init(0x4000, 0xC90FDAA22168C235),
|
||||
make_floatx80_init(0x4001, 0x96CBE3F9990E91A8),
|
||||
make_floatx80_init(0x4001, 0xC90FDAA22168C235),
|
||||
make_floatx80_init(0x4001, 0xFB53D14AA9C2F2C2),
|
||||
make_floatx80_init(0x4002, 0x96CBE3F9990E91A8),
|
||||
make_floatx80_init(0x4002, 0xAFEDDF4DDD3BA9EE),
|
||||
make_floatx80_init(0x4002, 0xC90FDAA22168C235),
|
||||
make_floatx80_init(0x4002, 0xE231D5F66595DA7B),
|
||||
make_floatx80_init(0x4002, 0xFB53D14AA9C2F2C2),
|
||||
make_floatx80_init(0x4003, 0x8A3AE64F76F80584),
|
||||
make_floatx80_init(0x4003, 0x96CBE3F9990E91A8),
|
||||
make_floatx80_init(0x4003, 0xA35CE1A3BB251DCB),
|
||||
make_floatx80_init(0x4003, 0xAFEDDF4DDD3BA9EE),
|
||||
make_floatx80_init(0x4003, 0xBC7EDCF7FF523611),
|
||||
make_floatx80_init(0x4003, 0xC90FDAA22168C235),
|
||||
make_floatx80_init(0x4003, 0xD5A0D84C437F4E58),
|
||||
make_floatx80_init(0x4003, 0xE231D5F66595DA7B),
|
||||
make_floatx80_init(0x4003, 0xEEC2D3A087AC669F),
|
||||
make_floatx80_init(0x4003, 0xFB53D14AA9C2F2C2),
|
||||
make_floatx80_init(0x4004, 0x83F2677A65ECBF73),
|
||||
make_floatx80_init(0x4004, 0x8A3AE64F76F80584),
|
||||
make_floatx80_init(0x4004, 0x9083652488034B96),
|
||||
make_floatx80_init(0x4004, 0x96CBE3F9990E91A8),
|
||||
make_floatx80_init(0x4004, 0x9D1462CEAA19D7B9),
|
||||
make_floatx80_init(0x4004, 0xA35CE1A3BB251DCB),
|
||||
make_floatx80_init(0x4004, 0xA9A56078CC3063DD),
|
||||
make_floatx80_init(0x4004, 0xAFEDDF4DDD3BA9EE),
|
||||
make_floatx80_init(0x4004, 0xB6365E22EE46F000),
|
||||
make_floatx80_init(0x4004, 0xBC7EDCF7FF523611),
|
||||
make_floatx80_init(0x4004, 0xC2C75BCD105D7C23),
|
||||
make_floatx80_init(0x4004, 0xC90FDAA22168C235)
|
||||
};
|
||||
|
||||
static const float32 pi_tbl2[65] = {
|
||||
const_float32(0x21800000),
|
||||
const_float32(0xA0D00000),
|
||||
const_float32(0xA1E80000),
|
||||
const_float32(0x21480000),
|
||||
const_float32(0xA1200000),
|
||||
const_float32(0x21FC0000),
|
||||
const_float32(0x21100000),
|
||||
const_float32(0xA1580000),
|
||||
const_float32(0x21E00000),
|
||||
const_float32(0x20B00000),
|
||||
const_float32(0xA1880000),
|
||||
const_float32(0x21C40000),
|
||||
const_float32(0x20000000),
|
||||
const_float32(0x21380000),
|
||||
const_float32(0xA1300000),
|
||||
const_float32(0x9FC00000),
|
||||
const_float32(0x21000000),
|
||||
const_float32(0xA1680000),
|
||||
const_float32(0xA0A00000),
|
||||
const_float32(0x20900000),
|
||||
const_float32(0x21600000),
|
||||
const_float32(0xA1080000),
|
||||
const_float32(0x1F800000),
|
||||
const_float32(0xA0B00000),
|
||||
const_float32(0x20800000),
|
||||
const_float32(0xA0200000),
|
||||
const_float32(0x20E00000),
|
||||
const_float32(0x1F000000),
|
||||
const_float32(0x20000000),
|
||||
const_float32(0x20600000),
|
||||
const_float32(0x1F800000),
|
||||
const_float32(0x1F000000),
|
||||
const_float32(0x00000000),
|
||||
const_float32(0x9F000000),
|
||||
const_float32(0x9F800000),
|
||||
const_float32(0xA0600000),
|
||||
const_float32(0xA0000000),
|
||||
const_float32(0x9F000000),
|
||||
const_float32(0xA0E00000),
|
||||
const_float32(0x20200000),
|
||||
const_float32(0xA0800000),
|
||||
const_float32(0x20B00000),
|
||||
const_float32(0x9F800000),
|
||||
const_float32(0x21080000),
|
||||
const_float32(0xA1600000),
|
||||
const_float32(0xA0900000),
|
||||
const_float32(0x20A00000),
|
||||
const_float32(0x21680000),
|
||||
const_float32(0xA1000000),
|
||||
const_float32(0x1FC00000),
|
||||
const_float32(0x21300000),
|
||||
const_float32(0xA1380000),
|
||||
const_float32(0xA0000000),
|
||||
const_float32(0xA1C40000),
|
||||
const_float32(0x21880000),
|
||||
const_float32(0xA0B00000),
|
||||
const_float32(0xA1E00000),
|
||||
const_float32(0x21580000),
|
||||
const_float32(0xA1100000),
|
||||
const_float32(0xA1FC0000),
|
||||
const_float32(0x21200000),
|
||||
const_float32(0xA1480000),
|
||||
const_float32(0x21E80000),
|
||||
const_float32(0x20D00000),
|
||||
const_float32(0xA1800000),
|
||||
};
|
||||
|
||||
static const floatx80 atan_tbl[128] = {
|
||||
make_floatx80_init(0x3FFB, 0x83D152C5060B7A51),
|
||||
make_floatx80_init(0x3FFB, 0x8BC8544565498B8B),
|
||||
make_floatx80_init(0x3FFB, 0x93BE406017626B0D),
|
||||
make_floatx80_init(0x3FFB, 0x9BB3078D35AEC202),
|
||||
make_floatx80_init(0x3FFB, 0xA3A69A525DDCE7DE),
|
||||
make_floatx80_init(0x3FFB, 0xAB98E94362765619),
|
||||
make_floatx80_init(0x3FFB, 0xB389E502F9C59862),
|
||||
make_floatx80_init(0x3FFB, 0xBB797E436B09E6FB),
|
||||
make_floatx80_init(0x3FFB, 0xC367A5C739E5F446),
|
||||
make_floatx80_init(0x3FFB, 0xCB544C61CFF7D5C6),
|
||||
make_floatx80_init(0x3FFB, 0xD33F62F82488533E),
|
||||
make_floatx80_init(0x3FFB, 0xDB28DA8162404C77),
|
||||
make_floatx80_init(0x3FFB, 0xE310A4078AD34F18),
|
||||
make_floatx80_init(0x3FFB, 0xEAF6B0A8188EE1EB),
|
||||
make_floatx80_init(0x3FFB, 0xF2DAF1949DBE79D5),
|
||||
make_floatx80_init(0x3FFB, 0xFABD581361D47E3E),
|
||||
make_floatx80_init(0x3FFC, 0x8346AC210959ECC4),
|
||||
make_floatx80_init(0x3FFC, 0x8B232A08304282D8),
|
||||
make_floatx80_init(0x3FFC, 0x92FB70B8D29AE2F9),
|
||||
make_floatx80_init(0x3FFC, 0x9ACF476F5CCD1CB4),
|
||||
make_floatx80_init(0x3FFC, 0xA29E76304954F23F),
|
||||
make_floatx80_init(0x3FFC, 0xAA68C5D08AB85230),
|
||||
make_floatx80_init(0x3FFC, 0xB22DFFFD9D539F83),
|
||||
make_floatx80_init(0x3FFC, 0xB9EDEF453E900EA5),
|
||||
make_floatx80_init(0x3FFC, 0xC1A85F1CC75E3EA5),
|
||||
make_floatx80_init(0x3FFC, 0xC95D1BE828138DE6),
|
||||
make_floatx80_init(0x3FFC, 0xD10BF300840D2DE4),
|
||||
make_floatx80_init(0x3FFC, 0xD8B4B2BA6BC05E7A),
|
||||
make_floatx80_init(0x3FFC, 0xE0572A6BB42335F6),
|
||||
make_floatx80_init(0x3FFC, 0xE7F32A70EA9CAA8F),
|
||||
make_floatx80_init(0x3FFC, 0xEF88843264ECEFAA),
|
||||
make_floatx80_init(0x3FFC, 0xF7170A28ECC06666),
|
||||
make_floatx80_init(0x3FFD, 0x812FD288332DAD32),
|
||||
make_floatx80_init(0x3FFD, 0x88A8D1B1218E4D64),
|
||||
make_floatx80_init(0x3FFD, 0x9012AB3F23E4AEE8),
|
||||
make_floatx80_init(0x3FFD, 0x976CC3D411E7F1B9),
|
||||
make_floatx80_init(0x3FFD, 0x9EB689493889A227),
|
||||
make_floatx80_init(0x3FFD, 0xA5EF72C34487361B),
|
||||
make_floatx80_init(0x3FFD, 0xAD1700BAF07A7227),
|
||||
make_floatx80_init(0x3FFD, 0xB42CBCFAFD37EFB7),
|
||||
make_floatx80_init(0x3FFD, 0xBB303A940BA80F89),
|
||||
make_floatx80_init(0x3FFD, 0xC22115C6FCAEBBAF),
|
||||
make_floatx80_init(0x3FFD, 0xC8FEF3E686331221),
|
||||
make_floatx80_init(0x3FFD, 0xCFC98330B4000C70),
|
||||
make_floatx80_init(0x3FFD, 0xD6807AA1102C5BF9),
|
||||
make_floatx80_init(0x3FFD, 0xDD2399BC31252AA3),
|
||||
make_floatx80_init(0x3FFD, 0xE3B2A8556B8FC517),
|
||||
make_floatx80_init(0x3FFD, 0xEA2D764F64315989),
|
||||
make_floatx80_init(0x3FFD, 0xF3BF5BF8BAD1A21D),
|
||||
make_floatx80_init(0x3FFE, 0x801CE39E0D205C9A),
|
||||
make_floatx80_init(0x3FFE, 0x8630A2DADA1ED066),
|
||||
make_floatx80_init(0x3FFE, 0x8C1AD445F3E09B8C),
|
||||
make_floatx80_init(0x3FFE, 0x91DB8F1664F350E2),
|
||||
make_floatx80_init(0x3FFE, 0x97731420365E538C),
|
||||
make_floatx80_init(0x3FFE, 0x9CE1C8E6A0B8CDBA),
|
||||
make_floatx80_init(0x3FFE, 0xA22832DBCADAAE09),
|
||||
make_floatx80_init(0x3FFE, 0xA746F2DDB7602294),
|
||||
make_floatx80_init(0x3FFE, 0xAC3EC0FB997DD6A2),
|
||||
make_floatx80_init(0x3FFE, 0xB110688AEBDC6F6A),
|
||||
make_floatx80_init(0x3FFE, 0xB5BCC49059ECC4B0),
|
||||
make_floatx80_init(0x3FFE, 0xBA44BC7DD470782F),
|
||||
make_floatx80_init(0x3FFE, 0xBEA94144FD049AAC),
|
||||
make_floatx80_init(0x3FFE, 0xC2EB4ABB661628B6),
|
||||
make_floatx80_init(0x3FFE, 0xC70BD54CE602EE14),
|
||||
make_floatx80_init(0x3FFE, 0xCD000549ADEC7159),
|
||||
make_floatx80_init(0x3FFE, 0xD48457D2D8EA4EA3),
|
||||
make_floatx80_init(0x3FFE, 0xDB948DA712DECE3B),
|
||||
make_floatx80_init(0x3FFE, 0xE23855F969E8096A),
|
||||
make_floatx80_init(0x3FFE, 0xE8771129C4353259),
|
||||
make_floatx80_init(0x3FFE, 0xEE57C16E0D379C0D),
|
||||
make_floatx80_init(0x3FFE, 0xF3E10211A87C3779),
|
||||
make_floatx80_init(0x3FFE, 0xF919039D758B8D41),
|
||||
make_floatx80_init(0x3FFE, 0xFE058B8F64935FB3),
|
||||
make_floatx80_init(0x3FFF, 0x8155FB497B685D04),
|
||||
make_floatx80_init(0x3FFF, 0x83889E3549D108E1),
|
||||
make_floatx80_init(0x3FFF, 0x859CFA76511D724B),
|
||||
make_floatx80_init(0x3FFF, 0x87952ECFFF8131E7),
|
||||
make_floatx80_init(0x3FFF, 0x89732FD19557641B),
|
||||
make_floatx80_init(0x3FFF, 0x8B38CAD101932A35),
|
||||
make_floatx80_init(0x3FFF, 0x8CE7A8D8301EE6B5),
|
||||
make_floatx80_init(0x3FFF, 0x8F46A39E2EAE5281),
|
||||
make_floatx80_init(0x3FFF, 0x922DA7D791888487),
|
||||
make_floatx80_init(0x3FFF, 0x94D19FCBDEDF5241),
|
||||
make_floatx80_init(0x3FFF, 0x973AB94419D2A08B),
|
||||
make_floatx80_init(0x3FFF, 0x996FF00E08E10B96),
|
||||
make_floatx80_init(0x3FFF, 0x9B773F9512321DA7),
|
||||
make_floatx80_init(0x3FFF, 0x9D55CC320F935624),
|
||||
make_floatx80_init(0x3FFF, 0x9F100575006CC571),
|
||||
make_floatx80_init(0x3FFF, 0xA0A9C290D97CC06C),
|
||||
make_floatx80_init(0x3FFF, 0xA22659EBEBC0630A),
|
||||
make_floatx80_init(0x3FFF, 0xA388B4AFF6EF0EC9),
|
||||
make_floatx80_init(0x3FFF, 0xA4D35F1061D292C4),
|
||||
make_floatx80_init(0x3FFF, 0xA60895DCFBE3187E),
|
||||
make_floatx80_init(0x3FFF, 0xA72A51DC7367BEAC),
|
||||
make_floatx80_init(0x3FFF, 0xA83A51530956168F),
|
||||
make_floatx80_init(0x3FFF, 0xA93A20077539546E),
|
||||
make_floatx80_init(0x3FFF, 0xAA9E7245023B2605),
|
||||
make_floatx80_init(0x3FFF, 0xAC4C84BA6FE4D58F),
|
||||
make_floatx80_init(0x3FFF, 0xADCE4A4A606B9712),
|
||||
make_floatx80_init(0x3FFF, 0xAF2A2DCD8D263C9C),
|
||||
make_floatx80_init(0x3FFF, 0xB0656F81F22265C7),
|
||||
make_floatx80_init(0x3FFF, 0xB18465150F71496A),
|
||||
make_floatx80_init(0x3FFF, 0xB28AAA156F9ADA35),
|
||||
make_floatx80_init(0x3FFF, 0xB37B44FF3766B895),
|
||||
make_floatx80_init(0x3FFF, 0xB458C3DCE9630433),
|
||||
make_floatx80_init(0x3FFF, 0xB525529D562246BD),
|
||||
make_floatx80_init(0x3FFF, 0xB5E2CCA95F9D88CC),
|
||||
make_floatx80_init(0x3FFF, 0xB692CADA7ACA1ADA),
|
||||
make_floatx80_init(0x3FFF, 0xB736AEA7A6925838),
|
||||
make_floatx80_init(0x3FFF, 0xB7CFAB287E9F7B36),
|
||||
make_floatx80_init(0x3FFF, 0xB85ECC66CB219835),
|
||||
make_floatx80_init(0x3FFF, 0xB8E4FD5A20A593DA),
|
||||
make_floatx80_init(0x3FFF, 0xB99F41F64AFF9BB5),
|
||||
make_floatx80_init(0x3FFF, 0xBA7F1E17842BBE7B),
|
||||
make_floatx80_init(0x3FFF, 0xBB4712857637E17D),
|
||||
make_floatx80_init(0x3FFF, 0xBBFABE8A4788DF6F),
|
||||
make_floatx80_init(0x3FFF, 0xBC9D0FAD2B689D79),
|
||||
make_floatx80_init(0x3FFF, 0xBD306A39471ECD86),
|
||||
make_floatx80_init(0x3FFF, 0xBDB6C731856AF18A),
|
||||
make_floatx80_init(0x3FFF, 0xBE31CAC502E80D70),
|
||||
make_floatx80_init(0x3FFF, 0xBEA2D55CE33194E2),
|
||||
make_floatx80_init(0x3FFF, 0xBF0B10B7C03128F0),
|
||||
make_floatx80_init(0x3FFF, 0xBF6B7A18DACB778D),
|
||||
make_floatx80_init(0x3FFF, 0xBFC4EA4663FA18F6),
|
||||
make_floatx80_init(0x3FFF, 0xC0181BDE8B89A454),
|
||||
make_floatx80_init(0x3FFF, 0xC065B066CFBF6439),
|
||||
make_floatx80_init(0x3FFF, 0xC0AE345F56340AE6),
|
||||
make_floatx80_init(0x3FFF, 0xC0F222919CB9E6A7)
|
||||
};
|
||||
#endif
|
||||
6452
qemu/target/m68k/translate.c
Normal file
6452
qemu/target/m68k/translate.c
Normal file
File diff suppressed because it is too large
Load Diff
166
qemu/target/m68k/unicorn.c
Normal file
166
qemu/target/m68k/unicorn.c
Normal file
@@ -0,0 +1,166 @@
|
||||
/* Unicorn Emulator Engine */
|
||||
/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2015 */
|
||||
/* Modified for Unicorn Engine by Chen Huitao<chenhuitao@hfmrit.com>, 2020 */
|
||||
|
||||
#include "sysemu/cpus.h"
|
||||
#include "cpu.h"
|
||||
#include "unicorn_common.h"
|
||||
#include "uc_priv.h"
|
||||
#include "unicorn.h"
|
||||
|
||||
M68kCPU *cpu_m68k_init(struct uc_struct *uc, const char *cpu_model);
|
||||
|
||||
static void m68k_set_pc(struct uc_struct *uc, uint64_t address)
|
||||
{
|
||||
((CPUM68KState *)uc->cpu->env_ptr)->pc = address;
|
||||
}
|
||||
|
||||
static void m68k_release(void* ctx)
|
||||
{
|
||||
int i;
|
||||
TCGContext *tcg_ctx = (TCGContext *)ctx;
|
||||
M68kCPU *cpu = (M68kCPU *)tcg_ctx->uc->cpu;
|
||||
CPUTLBDesc *d = cpu->neg.tlb.d;
|
||||
CPUTLBDescFast *f = cpu->neg.tlb.f;
|
||||
CPUTLBDesc *desc;
|
||||
CPUTLBDescFast *fast;
|
||||
|
||||
release_common(ctx);
|
||||
for (i = 0; i < NB_MMU_MODES; i++) {
|
||||
desc = &(d[i]);
|
||||
fast = &(f[i]);
|
||||
g_free(desc->iotlb);
|
||||
g_free(fast->table);
|
||||
}
|
||||
}
|
||||
|
||||
void m68k_reg_reset(struct uc_struct *uc)
|
||||
{
|
||||
CPUArchState *env = uc->cpu->env_ptr;
|
||||
|
||||
memset(env->aregs, 0, sizeof(env->aregs));
|
||||
memset(env->dregs, 0, sizeof(env->dregs));
|
||||
|
||||
env->pc = 0;
|
||||
}
|
||||
|
||||
static void reg_read(CPUM68KState *env, unsigned int regid, void *value)
|
||||
{
|
||||
if (regid >= UC_M68K_REG_A0 && regid <= UC_M68K_REG_A7)
|
||||
*(int32_t *)value = env->aregs[regid - UC_M68K_REG_A0];
|
||||
else if (regid >= UC_M68K_REG_D0 && regid <= UC_M68K_REG_D7)
|
||||
*(int32_t *)value = env->dregs[regid - UC_M68K_REG_D0];
|
||||
else {
|
||||
switch(regid) {
|
||||
default: break;
|
||||
case UC_M68K_REG_PC:
|
||||
*(int32_t *)value = env->pc;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
static void reg_write(CPUM68KState *env, unsigned int regid, const void *value)
|
||||
{
|
||||
if (regid >= UC_M68K_REG_A0 && regid <= UC_M68K_REG_A7)
|
||||
env->aregs[regid - UC_M68K_REG_A0] = *(uint32_t *)value;
|
||||
else if (regid >= UC_M68K_REG_D0 && regid <= UC_M68K_REG_D7)
|
||||
env->dregs[regid - UC_M68K_REG_D0] = *(uint32_t *)value;
|
||||
else {
|
||||
switch(regid) {
|
||||
default: break;
|
||||
case UC_M68K_REG_PC:
|
||||
env->pc = *(uint32_t *)value;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
int m68k_reg_read(struct uc_struct *uc, unsigned int *regs, void **vals, int count)
|
||||
{
|
||||
CPUM68KState* env = &(M68K_CPU(uc->cpu)->env);
|
||||
int i;
|
||||
|
||||
for (i = 0; i < count; i++) {
|
||||
unsigned int regid = regs[i];
|
||||
void *value = vals[i];
|
||||
reg_read(env, regid, value);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int m68k_reg_write(struct uc_struct *uc, unsigned int *regs, void *const *vals, int count)
|
||||
{
|
||||
CPUM68KState* env = &(M68K_CPU(uc->cpu)->env);
|
||||
int i;
|
||||
|
||||
for (i = 0; i < count; i++) {
|
||||
unsigned int regid = regs[i];
|
||||
const void *value = vals[i];
|
||||
reg_write(env, regid, value);
|
||||
if (regid == UC_M68K_REG_PC){
|
||||
// force to quit execution and flush TB
|
||||
uc->quit_request = true;
|
||||
uc_emu_stop(uc);
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
DEFAULT_VISIBILITY
|
||||
int m68k_context_reg_read(struct uc_context *ctx, unsigned int *regs, void **vals, int count)
|
||||
{
|
||||
CPUM68KState* env = (CPUM68KState* )ctx->data;
|
||||
int i;
|
||||
|
||||
for (i = 0; i < count; i++) {
|
||||
unsigned int regid = regs[i];
|
||||
void *value = vals[i];
|
||||
reg_read(env, regid, value);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
DEFAULT_VISIBILITY
|
||||
int m68k_context_reg_write(struct uc_context *ctx, unsigned int *regs, void *const *vals, int count)
|
||||
{
|
||||
CPUM68KState* env = (CPUM68KState* )ctx->data;
|
||||
int i;
|
||||
|
||||
for (i = 0; i < count; i++) {
|
||||
unsigned int regid = regs[i];
|
||||
const void *value = vals[i];
|
||||
reg_write(env, regid, value);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int m68k_cpus_init(struct uc_struct *uc, const char *cpu_model)
|
||||
{
|
||||
M68kCPU *cpu;
|
||||
|
||||
cpu = cpu_m68k_init(uc, cpu_model);
|
||||
if (cpu == NULL) {
|
||||
return -1;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
DEFAULT_VISIBILITY
|
||||
void m68k_uc_init(struct uc_struct* uc)
|
||||
{
|
||||
uc->release = m68k_release;
|
||||
uc->reg_read = m68k_reg_read;
|
||||
uc->reg_write = m68k_reg_write;
|
||||
uc->reg_reset = m68k_reg_reset;
|
||||
uc->set_pc = m68k_set_pc;
|
||||
uc->cpus_init = m68k_cpus_init;
|
||||
uc->cpu_context_size = offsetof(CPUM68KState, end_reset_fields);
|
||||
uc_common_init(uc);
|
||||
}
|
||||
16
qemu/target/m68k/unicorn.h
Normal file
16
qemu/target/m68k/unicorn.h
Normal file
@@ -0,0 +1,16 @@
|
||||
/* Unicorn Emulator Engine */
|
||||
/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2015 */
|
||||
|
||||
#ifndef UC_QEMU_TARGET_M68K_H
|
||||
#define UC_QEMU_TARGET_M68K_H
|
||||
|
||||
// functions to read & write registers
|
||||
int m68k_reg_read(struct uc_struct *uc, unsigned int *regs, void **vals, int count);
|
||||
int m68k_reg_write(struct uc_struct *uc, unsigned int *regs, void *const *vals, int count);
|
||||
int m68k_context_reg_read(struct uc_context *ctx, unsigned int *regs, void **vals, int count);
|
||||
int m68k_context_reg_write(struct uc_context *ctx, unsigned int *regs, void *const *vals, int count);
|
||||
|
||||
void m68k_reg_reset(struct uc_struct *uc);
|
||||
|
||||
void m68k_uc_init(struct uc_struct* uc);
|
||||
#endif
|
||||
Reference in New Issue
Block a user