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renames the register constants so unicorn and capstone can compile together

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This commit is contained in:
mothran
2015-08-23 21:36:33 -07:00
parent 3e5ebc58a0
commit a167f7c456
29 changed files with 4130 additions and 4128 deletions
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20
qemu/target-arm/unicorn_aarch64.c
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@@ -43,18 +43,18 @@ int arm64_reg_read(uch handle, unsigned int regid, void *value)
mycpu = first_cpu;
if (regid >= ARM64_REG_X0 && regid <= ARM64_REG_X28)
*(int64_t *)value = ARM_CPU(uc, mycpu)->env.xregs[regid - ARM64_REG_X0];
if (regid >= UC_ARM64_REG_X0 && regid <= UC_ARM64_REG_X28)
*(int64_t *)value = ARM_CPU(uc, mycpu)->env.xregs[regid - UC_ARM64_REG_X0];
else {
switch(regid) {
default: break;
case ARM64_REG_X29:
case UC_ARM64_REG_X29:
*(int64_t *)value = ARM_CPU(uc, mycpu)->env.xregs[29];
break;
case ARM64_REG_X30:
case UC_ARM64_REG_X30:
*(int64_t *)value = ARM_CPU(uc, mycpu)->env.xregs[30];
break;
case ARM64_REG_PC:
case UC_ARM64_REG_PC:
*(uint64_t *)value = ARM_CPU(uc, mycpu)->env.pc;
break;
}
@@ -75,18 +75,18 @@ int arm64_reg_write(uch handle, unsigned int regid, void *value)
mycpu = first_cpu;
if (regid >= ARM64_REG_X0 && regid <= ARM64_REG_X28)
ARM_CPU(uc, mycpu)->env.xregs[regid - ARM64_REG_X0] = *(int64_t *)value;
if (regid >= UC_ARM64_REG_X0 && regid <= UC_ARM64_REG_X28)
ARM_CPU(uc, mycpu)->env.xregs[regid - UC_ARM64_REG_X0] = *(int64_t *)value;
else {
switch(regid) {
default: break;
case ARM64_REG_X29:
case UC_ARM64_REG_X29:
ARM_CPU(uc, mycpu)->env.xregs[29] = *(int64_t *)value;
break;
case ARM64_REG_X30:
case UC_ARM64_REG_X30:
ARM_CPU(uc, mycpu)->env.xregs[30] = *(int64_t *)value;
break;
case ARM64_REG_PC:
case UC_ARM64_REG_PC:
ARM_CPU(uc, mycpu)->env.pc = *(uint64_t *)value;
break;
}

32
qemu/target-arm/unicorn_arm.c
View File

@@ -48,20 +48,20 @@ int arm_reg_read(uch handle, unsigned int regid, void *value)
break;
case UC_MODE_ARM:
case UC_MODE_THUMB:
if (regid >= ARM_REG_R0 && regid <= ARM_REG_R12)
*(int32_t *)value = ARM_CPU(uc, mycpu)->env.regs[regid - ARM_REG_R0];
if (regid >= UC_ARM_REG_R0 && regid <= UC_ARM_REG_R12)
*(int32_t *)value = ARM_CPU(uc, mycpu)->env.regs[regid - UC_ARM_REG_R0];
else {
switch(regid) {
//case ARM_REG_SP:
case ARM_REG_R13:
//case UC_ARM_REG_SP:
case UC_ARM_REG_R13:
*(int32_t *)value = ARM_CPU(uc, mycpu)->env.regs[13];
break;
//case ARM_REG_LR:
case ARM_REG_R14:
//case UC_ARM_REG_LR:
case UC_ARM_REG_R14:
*(int32_t *)value = ARM_CPU(uc, mycpu)->env.regs[14];
break;
//case ARM_REG_PC:
case ARM_REG_R15:
//case UC_ARM_REG_PC:
case UC_ARM_REG_R15:
*(int32_t *)value = ARM_CPU(uc, mycpu)->env.regs[15];
break;
}
@@ -91,20 +91,20 @@ int arm_reg_write(uch handle, unsigned int regid, void *value)
case UC_MODE_ARM:
case UC_MODE_THUMB:
if (regid >= ARM_REG_R0 && regid <= ARM_REG_R12)
ARM_CPU(uc, mycpu)->env.regs[regid - ARM_REG_R0] = *(int32_t *)value;
if (regid >= UC_ARM_REG_R0 && regid <= UC_ARM_REG_R12)
ARM_CPU(uc, mycpu)->env.regs[regid - UC_ARM_REG_R0] = *(int32_t *)value;
else {
switch(regid) {
//case ARM_REG_SP:
case ARM_REG_R13:
//case UC_ARM_REG_SP:
case UC_ARM_REG_R13:
ARM_CPU(uc, mycpu)->env.regs[13] = *(int32_t *)value;
break;
//case ARM_REG_LR:
case ARM_REG_R14:
//case UC_ARM_REG_LR:
case UC_ARM_REG_R14:
ARM_CPU(uc, mycpu)->env.regs[14] = *(int32_t *)value;
break;
//case ARM_REG_PC:
case ARM_REG_R15:
//case UC_ARM_REG_PC:
case UC_ARM_REG_R15:
ARM_CPU(uc, mycpu)->env.regs[15] = *(int32_t *)value;
break;
}