Revamp Python regression tests suite (#2022)

* Fix Python regression test suite (partial)

* Fix Python regression test suite

* Add a test for mapping at high addresses

* Add ctl tests
This commit is contained in:
Eli
2024-10-13 08:14:10 +03:00
committed by GitHub
parent 78580ca8f9
commit 9f578946d5
58 changed files with 1903 additions and 1455 deletions

View File

@@ -3,33 +3,31 @@
# This test demonstrates emulation behavior within and across
# basic blocks.
from __future__ import print_function
import binascii
import regress
import struct
import regress
from unicorn import *
from unicorn.x86_const import *
CODE = binascii.unhexlify(b"".join([
b"b800000000", # 1000: b8 00 00 00 00 mov eax,0x0
b"40", # 1005: 40 inc eax
b"40", # 1006: 40 inc eax
b"6810100000", # 1007: 68 10 10 00 00 push 0x1010
b"c3", # 100c: c3 ret
b"cc", # 100d: cc int3
b"cc", # 100e: cc int3
b"cc", # 100f: cc int3
b"b800000000", # 1010: b8 00 00 00 00 mov eax,0x0
b"40", # 1015: 40 inc eax
b"40", # 1016: 40 inc eax
]))
CODE = (
b"\xb8\x00\x00\x00\x00" # 1000: mov eax,0x0
b"\x40" # 1005: inc eax
b"\x40" # 1006: inc eax
b"\x68\x10\x10\x00\x00" # 1007: push 0x1010
b"\xc3" # 100c: ret
b"\xcc" # 100d: int3
b"\xcc" # 100e: int3
b"\xcc" # 100f: int3
b"\xb8\x00\x00\x00\x00" # 1010: mov eax,0x0
b"\x40" # 1015: inc eax
b"\x40" # 1016: inc eax
)
def showpc(mu):
pc = mu.reg_read(UC_X86_REG_EIP)
print("pc: 0x%x" % (pc))
regress.logger.debug("pc: 0x%x", mu.reg_read(UC_X86_REG_EIP))
class RunAcrossBBTest(regress.RegressTest):
@@ -38,13 +36,13 @@ class RunAcrossBBTest(regress.RegressTest):
#######################################################################
# emu SETUP
#######################################################################
print("\n---- test: run_all ----")
regress.logger.debug("\n---- test: run_all ----")
mu = Uc(UC_ARCH_X86, UC_MODE_32)
def hook_code(uc, address, size, user_data):
print(">>> Tracing instruction at 0x%x, instruction size = %u" %(address, size))
regress.logger.debug(">>> Tracing instruction at 0x%x, instruction size = %u", address, size)
mu.hook_add(UC_HOOK_CODE, hook_code)
# base of CODE
@@ -73,33 +71,34 @@ class RunAcrossBBTest(regress.RegressTest):
# 1010: b8 00 00 00 00 mov eax,0x0 <-+
# 1015: 40 inc eax <
# 1016: 40 inc eax <
self.assertEqual(0x1016, mu.reg_read(UC_X86_REG_EIP), "unexpected PC (2)")
self.assertEqual(0x2800, mu.reg_read(UC_X86_REG_ESP), "unexpected SP (2)")
showpc(mu)
except UcError as e:
eip = mu.reg_read(UC_X86_REG_EIP)
if e.errno == UC_ERR_FETCH_UNMAPPED:
# during initial test dev, bad fetch at 0x1010, but the data is there,
# and this proves it
print("!!! about to bail due to bad fetch... here's the data at PC:")
print(binascii.hexlify(mu.mem_read(mu.reg_read(UC_X86_REG_EIP), 0x8)))
self.assertFalse(True, "ERROR: %s @ 0x%x" % (e, mu.reg_read(UC_X86_REG_EIP)))
# during initial test dev, bad fetch at 0x1010, but the data is there, and this proves it
regress.logger.error("!!! about to bail due to bad fetch... here's the data at PC:")
regress.logger.error(binascii.hexlify(mu.mem_read(eip, 8)))
self.fail("ERROR: %s @ 0x%x" % (e, eip))
def test_run_across_bb(self):
try:
#######################################################################
# emu SETUP
#######################################################################
print("\n---- test: run_across_bb ----")
regress.logger.debug("\n---- test: run_across_bb ----")
mu = Uc(UC_ARCH_X86, UC_MODE_32)
def hook_code(uc, address, size, user_data):
print(">>> Tracing instruction at 0x%x, instruction size = %u" %(address, size))
regress.logger.debug(">>> Tracing instruction at 0x%x, instruction size = %u", address, size)
mu.hook_add(UC_HOOK_CODE, hook_code)
# base of CODE
@@ -111,8 +110,10 @@ class RunAcrossBBTest(regress.RegressTest):
mu.reg_write(UC_X86_REG_EIP, 0x1000)
mu.reg_write(UC_X86_REG_ESP, 0x2800)
self.assertEqual(0x1000, mu.reg_read(UC_X86_REG_EIP), "unexpected PC")
self.assertEqual(0x2800, mu.reg_read(UC_X86_REG_ESP), "unexpected SP")
showpc(mu)
@@ -182,13 +183,14 @@ class RunAcrossBBTest(regress.RegressTest):
showpc(mu)
except UcError as e:
if e.errno == UC_ERR_FETCH_UNMAPPED:
# during initial test dev, bad fetch at 0x1010, but the data is there,
# and this proves it
print("!!! about to bail due to bad fetch... here's the data at PC:")
print(binascii.hexlify(mu.mem_read(mu.reg_read(UC_X86_REG_EIP), 0x8)))
eip = mu.reg_read(UC_X86_REG_EIP)
self.assertFalse(True, "ERROR: %s @ 0x%x" % (e, mu.reg_read(UC_X86_REG_EIP)))
if e.errno == UC_ERR_FETCH_UNMAPPED:
# during initial test dev, bad fetch at 0x1010, but the data is there, and this proves it
regress.logger.error("!!! about to bail due to bad fetch... here's the data at PC:")
regress.logger.error(binascii.hexlify(mu.mem_read(eip, 8)))
self.fail("ERROR: %s @ 0x%x" % (e, eip))
if __name__ == '__main__':