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Revamp Python regression tests suite (#2022)

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* Fix Python regression test suite (partial)

* Fix Python regression test suite

* Add a test for mapping at high addresses

* Add ctl tests
This commit is contained in:
Eli
2024-10-13 08:14:10 +03:00
committed by GitHub
parent 78580ca8f9
commit 9f578946d5
58 changed files with 1903 additions and 1455 deletions
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20
tests/regress/mips_syscall_pc.py
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@@ -1,25 +1,29 @@
#!/usr/bin/python
import regress
from unicorn import *
from unicorn.mips_const import *
import regress
CODE = b'\x0c\x00\x00\x00' # syscall
BASE = 0x40000
def intr_hook(uc, intno, data):
print 'interrupt=%d, v0=%d, pc=0x%08x' % (intno, uc.reg_read(UC_MIPS_REG_V0), uc.reg_read(UC_MIPS_REG_PC))
regress.logger.debug('interrupt=%d, v0=%d, pc=%#010x', intno, uc.reg_read(UC_MIPS_REG_V0), uc.reg_read(UC_MIPS_REG_PC))
class MipsSyscall(regress.RegressTest):
def test(self):
addr = 0x40000
code = '0c000000'.decode('hex') # syscall
uc = Uc(UC_ARCH_MIPS, UC_MODE_MIPS32 + UC_MODE_LITTLE_ENDIAN)
uc.mem_map(addr, 0x1000)
uc.mem_write(addr, code)
uc.mem_map(BASE, 0x1000)
uc.mem_write(BASE, CODE)
uc.reg_write(UC_MIPS_REG_V0, 100)
uc.hook_add(UC_HOOK_INTR, intr_hook)
uc.emu_start(addr, addr+len(code))
uc.emu_start(BASE, BASE+len(CODE))
self.assertEqual(0x40004, uc.reg_read(UC_MIPS_REG_PC))