- Improved the GitHub python binding workflow: (#2072)
- Added fullMode input in workflow_dispatch
- Take decision whether to build either in debug or release mode and if to build for all python versions according to the commit message patterns
- Set proper artifact names
- Removed not needed steps
- Compacted some steps in order to leverage more the matrix feature
- Bumped cibuildwheel action to 2.22.0
- Run actual regress tests in place of sample scripts
- Specify optional test install in pyproject.toml with proper requirements
- Derive package version from git tags
- Add GENERATORS env var support in setup.py to specify cmake generator and minor refactoring
- Minor cleanup/refactoring for the regress test suite
- Marked some regress tests with skipIf to skip them in case of old python versions
- Marked some failing regress tests to be checked with skipIf
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@@ -1,32 +1,25 @@
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#!/usr/bin/python
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# By Mariano Graziano
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import platform
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import regress
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import struct
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import sys
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import unittest
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from unicorn import *
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from unicorn.x86_const import *
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if sys.version_info.major == 2:
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range = xrange
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mu = 0
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class Init(regress.RegressTest):
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def init_unicorn(self, ip, sp, counter):
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global mu
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#print "[+] Emulating IP: %x SP: %x - Counter: %x" % (ip, sp, counter)
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mu = Uc(UC_ARCH_X86, UC_MODE_64)
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mu.mem_map(0x1000000, 2 * 1024 * 1024)
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mu.mem_write(0x1000000, b"\x90")
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mu.mem_map(0x8000000, 8 * 1024 * 1024)
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mu.reg_write(UC_X86_REG_RSP, sp)
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regress.logger.debug("[+] Emulating IP: %x SP: %x - Counter: %x" % (ip, sp, counter))
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self.emulator = Uc(UC_ARCH_X86, UC_MODE_64)
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self.emulator.mem_map(0x1000000, 2 * 1024 * 1024)
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self.emulator.mem_write(0x1000000, b"\x90")
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self.emulator.mem_map(0x8000000, 8 * 1024 * 1024)
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self.emulator.reg_write(UC_X86_REG_RSP, sp)
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content = self.generate_value(counter)
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mu.mem_write(sp, content)
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self.emulator.mem_write(sp, content)
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self.set_hooks()
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def generate_value(self, counter):
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@@ -36,46 +29,41 @@ class Init(regress.RegressTest):
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return struct.pack("<Q", address)
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def set_hooks(self):
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global mu
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mu.hook_add(UC_HOOK_MEM_READ_UNMAPPED | UC_HOOK_MEM_WRITE_UNMAPPED, self.hook_mem_invalid)
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mu.hook_add(UC_HOOK_MEM_FETCH_UNMAPPED, self.hook_mem_fetch_unmapped)
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self.emulator.hook_add(UC_HOOK_MEM_READ_UNMAPPED | UC_HOOK_MEM_WRITE_UNMAPPED, self.hook_mem_invalid)
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self.emulator.hook_add(UC_HOOK_MEM_FETCH_UNMAPPED, self.hook_mem_fetch_unmapped)
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def hook_mem_invalid(self, uc, access, address, size, value, user_data):
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global mu
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regress.logger.debug("[ HOOK_MEM_INVALID - Address: 0x%x ]", address)
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if access == UC_MEM_WRITE_UNMAPPED:
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regress.logger.debug(">>> Missing memory is being WRITE at 0x%x, data size = %u, data value = 0x%x", address, size, value)
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regress.logger.debug(">>> Missing memory is being WRITE at 0x%x, data size = %u, data value = 0x%x",
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address, size, value)
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address_page = address & 0xFFFFFFFFFFFFF000
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mu.mem_map(address_page, 2 * 1024 * 1024)
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mu.mem_write(address, str(value))
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uc.mem_map(address_page, 2 * 1024 * 1024)
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uc.mem_write(address, str(value))
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return True
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else:
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return False
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return False
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def hook_mem_fetch_unmapped(self, uc, access, address, size, value, user_data):
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global mu
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regress.logger.debug("[ HOOK_MEM_FETCH - Address: 0x%x ]", address)
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regress.logger.debug("[ mem_fetch_unmapped: faulting address at 0x%x ]", address)
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mu.mem_write(0x1000003, b"\x90")
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mu.reg_write(UC_X86_REG_RIP, 0x1000001)
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uc.mem_write(0x1000003, b"\x90")
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uc.reg_write(UC_X86_REG_RIP, 0x1000001)
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return True
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@unittest.skipIf(sys.version_info < (3, 7), reason="requires python3.7 or higher")
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@unittest.skipIf(sys.platform == 'win32' or platform.machine().lower() not in ('x86_64', 'arm64'), 'TO BE CHECKED!')
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def runTest(self):
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global mu
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ips = range(0x1000000, 0x1001000)
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sps = range(0x8000000, 0x8001000)
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for i, (ip, sp) in enumerate(zip(ips, sps)):
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self.init_unicorn(ip, sp, i)
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mu.emu_start(0x1000000, 0x1000000 + 0x1)
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self.emulator.emu_start(0x1000000, 0x1000000 + 0x1)
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if __name__ == '__main__':
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