diff --git a/tests/unit/test_arm64.c b/tests/unit/test_arm64.c
index 2de61d99..69f30992 100644
--- a/tests/unit/test_arm64.c
+++ b/tests/unit/test_arm64.c
@@ -599,6 +599,54 @@ static void test_arm64_mem_prot_regress(void)
     OK(uc_close(uc));
 }
 
+static bool test_arm64_mem_read_write_cb(uc_engine *uc, int type,
+                                         uint64_t address, int size,
+                                         int64_t value, void *user_data)
+{
+    uint64_t *count = (uint64_t *)user_data;
+    switch (type) {
+    case UC_MEM_READ:
+        count[0]++;
+        break;
+    case UC_MEM_WRITE:
+        count[1]++;
+        break;
+    }
+
+    return 0;
+}
+static void test_arm64_mem_hook_read_write(void)
+{
+    uc_engine *uc;
+    // ldp x1, x2, [sp]
+    // stp x1, x2,[sp]
+    // ldp x1, x2, [sp]
+    // stp x1, x2,[sp]
+    const char code[] = {0xe1, 0x0b, 0x40, 0xa9, 0xe1, 0x0b, 0x00, 0xa9,
+                         0xe1, 0x0b, 0x40, 0xa9, 0xe1, 0x0b, 0x00, 0xa9};
+    uint64_t r_sp;
+    r_sp = 0x16db6a040;
+    uc_hook hk;
+    uint64_t counter[2] = {0, 0};
+
+    uc_common_setup(&uc, UC_ARCH_ARM64, UC_MODE_ARM, code, sizeof(code),
+                    UC_CPU_ARM64_A72);
+
+    uc_reg_write(uc, UC_ARM64_REG_SP, &r_sp);
+    uc_mem_map(uc, 0x16db68000, 1024 * 16, UC_PROT_ALL);
+
+    OK(uc_hook_add(uc, &hk, UC_HOOK_MEM_READ, test_arm64_mem_read_write_cb,
+                   counter, 1, 0));
+    OK(uc_hook_add(uc, &hk, UC_HOOK_MEM_WRITE, test_arm64_mem_read_write_cb,
+                   counter, 1, 0));
+
+    uc_assert_err(UC_ERR_OK, uc_emu_start(uc, code_start,
+                                          code_start + sizeof(code), 0, 0));
+
+    TEST_CHECK(counter[0] == 4 && counter[1] == 4);
+    OK(uc_close(uc));
+}
+
 TEST_LIST = {{"test_arm64_until", test_arm64_until},
              {"test_arm64_code_patching", test_arm64_code_patching},
              {"test_arm64_code_patching_count", test_arm64_code_patching_count},
@@ -615,4 +663,5 @@ TEST_LIST = {{"test_arm64_until", test_arm64_until},
              {"test_arm64_mmu", test_arm64_mmu},
              {"test_arm64_pc_wrap", test_arm64_pc_wrap},
              {"test_arm64_mem_prot_regress", test_arm64_mem_prot_regress},
+             {"test_arm64_mem_hook_read_write", test_arm64_mem_hook_read_write},
              {NULL, NULL}};