Eliminate warnings

This commit is contained in:
2022-05-21 00:02:29 +02:00
parent 9167ab8671
commit 82d1c9e925

View File

@@ -321,102 +321,102 @@ static void sigp_sense_running(S390CPU *dst_cpu, SigpInfo *si)
} }
} }
static int handle_sigp_single_dst(S390CPU *cpu, S390CPU *dst_cpu, uint8_t order, // static int handle_sigp_single_dst(S390CPU *cpu, S390CPU *dst_cpu, uint8_t order,
uint64_t param, uint64_t *status_reg) // uint64_t param, uint64_t *status_reg)
{ // {
SigpInfo si = { // SigpInfo si = {
.param = param, // .param = param,
.status_reg = status_reg, // .status_reg = status_reg,
}; // };
/* cpu available? */ // /* cpu available? */
if (dst_cpu == NULL) { // if (dst_cpu == NULL) {
return SIGP_CC_NOT_OPERATIONAL; // return SIGP_CC_NOT_OPERATIONAL;
} // }
/* only resets can break pending orders */ // /* only resets can break pending orders */
if (dst_cpu->env.sigp_order != 0 && // if (dst_cpu->env.sigp_order != 0 &&
order != SIGP_CPU_RESET && // order != SIGP_CPU_RESET &&
order != SIGP_INITIAL_CPU_RESET) { // order != SIGP_INITIAL_CPU_RESET) {
return SIGP_CC_BUSY; // return SIGP_CC_BUSY;
} // }
switch (order) { // switch (order) {
case SIGP_SENSE: // case SIGP_SENSE:
sigp_sense(dst_cpu, &si); // sigp_sense(dst_cpu, &si);
break; // break;
case SIGP_EXTERNAL_CALL: // case SIGP_EXTERNAL_CALL:
sigp_external_call(cpu, dst_cpu, &si); // sigp_external_call(cpu, dst_cpu, &si);
break; // break;
case SIGP_EMERGENCY: // case SIGP_EMERGENCY:
sigp_emergency(cpu, dst_cpu, &si); // sigp_emergency(cpu, dst_cpu, &si);
break; // break;
case SIGP_START: // case SIGP_START:
//run_on_cpu(CPU(dst_cpu), sigp_start, RUN_ON_CPU_HOST_PTR(&si)); // //run_on_cpu(CPU(dst_cpu), sigp_start, RUN_ON_CPU_HOST_PTR(&si));
break; // break;
case SIGP_STOP: // case SIGP_STOP:
//run_on_cpu(CPU(dst_cpu), sigp_stop, RUN_ON_CPU_HOST_PTR(&si)); // //run_on_cpu(CPU(dst_cpu), sigp_stop, RUN_ON_CPU_HOST_PTR(&si));
break; // break;
case SIGP_RESTART: // case SIGP_RESTART:
//run_on_cpu(CPU(dst_cpu), sigp_restart, RUN_ON_CPU_HOST_PTR(&si)); // //run_on_cpu(CPU(dst_cpu), sigp_restart, RUN_ON_CPU_HOST_PTR(&si));
break; // break;
case SIGP_STOP_STORE_STATUS: // case SIGP_STOP_STORE_STATUS:
//run_on_cpu(CPU(dst_cpu), sigp_stop_and_store_status, RUN_ON_CPU_HOST_PTR(&si)); // //run_on_cpu(CPU(dst_cpu), sigp_stop_and_store_status, RUN_ON_CPU_HOST_PTR(&si));
break; // break;
case SIGP_STORE_STATUS_ADDR: // case SIGP_STORE_STATUS_ADDR:
//run_on_cpu(CPU(dst_cpu), sigp_store_status_at_address, RUN_ON_CPU_HOST_PTR(&si)); // //run_on_cpu(CPU(dst_cpu), sigp_store_status_at_address, RUN_ON_CPU_HOST_PTR(&si));
break; // break;
case SIGP_STORE_ADTL_STATUS: // case SIGP_STORE_ADTL_STATUS:
//run_on_cpu(CPU(dst_cpu), sigp_store_adtl_status, RUN_ON_CPU_HOST_PTR(&si)); // //run_on_cpu(CPU(dst_cpu), sigp_store_adtl_status, RUN_ON_CPU_HOST_PTR(&si));
break; // break;
case SIGP_SET_PREFIX: // case SIGP_SET_PREFIX:
//run_on_cpu(CPU(dst_cpu), sigp_set_prefix, RUN_ON_CPU_HOST_PTR(&si)); // //run_on_cpu(CPU(dst_cpu), sigp_set_prefix, RUN_ON_CPU_HOST_PTR(&si));
break; // break;
case SIGP_INITIAL_CPU_RESET: // case SIGP_INITIAL_CPU_RESET:
//run_on_cpu(CPU(dst_cpu), sigp_initial_cpu_reset, RUN_ON_CPU_HOST_PTR(&si)); // //run_on_cpu(CPU(dst_cpu), sigp_initial_cpu_reset, RUN_ON_CPU_HOST_PTR(&si));
break; // break;
case SIGP_CPU_RESET: // case SIGP_CPU_RESET:
//run_on_cpu(CPU(dst_cpu), sigp_cpu_reset, RUN_ON_CPU_HOST_PTR(&si)); // //run_on_cpu(CPU(dst_cpu), sigp_cpu_reset, RUN_ON_CPU_HOST_PTR(&si));
break; // break;
case SIGP_COND_EMERGENCY: // case SIGP_COND_EMERGENCY:
sigp_cond_emergency(cpu, dst_cpu, &si); // sigp_cond_emergency(cpu, dst_cpu, &si);
break; // break;
case SIGP_SENSE_RUNNING: // case SIGP_SENSE_RUNNING:
sigp_sense_running(dst_cpu, &si); // sigp_sense_running(dst_cpu, &si);
break; // break;
default: // default:
set_sigp_status(&si, SIGP_STAT_INVALID_ORDER); // set_sigp_status(&si, SIGP_STAT_INVALID_ORDER);
} // }
return si.cc; // return si.cc;
} // }
static int sigp_set_architecture(S390CPU *cpu, uint32_t param, // static int sigp_set_architecture(S390CPU *cpu, uint32_t param,
uint64_t *status_reg) // uint64_t *status_reg)
{ // {
bool all_stopped = true; // bool all_stopped = true;
#if 0 // #if 0
CPU_FOREACH(cur_cs) { // CPU_FOREACH(cur_cs) {
cur_cpu = S390_CPU(cur_cs); // cur_cpu = S390_CPU(cur_cs);
if (cur_cpu == cpu) { // if (cur_cpu == cpu) {
continue; // continue;
} // }
if (s390_cpu_get_state(cur_cpu) != S390_CPU_STATE_STOPPED) { // if (s390_cpu_get_state(cur_cpu) != S390_CPU_STATE_STOPPED) {
all_stopped = false; // all_stopped = false;
} // }
} // }
#endif // #endif
all_stopped = false; // all_stopped = false;
*status_reg &= 0xffffffff00000000ULL; // *status_reg &= 0xffffffff00000000ULL;
/* Reject set arch order, with czam we're always in z/Arch mode. */ // /* Reject set arch order, with czam we're always in z/Arch mode. */
*status_reg |= (all_stopped ? SIGP_STAT_INVALID_PARAMETER : // *status_reg |= (all_stopped ? SIGP_STAT_INVALID_PARAMETER :
SIGP_STAT_INCORRECT_STATE); // SIGP_STAT_INCORRECT_STATE);
return SIGP_CC_STATUS_STORED; // return SIGP_CC_STATUS_STORED;
} // }
#if 0 #if 0
int handle_sigp(CPUS390XState *env, uint8_t order, uint64_t r1, uint64_t r3) int handle_sigp(CPUS390XState *env, uint8_t order, uint64_t r1, uint64_t r3)