M1 W^X fully supported

qemu/include/exec/exec-all.h

@@ -388,8 +388,8 @@ TranslationBlock *tb_htable_lookup(CPUState *cpu, target_ulong pc,
                                    target_ulong cs_base, uint32_t flags,
                                    uint32_t cf_mask);
 void tb_set_jmp_target(TranslationBlock *tb, int n, uintptr_t addr);
-void tb_exec_lock(TCGContext*);
-void tb_exec_unlock(TCGContext*);
+void tb_exec_lock(struct uc_struct*);
+void tb_exec_unlock(struct uc_struct*);
 
 /* GETPC is the true target of the return instruction that we'll execute.  */
 #ifdef _MSC_VER

qemu/include/tcg/tcg-apple-jit.h

@@ -33,6 +33,36 @@ static inline void jit_write_protect(int enabled)
     return pthread_jit_write_protect_np(enabled);
 }
 
+// Returns the S3_6_c15_c1_5 register's value
+// Taken from 
+// https://stackoverflow.com/questions/70019553/lldb-how-to-read-the-permissions-of-a-memory-region-for-a-thread
+// https://blog.svenpeter.dev/posts/m1_sprr_gxf/
+static uint64_t read_sprr_perm(void)
+{
+    uint64_t v;
+    __asm__ __volatile__("isb sy\n"
+                         "mrs %0, S3_6_c15_c1_5\n"
+                         : "=r"(v)::"memory");
+    return v;
+}
+
+__attribute__((unused)) static uint8_t thread_mask() 
+{
+    uint64_t v = read_sprr_perm();
+
+    return (v >> 20) & 3;
+}
+
+__attribute__((unused)) static bool thread_writeable()
+{
+    return thread_mask() == 3;
+}
+
+__attribute__((unused)) static bool thread_executable()
+{
+    return thread_mask() == 1;
+}
+
 #else /* defined(__aarch64__) && defined(CONFIG_DARWIN) */
 
 static inline void jit_write_protect(int enabled)

qemu/include/tcg/tcg.h

@@ -651,15 +651,6 @@ struct TCGContext {
     /* Threshold to flush the translated code buffer.  */
     void *code_gen_highwater;
 
-#ifdef HAVE_PTHREAD_JIT_PROTECT
-    /*
-     * True for X, False for W.
-     * 
-     * Source: https://developer.apple.com/documentation/apple_silicon/porting_just-in-time_compilers_to_apple_silicon?language=objc
-     */
-    bool code_gen_locked;
-#endif
-
     size_t tb_phys_invalidate_count;
 
     /* Track which vCPU triggers events */