From 791557e40480b3030cd1156e3349b601147a2984 Mon Sep 17 00:00:00 2001 From: mio Date: Tue, 11 Feb 2025 17:44:24 +0800 Subject: [PATCH] CI(full),CI(release): Should use if instead of ifdef --- qemu/target/arm/helper-a64.c | 8 ++++---- qemu/target/i386/mem_helper.c | 2 +- qemu/target/ppc/mem_helper.c | 12 ++++++------ qemu/target/ppc/translate.c | 8 ++++---- qemu/target/s390x/mem_helper.c | 10 +++++----- 5 files changed, 20 insertions(+), 20 deletions(-) diff --git a/qemu/target/arm/helper-a64.c b/qemu/target/arm/helper-a64.c index 9cb4326e..12da1140 100644 --- a/qemu/target/arm/helper-a64.c +++ b/qemu/target/arm/helper-a64.c @@ -568,7 +568,7 @@ uint64_t HELPER(paired_cmpxchg64_le)(CPUARMState *env, uint64_t addr, uint64_t HELPER(paired_cmpxchg64_le_parallel)(CPUARMState *env, uint64_t addr, uint64_t new_lo, uint64_t new_hi) { -#ifdef HAVE_CMPXCHG128 +#if HAVE_CMPXCHG128 == 1 Int128 oldv, cmpv, newv; uintptr_t ra = GETPC(); bool success; @@ -625,7 +625,7 @@ uint64_t HELPER(paired_cmpxchg64_be)(CPUARMState *env, uint64_t addr, uint64_t HELPER(paired_cmpxchg64_be_parallel)(CPUARMState *env, uint64_t addr, uint64_t new_lo, uint64_t new_hi) { -#ifdef HAVE_CMPXCHG128 +#if HAVE_CMPXCHG128 == 1 Int128 oldv, cmpv, newv; uintptr_t ra = GETPC(); bool success; @@ -657,7 +657,7 @@ uint64_t HELPER(paired_cmpxchg64_be_parallel)(CPUARMState *env, uint64_t addr, void HELPER(casp_le_parallel)(CPUARMState *env, uint32_t rs, uint64_t addr, uint64_t new_lo, uint64_t new_hi) { -#ifdef HAVE_CMPXCHG128 +#if HAVE_CMPXCHG128 == 1 Int128 oldv, cmpv, newv; uintptr_t ra = GETPC(); int mem_idx; @@ -682,7 +682,7 @@ void HELPER(casp_le_parallel)(CPUARMState *env, uint32_t rs, uint64_t addr, void HELPER(casp_be_parallel)(CPUARMState *env, uint32_t rs, uint64_t addr, uint64_t new_hi, uint64_t new_lo) { -#ifdef HAVE_CMPXCHG128 +#if HAVE_CMPXCHG128 == 1 Int128 oldv, cmpv, newv; uintptr_t ra = GETPC(); int mem_idx; diff --git a/qemu/target/i386/mem_helper.c b/qemu/target/i386/mem_helper.c index aee3c930..3917ee1b 100644 --- a/qemu/target/i386/mem_helper.c +++ b/qemu/target/i386/mem_helper.c @@ -130,7 +130,7 @@ void helper_cmpxchg16b(CPUX86State *env, target_ulong a0) if ((a0 & 0xf) != 0) { raise_exception_ra(env, EXCP0D_GPF, ra); } else { -#ifdef HAVE_CMPXCHG128 +#if HAVE_CMPXCHG128 == 1 int eflags = cpu_cc_compute_all(env, CC_OP); Int128 cmpv = int128_make128(env->regs[R_EAX], env->regs[R_EDX]); diff --git a/qemu/target/ppc/mem_helper.c b/qemu/target/ppc/mem_helper.c index 47079c62..83db1854 100644 --- a/qemu/target/ppc/mem_helper.c +++ b/qemu/target/ppc/mem_helper.c @@ -377,7 +377,7 @@ target_ulong helper_lscbx(CPUPPCState *env, target_ulong addr, uint32_t reg, uint64_t helper_lq_le_parallel(CPUPPCState *env, target_ulong addr, uint32_t opidx) { -#ifdef HAVE_ATOMIC128 +#if HAVE_ATOMIC128 == 1 Int128 ret; /* We will have raised EXCP_ATOMIC from the translator. */ @@ -394,7 +394,7 @@ uint64_t helper_lq_le_parallel(CPUPPCState *env, target_ulong addr, uint64_t helper_lq_be_parallel(CPUPPCState *env, target_ulong addr, uint32_t opidx) { -#ifdef HAVE_ATOMIC128 +#if HAVE_ATOMIC128 == 1 Int128 ret; /* We will have raised EXCP_ATOMIC from the translator. */ @@ -411,7 +411,7 @@ uint64_t helper_lq_be_parallel(CPUPPCState *env, target_ulong addr, void helper_stq_le_parallel(CPUPPCState *env, target_ulong addr, uint64_t lo, uint64_t hi, uint32_t opidx) { -#ifdef HAVE_ATOMIC128 +#if HAVE_ATOMIC128 == 1 Int128 val; /* We will have raised EXCP_ATOMIC from the translator. */ @@ -427,7 +427,7 @@ void helper_stq_le_parallel(CPUPPCState *env, target_ulong addr, void helper_stq_be_parallel(CPUPPCState *env, target_ulong addr, uint64_t lo, uint64_t hi, uint32_t opidx) { -#ifdef HAVE_ATOMIC128 +#if HAVE_ATOMIC128 == 1 Int128 val; /* We will have raised EXCP_ATOMIC from the translator. */ @@ -446,7 +446,7 @@ uint32_t helper_stqcx_le_parallel(CPUPPCState *env, target_ulong addr, uint64_t new_lo, uint64_t new_hi, uint32_t opidx) { -#ifdef HAVE_CMPXCHG128 +#if HAVE_CMPXCHG128 == 1 bool success = false; /* We will have raised EXCP_ATOMIC from the translator. */ @@ -473,7 +473,7 @@ uint32_t helper_stqcx_be_parallel(CPUPPCState *env, target_ulong addr, uint64_t new_lo, uint64_t new_hi, uint32_t opidx) { -#ifdef HAVE_CMPXCHG128 +#if HAVE_CMPXCHG128 == 1 bool success = false; /* We will have raised EXCP_ATOMIC from the translator. */ diff --git a/qemu/target/ppc/translate.c b/qemu/target/ppc/translate.c index 8f26c859..15c9fde4 100644 --- a/qemu/target/ppc/translate.c +++ b/qemu/target/ppc/translate.c @@ -2780,7 +2780,7 @@ static void gen_lq(DisasContext *ctx) hi = cpu_gpr[rd]; if (tb_cflags(ctx->base.tb) & CF_PARALLEL) { -#ifdef HAVE_ATOMIC128 +#if HAVE_ATOMIC128 == 1 TCGv_i32 oi = tcg_temp_new_i32(tcg_ctx); if (ctx->le_mode) { tcg_gen_movi_i32(tcg_ctx, oi, make_memop_idx(MO_LEQ, ctx->mem_idx)); @@ -2958,7 +2958,7 @@ static void gen_std(DisasContext *ctx) hi = cpu_gpr[rs]; if (tb_cflags(ctx->base.tb) & CF_PARALLEL) { -#ifdef HAVE_ATOMIC128 +#if HAVE_ATOMIC128 == 1 TCGv_i32 oi = tcg_temp_new_i32(tcg_ctx); if (ctx->le_mode) { tcg_gen_movi_i32(tcg_ctx, oi, make_memop_idx(MO_LEQ, ctx->mem_idx)); @@ -3574,7 +3574,7 @@ static void gen_lqarx(DisasContext *ctx) hi = cpu_gpr[rd]; if (tb_cflags(ctx->base.tb) & CF_PARALLEL) { -#ifdef HAVE_ATOMIC128 +#if HAVE_ATOMIC128 == 1 TCGv_i32 oi = tcg_temp_new_i32(tcg_ctx); if (ctx->le_mode) { tcg_gen_movi_i32(tcg_ctx, oi, make_memop_idx(MO_LEQ | MO_ALIGN_16, @@ -3632,7 +3632,7 @@ static void gen_stqcx_(DisasContext *ctx) hi = cpu_gpr[rs]; if (tb_cflags(ctx->base.tb) & CF_PARALLEL) { -#ifdef HAVE_CMPXCHG128 +#if HAVE_CMPXCHG128 == 1 TCGv_i32 oi = tcg_const_i32(tcg_ctx, DEF_MEMOP(MO_Q) | MO_ALIGN_16); if (ctx->le_mode) { gen_helper_stqcx_le_parallel(tcg_ctx, cpu_crf[0], tcg_ctx->cpu_env, diff --git a/qemu/target/s390x/mem_helper.c b/qemu/target/s390x/mem_helper.c index 20766dd7..88e07c57 100644 --- a/qemu/target/s390x/mem_helper.c +++ b/qemu/target/s390x/mem_helper.c @@ -1695,7 +1695,7 @@ void HELPER(cdsg)(CPUS390XState *env, uint64_t addr, void HELPER(cdsg_parallel)(CPUS390XState *env, uint64_t addr, uint32_t r1, uint32_t r3) { -#ifdef HAVE_CMPXCHG128 +#if HAVE_CMPXCHG128 == 1 uintptr_t ra = GETPC(); Int128 cmpv = int128_make128(env->regs[r1 + 1], env->regs[r1]); Int128 newv = int128_make128(env->regs[r3 + 1], env->regs[r3]); @@ -1834,7 +1834,7 @@ static uint32_t do_csst(CPUS390XState *env, uint32_t r3, uint64_t a1, cpu_stq_data_ra(env, a1 + 0, int128_gethi(nv), ra); cpu_stq_data_ra(env, a1 + 8, int128_getlo(nv), ra); } else { -#ifdef HAVE_CMPXCHG128 +#if HAVE_CMPXCHG128 == 1 TCGMemOpIdx oi = make_memop_idx(MO_TEQ | MO_ALIGN_16, mem_idx); ov = helper_atomic_cmpxchgo_be_mmu(env, a1, cv, nv, oi, ra); cc = !int128_eq(ov, cv); @@ -1875,7 +1875,7 @@ static uint32_t do_csst(CPUS390XState *env, uint32_t r3, uint64_t a1, cpu_stq_data_ra(env, a2 + 0, svh, ra); cpu_stq_data_ra(env, a2 + 8, svl, ra); } else { -#ifdef HAVE_ATOMIC128 +#if HAVE_ATOMIC128 == 1 TCGMemOpIdx oi = make_memop_idx(MO_TEQ | MO_ALIGN_16, mem_idx); Int128 sv = int128_make128(svl, svh); helper_atomic_sto_be_mmu(env, a2, sv, oi, ra); @@ -2356,7 +2356,7 @@ uint64_t HELPER(lpq)(CPUS390XState *env, uint64_t addr) uint64_t HELPER(lpq_parallel)(CPUS390XState *env, uint64_t addr) { -#ifdef HAVE_ATOMIC128 +#if HAVE_ATOMIC128 == 1 uintptr_t ra = GETPC(); uint64_t hi, lo; int mem_idx; @@ -2393,7 +2393,7 @@ void HELPER(stpq)(CPUS390XState *env, uint64_t addr, void HELPER(stpq_parallel)(CPUS390XState *env, uint64_t addr, uint64_t low, uint64_t high) { -#ifdef HAVE_ATOMIC128 +#if HAVE_ATOMIC128 == 1 uintptr_t ra = GETPC(); int mem_idx; TCGMemOpIdx oi;