Automated leading tab to spaces conversion.
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@@ -405,7 +405,7 @@ static inline void tcg_out_arithi(TCGContext *s, TCGReg rd, TCGReg rs1,
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}
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static void tcg_out_arithc(TCGContext *s, TCGReg rd, TCGReg rs1,
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int32_t val2, int val2const, int op)
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int32_t val2, int val2const, int op)
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{
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tcg_out32(s, op | INSN_RD(rd) | INSN_RS1(rs1)
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| (val2const ? INSN_IMM13(val2) : INSN_RS2(val2)));
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@@ -682,7 +682,7 @@ static void tcg_out_setcond_i32(TCGContext *s, TCGCond cond, TCGReg ret,
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}
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c1 = TCG_REG_G0, c2const = 0;
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cond = (cond == TCG_COND_EQ ? TCG_COND_GEU : TCG_COND_LTU);
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break;
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break;
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case TCG_COND_GTU:
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case TCG_COND_LEU:
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@@ -783,16 +783,16 @@ static void tcg_out_addsub2_i64(TCGContext *s, TCGReg rl, TCGReg rh,
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}
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tcg_out_arith(s, rh, ah, bh, ARITH_ADDXC);
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} else if (bh == TCG_REG_G0) {
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/* If we have a zero, we can perform the operation in two insns,
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/* If we have a zero, we can perform the operation in two insns,
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with the arithmetic first, and a conditional move into place. */
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if (rh == ah) {
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if (rh == ah) {
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tcg_out_arithi(s, TCG_REG_T2, ah, 1,
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is_sub ? ARITH_SUB : ARITH_ADD);
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is_sub ? ARITH_SUB : ARITH_ADD);
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tcg_out_movcc(s, TCG_COND_LTU, MOVCC_XCC, rh, TCG_REG_T2, 0);
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} else {
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} else {
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tcg_out_arithi(s, rh, ah, 1, is_sub ? ARITH_SUB : ARITH_ADD);
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tcg_out_movcc(s, TCG_COND_GEU, MOVCC_XCC, rh, ah, 0);
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}
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tcg_out_movcc(s, TCG_COND_GEU, MOVCC_XCC, rh, ah, 0);
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}
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} else {
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/* Otherwise adjust BH as if there is carry into T2 ... */
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if (bhconst) {
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@@ -803,7 +803,7 @@ static void tcg_out_addsub2_i64(TCGContext *s, TCGReg rl, TCGReg rh,
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}
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/* ... smoosh T2 back to original BH if carry is clear ... */
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tcg_out_movcc(s, TCG_COND_GEU, MOVCC_XCC, TCG_REG_T2, bh, bhconst);
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/* ... and finally perform the arithmetic with the new operand. */
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/* ... and finally perform the arithmetic with the new operand. */
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tcg_out_arith(s, rh, ah, TCG_REG_T2, is_sub ? ARITH_SUB : ARITH_ADD);
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}
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@@ -1315,11 +1315,11 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
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goto gen_arith;
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OP_32_64(neg):
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c = ARITH_SUB;
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goto gen_arith1;
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c = ARITH_SUB;
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goto gen_arith1;
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OP_32_64(not):
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c = ARITH_ORN;
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goto gen_arith1;
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c = ARITH_ORN;
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goto gen_arith1;
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case INDEX_op_div_i32:
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tcg_out_div32(s, a0, a1, a2, c2, 0);
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@@ -1445,8 +1445,8 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
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break;
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gen_arith1:
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tcg_out_arithc(s, a0, TCG_REG_G0, a1, const_args[1], c);
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break;
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tcg_out_arithc(s, a0, TCG_REG_G0, a1, const_args[1], c);
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break;
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case INDEX_op_mov_i32: /* Always emitted via tcg_out_mov. */
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case INDEX_op_mov_i64:
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@@ -152,12 +152,12 @@ extern bool use_vis3_instructions;
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#include <windows.h>
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static inline void flush_icache_range(uintptr_t start, uintptr_t stop)
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{
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FlushInstructionCache(GetCurrentProcess(), (const void*)start, stop-start);
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FlushInstructionCache(GetCurrentProcess(), (const void*)start, stop-start);
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}
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#else
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static inline void flush_icache_range(uintptr_t start, uintptr_t stop)
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{
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uintptr_t p;
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uintptr_t p;
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for (p = start & -8; p < ((stop + 7) & -8); p += 8) {
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__asm__ __volatile__("flush\t%0" : : "r" (p));
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}
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