Improve documentation

This commit is contained in:
elicn
2024-09-19 17:04:21 +03:00
parent 2da154721b
commit 754194c7e8
5 changed files with 28 additions and 9 deletions

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@@ -1,5 +1,5 @@
# AArch32 classes and structures. """AArch32 classes and structures.
# """
# @author elicn # @author elicn
from typing import Any, Tuple from typing import Any, Tuple

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@@ -1,5 +1,5 @@
# AArch64 classes and structures. """AArch64 classes and structures.
# """
# @author elicn # @author elicn
from typing import Any, Callable, NamedTuple, Tuple from typing import Any, Callable, NamedTuple, Tuple

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@@ -1,5 +1,5 @@
# Intel architecture classes and structures. """Intel architecture classes and structures.
# """
# @author elicn # @author elicn
from typing import Any, Callable, Sequence, Tuple from typing import Any, Callable, Sequence, Tuple
@@ -37,6 +37,9 @@ class UcRegMMR(UcTupledReg[X86MMRReg]):
class UcRegMSR(UcTupledReg[X86MSRReg]): class UcRegMSR(UcTupledReg[X86MSRReg]):
"""Intel Model Specific Register
"""
_fields_ = ( _fields_ = (
('rid', ctypes.c_uint32), ('rid', ctypes.c_uint32),
('val', ctypes.c_uint64) ('val', ctypes.c_uint64)
@@ -48,6 +51,9 @@ class UcRegMSR(UcTupledReg[X86MSRReg]):
class UcRegFPR(UcTupledReg[X86FPReg]): class UcRegFPR(UcTupledReg[X86FPReg]):
"""Intel Floating Point Register
"""
_fields_ = ( _fields_ = (
('mantissa', ctypes.c_uint64), ('mantissa', ctypes.c_uint64),
('exponent', ctypes.c_uint16) ('exponent', ctypes.c_uint16)

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@@ -1,5 +1,5 @@
# Common types and structures. """Common types and structures.
# """
# @author elicn # @author elicn
from abc import abstractmethod from abc import abstractmethod
@@ -81,14 +81,23 @@ class UcLargeReg(UcReg):
class UcReg128(UcLargeReg): class UcReg128(UcLargeReg):
"""Large register holding a 128-bit value.
"""
_fields_ = [('qwords', ctypes.c_uint64 * 2)] _fields_ = [('qwords', ctypes.c_uint64 * 2)]
class UcReg256(UcLargeReg): class UcReg256(UcLargeReg):
"""Large register holding a 256-bit value.
"""
_fields_ = [('qwords', ctypes.c_uint64 * 4)] _fields_ = [('qwords', ctypes.c_uint64 * 4)]
class UcReg512(UcLargeReg): class UcReg512(UcLargeReg):
"""Large register holding a 512-bit value.
"""
_fields_ = [('qwords', ctypes.c_uint64 * 8)] _fields_ = [('qwords', ctypes.c_uint64 * 8)]

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@@ -1,3 +1,7 @@
"""New and improved Unicorn Python bindings by elicn
based on Nguyen Anh Quynnh's work
"""
from __future__ import annotations from __future__ import annotations
from typing import TYPE_CHECKING, Any, Callable, Iterable, Iterator, Mapping, MutableMapping, Optional, Sequence, Tuple, Type, TypeVar from typing import TYPE_CHECKING, Any, Callable, Iterable, Iterator, Mapping, MutableMapping, Optional, Sequence, Tuple, Type, TypeVar
@@ -111,7 +115,7 @@ def __load_uc_lib() -> ctypes.CDLL:
T = TypeVar('T') T = TypeVar('T')
def __pick_first_valid(iter: Iterable[T]) -> Optional[T]: def __pick_first_valid(iter: Iterable[T]) -> Optional[T]:
"""Iterate till encountering a non-None element """Iterate till encountering a non-None element and return it.
""" """
return next((elem for elem in iter if elem is not None), None) return next((elem for elem in iter if elem is not None), None)