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fix some oss-fuzz bugs (#1180)

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* fix oss-fuzz 10419.

* fix oss-fuzz 10427.

* fix oss-fuzz 10421.

* fix oss-fuzz 10422.

* fix oss-fuzz 10425.

* fix oss-fuzz 10426.

* fix oss-fuzz 10426.

* fix oss-fuzz 10422.

* fix oss-fuzz  10426.

* fix oss-fuzz 10456.

* fix oss-fuzz 10428.

* fix oss-fuzz 10429.

* fix oss-fuzz 10431.

* fix oss-fuzz 10435.

* fix oss-fuzz 10430.

* fix oss-fuzz 10436.

* remove unused var.
This commit is contained in:
Chen Huitao
2020-01-04 23:42:02 +08:00
committed by Nguyen Anh Quynh
parent 99097cab4c
commit 68eb357984
8 changed files with 17 additions and 17 deletions
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8
qemu/target-arm/translate-a64.c
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@@ -1084,7 +1084,7 @@ static void disas_uncond_b_imm(DisasContext *s, uint32_t insn)
TCGContext *tcg_ctx = s->uc->tcg_ctx;
uint64_t addr = s->pc + sextract32(insn, 0, 26) * 4 - 4;
if (insn & (1 << 31)) {
if (insn & (1U << 31)) {
/* C5.6.26 BL Branch with link */
tcg_gen_movi_i64(tcg_ctx, cpu_reg(s, 30), s->pc);
}
@@ -1283,7 +1283,7 @@ static void gen_get_nzcv(TCGContext *tcg_ctx, TCGv_i64 tcg_rt)
TCGv_i32 nzcv = tcg_temp_new_i32(tcg_ctx);
/* build bit 31, N */
tcg_gen_andi_i32(tcg_ctx, nzcv, tcg_ctx->cpu_NF, (1 << 31));
tcg_gen_andi_i32(tcg_ctx, nzcv, tcg_ctx->cpu_NF, (1U << 31));
/* build bit 30, Z */
tcg_gen_setcondi_i32(tcg_ctx, TCG_COND_EQ, tmp, tcg_ctx->cpu_ZF, 0);
tcg_gen_deposit_i32(tcg_ctx, nzcv, nzcv, tmp, 30, 1);
@@ -1308,7 +1308,7 @@ static void gen_set_nzcv(TCGContext *tcg_ctx, TCGv_i64 tcg_rt)
tcg_gen_trunc_i64_i32(tcg_ctx, nzcv, tcg_rt);
/* bit 31, N */
tcg_gen_andi_i32(tcg_ctx, tcg_ctx->cpu_NF, nzcv, (1 << 31));
tcg_gen_andi_i32(tcg_ctx, tcg_ctx->cpu_NF, nzcv, (1U << 31));
/* bit 30, Z */
tcg_gen_andi_i32(tcg_ctx, tcg_ctx->cpu_ZF, nzcv, (1 << 30));
tcg_gen_setcondi_i32(tcg_ctx, TCG_COND_EQ, tcg_ctx->cpu_ZF, tcg_ctx->cpu_ZF, 0);
@@ -1929,7 +1929,7 @@ static void disas_ldst_pair(DisasContext *s, uint32_t insn)
int rt = extract32(insn, 0, 5);
int rn = extract32(insn, 5, 5);
int rt2 = extract32(insn, 10, 5);
int64_t offset = sextract32(insn, 15, 7);
uint64_t offset = sextract64(insn, 15, 7);
int index = extract32(insn, 23, 2);
bool is_vector = extract32(insn, 26, 1);
bool is_load = extract32(insn, 22, 1);