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Add read and write cases for i386 CR8

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This commit is contained in:
elicn
2024-09-28 22:11:01 +03:00
parent 91122b6a68
commit 433bb163d9
2 changed files with 5 additions and 1 deletions
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2
qemu/target/i386/cpu.h
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@@ -1397,7 +1397,7 @@ typedef struct CPUX86State {
SegmentCache gdt; /* only base and limit are used */ SegmentCache gdt; /* only base and limit are used */
SegmentCache idt; /* only base and limit are used */ SegmentCache idt; /* only base and limit are used */
target_ulong cr[5]; /* NOTE: cr1 is unused */ target_ulong cr[9]; /* NOTE: cr1, cr5-cr7 are not used */
int32_t a20_mask; int32_t a20_mask;
BNDReg bnd_regs[4]; BNDReg bnd_regs[4];

4
qemu/target/i386/unicorn.c
View File

@@ -594,6 +594,7 @@ uc_err reg_read(void *_env, int mode, unsigned int regid, void *value,
case UC_X86_REG_CR2: case UC_X86_REG_CR2:
case UC_X86_REG_CR3: case UC_X86_REG_CR3:
case UC_X86_REG_CR4: case UC_X86_REG_CR4:
case UC_X86_REG_CR8:
CHECK_REG_TYPE(int64_t); CHECK_REG_TYPE(int64_t);
*(int64_t *)value = env->cr[regid - UC_X86_REG_CR0]; *(int64_t *)value = env->cr[regid - UC_X86_REG_CR0];
break; break;
@@ -1402,6 +1403,9 @@ uc_err reg_write(void *_env, int mode, unsigned int regid, const void *value,
case UC_X86_REG_CR4: case UC_X86_REG_CR4:
CHECK_REG_TYPE(uint64_t); CHECK_REG_TYPE(uint64_t);
cpu_x86_update_cr4(env, *(uint32_t *)value); cpu_x86_update_cr4(env, *(uint32_t *)value);
goto write_cr64;
case UC_X86_REG_CR8:
CHECK_REG_TYPE(uint64_t);
write_cr64: write_cr64:
env->cr[regid - UC_X86_REG_CR0] = *(uint64_t *)value; env->cr[regid - UC_X86_REG_CR0] = *(uint64_t *)value;
break; break;