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Implement uc_reg_{read,write}{,_batch}2 APIs.

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These APIs take size parameters, which can be used to properly bounds-check the
inputs and outputs for various registers. Additionally, all backends now throw
UC_ERR_ARG if the input register numbers are invalid.

Completes #1831.
This commit is contained in:
Robert Xiao
2023-05-11 12:43:15 -07:00
parent d7a806c026
commit 4055a5ab10
24 changed files with 1523 additions and 1032 deletions
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207
qemu/target/tricore/unicorn.c
View File

@@ -39,193 +39,258 @@ void tricore_reg_reset(struct uc_struct *uc)
env->PC = 0;
}
static void reg_read(CPUTriCoreState *env, unsigned int regid, void *value)
static uc_err reg_read(CPUTriCoreState *env, unsigned int regid, void *value,
size_t *size)
{
if (regid >= UC_TRICORE_REG_A0 && regid <= UC_TRICORE_REG_A9)
*(int32_t *)value = env->gpr_a[regid - UC_TRICORE_REG_A0];
if (regid >= UC_TRICORE_REG_A12 && regid <= UC_TRICORE_REG_A15)
*(int32_t *)value = env->gpr_a[regid - UC_TRICORE_REG_A0];
else if (regid >= UC_TRICORE_REG_D0 && regid <= UC_TRICORE_REG_D15)
*(int32_t *)value = env->gpr_d[regid - UC_TRICORE_REG_D0];
else {
uc_err ret = UC_ERR_ARG;
if (regid >= UC_TRICORE_REG_A0 && regid <= UC_TRICORE_REG_A9) {
CHECK_REG_TYPE(uint32_t);
*(uint32_t *)value = env->gpr_a[regid - UC_TRICORE_REG_A0];
} else if (regid >= UC_TRICORE_REG_A12 && regid <= UC_TRICORE_REG_A15) {
CHECK_REG_TYPE(uint32_t);
*(uint32_t *)value = env->gpr_a[regid - UC_TRICORE_REG_A0];
} else if (regid >= UC_TRICORE_REG_D0 && regid <= UC_TRICORE_REG_D15) {
CHECK_REG_TYPE(uint32_t);
*(uint32_t *)value = env->gpr_d[regid - UC_TRICORE_REG_D0];
} else {
switch (regid) {
// case UC_TRICORE_REG_SP:
case UC_TRICORE_REG_A10:
*(int32_t *)value = env->gpr_a[10];
CHECK_REG_TYPE(uint32_t);
*(uint32_t *)value = env->gpr_a[10];
break;
// case UC_TRICORE_REG_LR:
case UC_TRICORE_REG_A11:
*(int32_t *)value = env->gpr_a[11];
CHECK_REG_TYPE(uint32_t);
*(uint32_t *)value = env->gpr_a[11];
break;
case UC_TRICORE_REG_PC:
*(int32_t *)value = env->PC;
CHECK_REG_TYPE(uint32_t);
*(uint32_t *)value = env->PC;
break;
case UC_TRICORE_REG_PCXI:
*(int32_t *)value = env->PCXI;
CHECK_REG_TYPE(uint32_t);
*(uint32_t *)value = env->PCXI;
break;
case UC_TRICORE_REG_PSW:
*(int32_t *)value = env->PSW;
CHECK_REG_TYPE(uint32_t);
*(uint32_t *)value = env->PSW;
break;
case UC_TRICORE_REG_PSW_USB_C:
*(int32_t *)value = env->PSW_USB_C;
CHECK_REG_TYPE(uint32_t);
*(uint32_t *)value = env->PSW_USB_C;
break;
case UC_TRICORE_REG_PSW_USB_V:
*(int32_t *)value = env->PSW_USB_V;
CHECK_REG_TYPE(uint32_t);
*(uint32_t *)value = env->PSW_USB_V;
break;
case UC_TRICORE_REG_PSW_USB_SV:
*(int32_t *)value = env->PSW_USB_SV;
CHECK_REG_TYPE(uint32_t);
*(uint32_t *)value = env->PSW_USB_SV;
break;
case UC_TRICORE_REG_PSW_USB_AV:
*(int32_t *)value = env->PSW_USB_AV;
CHECK_REG_TYPE(uint32_t);
*(uint32_t *)value = env->PSW_USB_AV;
break;
case UC_TRICORE_REG_PSW_USB_SAV:
*(int32_t *)value = env->PSW_USB_SAV;
CHECK_REG_TYPE(uint32_t);
*(uint32_t *)value = env->PSW_USB_SAV;
break;
case UC_TRICORE_REG_SYSCON:
*(int32_t *)value = env->SYSCON;
CHECK_REG_TYPE(uint32_t);
*(uint32_t *)value = env->SYSCON;
break;
case UC_TRICORE_REG_CPU_ID:
*(int32_t *)value = env->CPU_ID;
CHECK_REG_TYPE(uint32_t);
*(uint32_t *)value = env->CPU_ID;
break;
case UC_TRICORE_REG_BIV:
*(int32_t *)value = env->BIV;
CHECK_REG_TYPE(uint32_t);
*(uint32_t *)value = env->BIV;
break;
case UC_TRICORE_REG_BTV:
*(int32_t *)value = env->BTV;
CHECK_REG_TYPE(uint32_t);
*(uint32_t *)value = env->BTV;
break;
case UC_TRICORE_REG_ISP:
*(int32_t *)value = env->ISP;
CHECK_REG_TYPE(uint32_t);
*(uint32_t *)value = env->ISP;
break;
case UC_TRICORE_REG_ICR:
*(int32_t *)value = env->ICR;
CHECK_REG_TYPE(uint32_t);
*(uint32_t *)value = env->ICR;
break;
case UC_TRICORE_REG_FCX:
*(int32_t *)value = env->FCX;
CHECK_REG_TYPE(uint32_t);
*(uint32_t *)value = env->FCX;
break;
case UC_TRICORE_REG_LCX:
*(int32_t *)value = env->LCX;
CHECK_REG_TYPE(uint32_t);
*(uint32_t *)value = env->LCX;
break;
case UC_TRICORE_REG_COMPAT:
*(int32_t *)value = env->COMPAT;
CHECK_REG_TYPE(uint32_t);
*(uint32_t *)value = env->COMPAT;
break;
}
}
return ret;
}
int tricore_reg_read(struct uc_struct *uc, unsigned int *regs, void **vals,
int count)
int tricore_reg_read(struct uc_struct *uc, unsigned int *regs,
void *const *vals, size_t *sizes, int count)
{
CPUTriCoreState *env = &(TRICORE_CPU(uc->cpu)->env);
int i;
uc_err err;
for (i = 0; i < count; i++) {
unsigned int regid = regs[i];
void *value = vals[i];
reg_read(env, regid, value);
err = reg_read(env, regid, value, sizes ? sizes + i : NULL);
if (err) {
return err;
}
}
return 0;
return UC_ERR_OK;
}
int tricore_context_reg_read(struct uc_context *uc, unsigned int *regs,
void **vals, int count)
void *const *vals, size_t *sizes, int count)
{
CPUTriCoreState *env = (CPUTriCoreState *)uc->data;
int i;
uc_err err;
for (i = 0; i < count; i++) {
unsigned int regid = regs[i];
void *value = vals[i];
reg_read(env, regid, value);
err = reg_read(env, regid, value, sizes ? sizes + i : NULL);
if (err) {
return err;
}
}
return 0;
return UC_ERR_OK;
}
static void reg_write(CPUTriCoreState *env, unsigned int regid,
const void *value)
static uc_err reg_write(CPUTriCoreState *env, unsigned int regid,
const void *value, size_t *size)
{
if (regid >= UC_TRICORE_REG_A0 && regid <= UC_TRICORE_REG_A9)
env->gpr_a[regid - UC_TRICORE_REG_A0] = *(int32_t *)value;
if (regid >= UC_TRICORE_REG_A12 && regid <= UC_TRICORE_REG_A15)
env->gpr_a[regid - UC_TRICORE_REG_A0] = *(int32_t *)value;
else if (regid >= UC_TRICORE_REG_D0 && regid <= UC_TRICORE_REG_D15)
env->gpr_d[regid - UC_TRICORE_REG_D0] = *(int32_t *)value;
else {
uc_err ret = UC_ERR_ARG;
if (regid >= UC_TRICORE_REG_A0 && regid <= UC_TRICORE_REG_A9) {
CHECK_REG_TYPE(uint32_t);
env->gpr_a[regid - UC_TRICORE_REG_A0] = *(uint32_t *)value;
} else if (regid >= UC_TRICORE_REG_A12 && regid <= UC_TRICORE_REG_A15) {
CHECK_REG_TYPE(uint32_t);
env->gpr_a[regid - UC_TRICORE_REG_A0] = *(uint32_t *)value;
} else if (regid >= UC_TRICORE_REG_D0 && regid <= UC_TRICORE_REG_D15) {
CHECK_REG_TYPE(uint32_t);
env->gpr_d[regid - UC_TRICORE_REG_D0] = *(uint32_t *)value;
} else {
switch (regid) {
// case UC_TRICORE_REG_SP:
case UC_TRICORE_REG_A10:
env->gpr_a[10] = *(int32_t *)value;
CHECK_REG_TYPE(uint32_t);
env->gpr_a[10] = *(uint32_t *)value;
break;
// case UC_TRICORE_REG_LR:
case UC_TRICORE_REG_A11:
env->gpr_a[11] = *(int32_t *)value;
CHECK_REG_TYPE(uint32_t);
env->gpr_a[11] = *(uint32_t *)value;
break;
case UC_TRICORE_REG_PC:
env->PC = *(int32_t *)value;
CHECK_REG_TYPE(uint32_t);
env->PC = *(uint32_t *)value;
break;
case UC_TRICORE_REG_PCXI:
env->PCXI = *(int32_t *)value;
CHECK_REG_TYPE(uint32_t);
env->PCXI = *(uint32_t *)value;
break;
case UC_TRICORE_REG_PSW:
env->PSW = *(int32_t *)value;
CHECK_REG_TYPE(uint32_t);
env->PSW = *(uint32_t *)value;
break;
case UC_TRICORE_REG_PSW_USB_C:
env->PSW_USB_C = *(int32_t *)value;
CHECK_REG_TYPE(uint32_t);
env->PSW_USB_C = *(uint32_t *)value;
break;
case UC_TRICORE_REG_PSW_USB_V:
env->PSW_USB_V = *(int32_t *)value;
CHECK_REG_TYPE(uint32_t);
env->PSW_USB_V = *(uint32_t *)value;
break;
case UC_TRICORE_REG_PSW_USB_SV:
env->PSW_USB_SV = *(int32_t *)value;
CHECK_REG_TYPE(uint32_t);
env->PSW_USB_SV = *(uint32_t *)value;
break;
case UC_TRICORE_REG_PSW_USB_AV:
env->PSW_USB_AV = *(int32_t *)value;
CHECK_REG_TYPE(uint32_t);
env->PSW_USB_AV = *(uint32_t *)value;
break;
case UC_TRICORE_REG_PSW_USB_SAV:
env->PSW_USB_SAV = *(int32_t *)value;
CHECK_REG_TYPE(uint32_t);
env->PSW_USB_SAV = *(uint32_t *)value;
break;
case UC_TRICORE_REG_SYSCON:
env->SYSCON = *(int32_t *)value;
CHECK_REG_TYPE(uint32_t);
env->SYSCON = *(uint32_t *)value;
break;
case UC_TRICORE_REG_CPU_ID:
env->CPU_ID = *(int32_t *)value;
CHECK_REG_TYPE(uint32_t);
env->CPU_ID = *(uint32_t *)value;
break;
case UC_TRICORE_REG_BIV:
env->BIV = *(int32_t *)value;
CHECK_REG_TYPE(uint32_t);
env->BIV = *(uint32_t *)value;
break;
case UC_TRICORE_REG_BTV:
env->BTV = *(int32_t *)value;
CHECK_REG_TYPE(uint32_t);
env->BTV = *(uint32_t *)value;
break;
case UC_TRICORE_REG_ISP:
env->ISP = *(int32_t *)value;
CHECK_REG_TYPE(uint32_t);
env->ISP = *(uint32_t *)value;
break;
case UC_TRICORE_REG_ICR:
env->ICR = *(int32_t *)value;
CHECK_REG_TYPE(uint32_t);
env->ICR = *(uint32_t *)value;
break;
case UC_TRICORE_REG_FCX:
env->FCX = *(int32_t *)value;
CHECK_REG_TYPE(uint32_t);
env->FCX = *(uint32_t *)value;
break;
case UC_TRICORE_REG_LCX:
env->LCX = *(int32_t *)value;
CHECK_REG_TYPE(uint32_t);
env->LCX = *(uint32_t *)value;
break;
case UC_TRICORE_REG_COMPAT:
env->COMPAT = *(int32_t *)value;
CHECK_REG_TYPE(uint32_t);
env->COMPAT = *(uint32_t *)value;
break;
}
}
return ret;
}
int tricore_reg_write(struct uc_struct *uc, unsigned int *regs,
void *const *vals, int count)
const void *const *vals, size_t *sizes, int count)
{
CPUTriCoreState *env = &(TRICORE_CPU(uc->cpu)->env);
int i;
uc_err err;
for (i = 0; i < count; i++) {
unsigned int regid = regs[i];
void *value = vals[i];
reg_write(env, regid, value);
const void *value = vals[i];
err = reg_write(env, regid, value, sizes ? sizes + i : NULL);
if (err) {
return err;
}
if (regid == UC_TRICORE_REG_PC) {
// force to quit execution and flush TB
uc->quit_request = true;
@@ -233,22 +298,26 @@ int tricore_reg_write(struct uc_struct *uc, unsigned int *regs,
}
}
return 0;
return UC_ERR_OK;
}
int tricore_context_reg_write(struct uc_context *uc, unsigned int *regs,
void *const *vals, int count)
const void *const *vals, size_t *sizes, int count)
{
CPUTriCoreState *env = (CPUTriCoreState *)uc->data;
int i;
uc_err err;
for (i = 0; i < count; i++) {
unsigned int regid = regs[i];
const void *value = vals[i];
reg_write(env, regid, value);
err = reg_write(env, regid, value, sizes ? sizes + i : NULL);
if (err) {
return err;
}
}
return 0;
return UC_ERR_OK;
}
static int tricore_cpus_init(struct uc_struct *uc, const char *cpu_model)