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Implement uc_reg_{read,write}{,_batch}2 APIs.

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These APIs take size parameters, which can be used to properly bounds-check the
inputs and outputs for various registers. Additionally, all backends now throw
UC_ERR_ARG if the input register numbers are invalid.

Completes #1831.
This commit is contained in:
Robert Xiao
2023-05-11 12:43:15 -07:00
parent d7a806c026
commit 4055a5ab10
24 changed files with 1523 additions and 1032 deletions
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195
qemu/target/ppc/unicorn.c
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@@ -146,64 +146,31 @@ void ppc_reg_reset(struct uc_struct *uc)
}
// http://www.csit-sun.pub.ro/~cpop/Documentatie_SMP/Motorola_PowerPC/PowerPc/GenInfo/pemch2.pdf
static void reg_read(CPUPPCState *env, unsigned int regid, void *value)
static uc_err reg_read(CPUPPCState *env, unsigned int regid, void *value,
size_t *size)
{
uint32_t val;
uc_err ret = UC_ERR_ARG;
if (regid >= UC_PPC_REG_0 && regid <= UC_PPC_REG_31)
if (regid >= UC_PPC_REG_0 && regid <= UC_PPC_REG_31) {
CHECK_REG_TYPE(ppcreg_t);
*(ppcreg_t *)value = env->gpr[regid - UC_PPC_REG_0];
else {
} else if (regid >= UC_PPC_REG_FPR0 && regid <= UC_PPC_REG_FPR31) {
CHECK_REG_TYPE(uint64_t);
*(uint64_t *)value = env->vsr[regid - UC_PPC_REG_FPR0].VsrD(0);
} else if (regid >= UC_PPC_REG_CR0 && regid <= UC_PPC_REG_CR7) {
CHECK_REG_TYPE(uint32_t);
*(uint32_t *)value = env->crf[regid - UC_PPC_REG_CR0];
} else {
switch (regid) {
default:
break;
case UC_PPC_REG_PC:
CHECK_REG_TYPE(ppcreg_t);
*(ppcreg_t *)value = env->nip;
break;
case UC_PPC_REG_FPR0:
case UC_PPC_REG_FPR1:
case UC_PPC_REG_FPR2:
case UC_PPC_REG_FPR3:
case UC_PPC_REG_FPR4:
case UC_PPC_REG_FPR5:
case UC_PPC_REG_FPR6:
case UC_PPC_REG_FPR7:
case UC_PPC_REG_FPR8:
case UC_PPC_REG_FPR9:
case UC_PPC_REG_FPR10:
case UC_PPC_REG_FPR11:
case UC_PPC_REG_FPR12:
case UC_PPC_REG_FPR13:
case UC_PPC_REG_FPR14:
case UC_PPC_REG_FPR15:
case UC_PPC_REG_FPR16:
case UC_PPC_REG_FPR17:
case UC_PPC_REG_FPR18:
case UC_PPC_REG_FPR19:
case UC_PPC_REG_FPR20:
case UC_PPC_REG_FPR21:
case UC_PPC_REG_FPR22:
case UC_PPC_REG_FPR23:
case UC_PPC_REG_FPR24:
case UC_PPC_REG_FPR25:
case UC_PPC_REG_FPR26:
case UC_PPC_REG_FPR27:
case UC_PPC_REG_FPR28:
case UC_PPC_REG_FPR29:
case UC_PPC_REG_FPR30:
case UC_PPC_REG_FPR31:
*(uint64_t *)value = env->vsr[regid - UC_PPC_REG_FPR0].VsrD(0);
break;
case UC_PPC_REG_CR0:
case UC_PPC_REG_CR1:
case UC_PPC_REG_CR2:
case UC_PPC_REG_CR3:
case UC_PPC_REG_CR4:
case UC_PPC_REG_CR5:
case UC_PPC_REG_CR6:
case UC_PPC_REG_CR7:
*(uint32_t *)value = env->crf[regid - UC_PPC_REG_CR0];
break;
case UC_PPC_REG_CR:
case UC_PPC_REG_CR: {
CHECK_REG_TYPE(uint32_t);
uint32_t val;
val = 0;
for (int i = 0; i < 8; i++) {
val <<= 4;
@@ -211,138 +178,124 @@ static void reg_read(CPUPPCState *env, unsigned int regid, void *value)
}
*(uint32_t *)value = val;
break;
}
case UC_PPC_REG_LR:
CHECK_REG_TYPE(ppcreg_t);
*(ppcreg_t *)value = env->lr;
break;
case UC_PPC_REG_CTR:
CHECK_REG_TYPE(ppcreg_t);
*(ppcreg_t *)value = env->ctr;
break;
case UC_PPC_REG_MSR:
CHECK_REG_TYPE(ppcreg_t);
*(ppcreg_t *)value = env->msr;
break;
case UC_PPC_REG_XER:
CHECK_REG_TYPE(uint32_t);
*(uint32_t *)value = env->xer;
break;
case UC_PPC_REG_FPSCR:
CHECK_REG_TYPE(uint32_t);
*(uint32_t *)value = env->fpscr;
break;
}
}
return;
return ret;
}
static void reg_write(CPUPPCState *env, unsigned int regid, const void *value)
static uc_err reg_write(CPUPPCState *env, unsigned int regid, const void *value,
size_t *size)
{
uint32_t val;
int i;
uc_err ret = UC_ERR_ARG;
if (regid >= UC_PPC_REG_0 && regid <= UC_PPC_REG_31)
if (regid >= UC_PPC_REG_0 && regid <= UC_PPC_REG_31) {
CHECK_REG_TYPE(ppcreg_t);
env->gpr[regid - UC_PPC_REG_0] = *(ppcreg_t *)value;
else {
} else if (regid >= UC_PPC_REG_FPR0 && regid <= UC_PPC_REG_FPR31) {
CHECK_REG_TYPE(uint64_t);
env->vsr[regid - UC_PPC_REG_FPR0].VsrD(0) = *(uint64_t *)value;
} else if (regid >= UC_PPC_REG_CR0 && regid <= UC_PPC_REG_CR7) {
CHECK_REG_TYPE(uint32_t);
env->crf[regid - UC_PPC_REG_CR0] = (*(uint32_t *)value) & 0b1111;
} else {
switch (regid) {
default:
break;
case UC_PPC_REG_PC:
CHECK_REG_TYPE(ppcreg_t);
env->nip = *(ppcreg_t *)value;
break;
case UC_PPC_REG_FPR0:
case UC_PPC_REG_FPR1:
case UC_PPC_REG_FPR2:
case UC_PPC_REG_FPR3:
case UC_PPC_REG_FPR4:
case UC_PPC_REG_FPR5:
case UC_PPC_REG_FPR6:
case UC_PPC_REG_FPR7:
case UC_PPC_REG_FPR8:
case UC_PPC_REG_FPR9:
case UC_PPC_REG_FPR10:
case UC_PPC_REG_FPR11:
case UC_PPC_REG_FPR12:
case UC_PPC_REG_FPR13:
case UC_PPC_REG_FPR14:
case UC_PPC_REG_FPR15:
case UC_PPC_REG_FPR16:
case UC_PPC_REG_FPR17:
case UC_PPC_REG_FPR18:
case UC_PPC_REG_FPR19:
case UC_PPC_REG_FPR20:
case UC_PPC_REG_FPR21:
case UC_PPC_REG_FPR22:
case UC_PPC_REG_FPR23:
case UC_PPC_REG_FPR24:
case UC_PPC_REG_FPR25:
case UC_PPC_REG_FPR26:
case UC_PPC_REG_FPR27:
case UC_PPC_REG_FPR28:
case UC_PPC_REG_FPR29:
case UC_PPC_REG_FPR30:
case UC_PPC_REG_FPR31:
env->vsr[regid - UC_PPC_REG_FPR0].VsrD(0) = *(uint64_t *)value;
break;
case UC_PPC_REG_CR0:
case UC_PPC_REG_CR1:
case UC_PPC_REG_CR2:
case UC_PPC_REG_CR3:
case UC_PPC_REG_CR4:
case UC_PPC_REG_CR5:
case UC_PPC_REG_CR6:
case UC_PPC_REG_CR7:
env->crf[regid - UC_PPC_REG_CR0] = (*(uint32_t *)value) & 0b1111;
break;
case UC_PPC_REG_CR:
val = *(uint32_t *)value;
case UC_PPC_REG_CR: {
CHECK_REG_TYPE(uint32_t);
uint32_t val = *(uint32_t *)value;
for (i = 7; i >= 0; i--) {
env->crf[i] = val & 0b1111;
val >>= 4;
}
break;
}
case UC_PPC_REG_LR:
CHECK_REG_TYPE(ppcreg_t);
env->lr = *(ppcreg_t *)value;
break;
case UC_PPC_REG_CTR:
CHECK_REG_TYPE(ppcreg_t);
env->ctr = *(ppcreg_t *)value;
break;
case UC_PPC_REG_MSR:
CHECK_REG_TYPE(ppcreg_t);
uc_ppc_store_msr(env, *(ppcreg_t *)value, 0);
break;
case UC_PPC_REG_XER:
CHECK_REG_TYPE(uint32_t);
env->xer = *(uint32_t *)value;
break;
case UC_PPC_REG_FPSCR:
CHECK_REG_TYPE(uint32_t);
store_fpscr(env, *(uint32_t *)value, 0xffffffff);
break;
}
}
return;
return ret;
}
int ppc_reg_read(struct uc_struct *uc, unsigned int *regs, void **vals,
int count)
int ppc_reg_read(struct uc_struct *uc, unsigned int *regs, void *const *vals,
size_t *sizes, int count)
{
CPUPPCState *env = &(POWERPC_CPU(uc->cpu)->env);
int i;
uc_err err;
for (i = 0; i < count; i++) {
unsigned int regid = regs[i];
void *value = vals[i];
reg_read(env, regid, value);
err = reg_read(env, regid, value, sizes ? sizes + i : NULL);
if (err) {
return err;
}
}
return 0;
return UC_ERR_OK;
}
int ppc_reg_write(struct uc_struct *uc, unsigned int *regs, void *const *vals,
int count)
int ppc_reg_write(struct uc_struct *uc, unsigned int *regs,
const void *const *vals, size_t *sizes, int count)
{
CPUPPCState *env = &(POWERPC_CPU(uc->cpu)->env);
int i;
uc_err err;
for (i = 0; i < count; i++) {
unsigned int regid = regs[i];
const void *value = vals[i];
reg_write(env, regid, value);
err = reg_write(env, regid, value, sizes ? sizes + i : NULL);
if (err) {
return err;
}
if (regid == UC_PPC_REG_PC) {
// force to quit execution and flush TB
uc->quit_request = true;
@@ -350,49 +303,57 @@ int ppc_reg_write(struct uc_struct *uc, unsigned int *regs, void *const *vals,
}
}
return 0;
return UC_ERR_OK;
}
DEFAULT_VISIBILITY
#ifdef TARGET_PPC64
int ppc64_context_reg_read(struct uc_context *ctx, unsigned int *regs,
void **vals, int count)
void *const *vals, size_t *sizes, int count)
#else
int ppc_context_reg_read(struct uc_context *ctx, unsigned int *regs,
void **vals, int count)
void *const *vals, size_t *sizes, int count)
#endif
{
CPUPPCState *env = (CPUPPCState *)ctx->data;
int i;
uc_err err;
for (i = 0; i < count; i++) {
unsigned int regid = regs[i];
void *value = vals[i];
reg_read(env, regid, value);
err = reg_read(env, regid, value, sizes ? sizes + i : NULL);
if (err) {
return err;
}
}
return 0;
return UC_ERR_OK;
}
DEFAULT_VISIBILITY
#ifdef TARGET_PPC64
int ppc64_context_reg_write(struct uc_context *ctx, unsigned int *regs,
void *const *vals, int count)
const void *const *vals, size_t *sizes, int count)
#else
int ppc_context_reg_write(struct uc_context *ctx, unsigned int *regs,
void *const *vals, int count)
const void *const *vals, size_t *sizes, int count)
#endif
{
CPUPPCState *env = (CPUPPCState *)ctx->data;
int i;
uc_err err;
for (i = 0; i < count; i++) {
unsigned int regid = regs[i];
const void *value = vals[i];
reg_write(env, regid, value);
err = reg_write(env, regid, value, sizes ? sizes + i : NULL);
if (err) {
return err;
}
}
return 0;
return UC_ERR_OK;
}
PowerPCCPU *cpu_ppc_init(struct uc_struct *uc);