diff --git a/qemu/accel/tcg/cpu-exec.c b/qemu/accel/tcg/cpu-exec.c
index 9c94efd1..e8d493ed 100644
--- a/qemu/accel/tcg/cpu-exec.c
+++ b/qemu/accel/tcg/cpu-exec.c
@@ -408,7 +408,9 @@ static inline bool cpu_handle_exception(CPUState *cpu, int *ret)
         // Unicorn: If un-catched interrupt, stop executions.
         if (!catched) {
             // printf("AAAAAAAAAAAA\n"); qq
-            uc->invalid_error = UC_ERR_EXCEPTION;
+            if (uc->invalid_error == UC_ERR_OK) {
+                uc->invalid_error = UC_ERR_EXCEPTION;
+            }
             cpu->halted = 1;
             *ret = EXCP_HLT;
             return true;
diff --git a/qemu/target/mips/helper.c b/qemu/target/mips/helper.c
index 35a512a8..3c2ba8ce 100644
--- a/qemu/target/mips/helper.c
+++ b/qemu/target/mips/helper.c
@@ -535,6 +535,18 @@ static void raise_mmu_exception(CPUMIPSState *env, target_ulong address,
 #endif
     cs->exception_index = exception;
     env->error_code = error_code;
+
+    // Dispatch internal exceptions to Unicorn Exceptions
+    switch (exception) {
+        case EXCP_TLBL:
+            env->uc->invalid_error = UC_ERR_READ_UNMAPPED;
+            env->uc->invalid_addr = address;
+            break;
+        case EXCP_TLBS:
+            env->uc->invalid_error = UC_ERR_WRITE_UNMAPPED;
+            env->uc->invalid_addr = address;
+            break;
+    }
 }
 
 hwaddr mips_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
diff --git a/qemu/target/mips/op_helper.c b/qemu/target/mips/op_helper.c
index fea51a69..9802b9ce 100644
--- a/qemu/target/mips/op_helper.c
+++ b/qemu/target/mips/op_helper.c
@@ -1098,6 +1098,15 @@ void mips_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
         }
     }
 
+    switch (excp) {
+        case EXCP_AdEL:
+            env->uc->invalid_error = UC_ERR_READ_UNALIGNED;
+            break;
+        case EXCP_AdES:
+            env->uc->invalid_error = UC_ERR_WRITE_UNALIGNED;
+            break;
+    }
+
     do_raise_exception_err(env, excp, error_code, retaddr);
 }