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feat(arm): add an ESR register (#2155)

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This allows users to read/write from the ARM syndrome value like in
AArch64.
This commit is contained in:
Amaan Qureshi
2025-04-12 09:46:37 -04:00
committed by GitHub
parent 7f48b1dd4a
commit 3a7bde03b8
11 changed files with 73 additions and 16 deletions
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3
bindings/java/src/main/java/unicorn/ArmConst.java
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@@ -184,7 +184,8 @@ public interface ArmConst {
public static final int UC_ARM_REG_XPSR_G = 137;
public static final int UC_ARM_REG_XPSR_NZCVQG = 138;
public static final int UC_ARM_REG_CP_REG = 139;
public static final int UC_ARM_REG_ENDING = 140;
public static final int UC_ARM_REG_ESR = 140;
public static final int UC_ARM_REG_ENDING = 141;
// alias registers
public static final int UC_ARM_REG_R13 = 12;