import
This commit is contained in:
Nguyen Anh Quynh
416
qemu/cpu-exec.c
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416
qemu/cpu-exec.c
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@@ -0,0 +1,416 @@
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/*
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* emulator main execution loop
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*
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* Copyright (c) 2003-2005 Fabrice Bellard
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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/* Modified for Unicorn Engine by Nguyen Anh Quynh, 2015 */
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#include "tcg.h"
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#include "sysemu/sysemu.h"
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#include "uc_priv.h"
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static tcg_target_ulong cpu_tb_exec(CPUState *cpu, uint8_t *tb_ptr);
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static TranslationBlock *tb_find_slow(CPUArchState *env, target_ulong pc,
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target_ulong cs_base, uint64_t flags);
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static TranslationBlock *tb_find_fast(CPUArchState *env);
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static void cpu_handle_debug_exception(CPUArchState *env);
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void cpu_loop_exit(CPUState *cpu)
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{
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cpu->current_tb = NULL;
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siglongjmp(cpu->jmp_env, 1);
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}
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/* exit the current TB from a signal handler. The host registers are
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restored in a state compatible with the CPU emulator
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*/
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#if defined(CONFIG_SOFTMMU)
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void cpu_resume_from_signal(CPUState *cpu, void *puc)
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{
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#endif
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/* XXX: restore cpu registers saved in host registers */
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cpu->exception_index = -1;
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siglongjmp(cpu->jmp_env, 1);
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}
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/* main execution loop */
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int cpu_exec(struct uc_struct *uc, CPUArchState *env) // qq
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{
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CPUState *cpu = ENV_GET_CPU(env);
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TCGContext *tcg_ctx = env->uc->tcg_ctx;
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CPUClass *cc = CPU_GET_CLASS(uc, cpu);
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#ifdef TARGET_I386
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X86CPU *x86_cpu = X86_CPU(uc, cpu);
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#endif
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int ret, interrupt_request;
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TranslationBlock *tb;
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uint8_t *tc_ptr;
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uintptr_t next_tb;
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/* This must be volatile so it is not trashed by longjmp() */
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volatile bool have_tb_lock = false;
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if (cpu->halted) {
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if (!cpu_has_work(cpu)) {
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return EXCP_HALTED;
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}
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cpu->halted = 0;
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}
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uc->current_cpu = cpu;
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/* As long as current_cpu is null, up to the assignment just above,
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* requests by other threads to exit the execution loop are expected to
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* be issued using the exit_request global. We must make sure that our
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* evaluation of the global value is performed past the current_cpu
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* value transition point, which requires a memory barrier as well as
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* an instruction scheduling constraint on modern architectures. */
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smp_mb();
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if (unlikely(uc->exit_request)) {
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cpu->exit_request = 1;
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}
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cc->cpu_exec_enter(cpu);
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cpu->exception_index = -1;
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/* prepare setjmp context for exception handling */
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for(;;) {
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if (sigsetjmp(cpu->jmp_env, 0) == 0) {
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if (uc->stop_request || uc->invalid_error)
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break;
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/* if an exception is pending, we execute it here */
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if (cpu->exception_index >= 0) {
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//printf(">>> GOT INTERRUPT. exception idx = %x\n", cpu->exception_index); // qq
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if (uc->stop_interrupt && uc->stop_interrupt(cpu->exception_index)) {
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cpu->halted = 1;
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uc->invalid_error = UC_ERR_INSN_INVALID;
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ret = EXCP_HLT;
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break;
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}
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if ((uc->arch == UC_ARCH_X86 && cpu->exception_index == 0x99) || // X86's Int 0x99
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(uc->arch == UC_ARCH_ARM && cpu->exception_index == 2) || /* ARM's EXCP_SWI */
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(uc->arch == UC_ARCH_ARM64 && cpu->exception_index == 2) || /* ARM's EXCP_SWI */
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(uc->arch == UC_ARCH_MIPS && cpu->exception_index == 17) || /* Mips's EXCP_SYSCALL */
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(uc->arch == UC_ARCH_SPARC && cpu->exception_index == 0x80) || /* Sparc's TT_TRAP */
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(uc->arch == UC_ARCH_SPARC && cpu->exception_index == 0x100) || /* Sparc64's TT_TRAP */
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(uc->arch == UC_ARCH_M68K && cpu->exception_index == 0x2f) /* M68K's EXCP_TRAP15 */
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) {
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cpu->halted = 1;
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//cpu->exception_index = EXCP_HLT;
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//no_shutdown = 0;
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//printf(">>> calling shutdown-request...\n");
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//printf(">>> ** current EIP = %x\n", X86_CPU(cpu)->env.eip);
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//qemu_system_shutdown_request();
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//pause_all_vcpus();
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//cpu_loop_exit(cpu);
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ret = EXCP_HLT;
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break;
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}
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if (cpu->exception_index >= EXCP_INTERRUPT) {
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/* exit request from the cpu execution loop */
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ret = cpu->exception_index;
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if (ret == EXCP_DEBUG) {
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cpu_handle_debug_exception(env);
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}
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break;
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} else {
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#if defined(CONFIG_USER_ONLY)
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/* if user mode only, we simulate a fake exception
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which will be handled outside the cpu execution
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loop */
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#if defined(TARGET_I386)
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cc->do_interrupt(cpu);
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#endif
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ret = cpu->exception_index;
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break;
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#else
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// Unicorn: call interrupt callback if registered
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if (uc->hook_intr_idx)
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((uc_cb_hookintr_t)uc->hook_callbacks[uc->hook_intr_idx].callback)(
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(uch)uc, cpu->exception_index,
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uc->hook_callbacks[uc->hook_intr_idx].user_data);
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cpu->exception_index = -1;
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#endif
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}
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}
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next_tb = 0; /* force lookup of first TB */
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for(;;) {
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interrupt_request = cpu->interrupt_request;
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if (unlikely(interrupt_request)) {
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if (unlikely(cpu->singlestep_enabled & SSTEP_NOIRQ)) {
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/* Mask out external interrupts for this step. */
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interrupt_request &= ~CPU_INTERRUPT_SSTEP_MASK;
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}
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if (interrupt_request & CPU_INTERRUPT_DEBUG) {
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cpu->interrupt_request &= ~CPU_INTERRUPT_DEBUG;
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cpu->exception_index = EXCP_DEBUG;
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cpu_loop_exit(cpu);
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}
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if (interrupt_request & CPU_INTERRUPT_HALT) {
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cpu->interrupt_request &= ~CPU_INTERRUPT_HALT;
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cpu->halted = 1;
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cpu->exception_index = EXCP_HLT;
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cpu_loop_exit(cpu);
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}
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#if defined(TARGET_I386)
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if (interrupt_request & CPU_INTERRUPT_INIT) {
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cpu_svm_check_intercept_param(env, SVM_EXIT_INIT, 0);
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do_cpu_init(x86_cpu);
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cpu->exception_index = EXCP_HALTED;
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cpu_loop_exit(cpu);
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}
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#else
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if (interrupt_request & CPU_INTERRUPT_RESET) {
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cpu_reset(cpu);
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}
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#endif
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/* The target hook has 3 exit conditions:
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False when the interrupt isn't processed,
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True when it is, and we should restart on a new TB,
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and via longjmp via cpu_loop_exit. */
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if (cc->cpu_exec_interrupt(cpu, interrupt_request)) {
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next_tb = 0;
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}
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/* Don't use the cached interrupt_request value,
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do_interrupt may have updated the EXITTB flag. */
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if (cpu->interrupt_request & CPU_INTERRUPT_EXITTB) {
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cpu->interrupt_request &= ~CPU_INTERRUPT_EXITTB;
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/* ensure that no TB jump will be modified as
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the program flow was changed */
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next_tb = 0;
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}
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}
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if (unlikely(cpu->exit_request)) {
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cpu->exit_request = 0;
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cpu->exception_index = EXCP_INTERRUPT;
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cpu_loop_exit(cpu);
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}
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spin_lock(&tcg_ctx->tb_ctx.tb_lock);
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have_tb_lock = true;
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tb = tb_find_fast(env); // qq
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if (!tb) { // invalid TB due to invalid code?
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break;
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}
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/* Note: we do it here to avoid a gcc bug on Mac OS X when
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doing it in tb_find_slow */
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if (tcg_ctx->tb_ctx.tb_invalidated_flag) {
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/* as some TB could have been invalidated because
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of memory exceptions while generating the code, we
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must recompute the hash index here */
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next_tb = 0;
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tcg_ctx->tb_ctx.tb_invalidated_flag = 0;
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}
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/* see if we can patch the calling TB. When the TB
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spans two pages, we cannot safely do a direct
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jump. */
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if (next_tb != 0 && tb->page_addr[1] == -1) {
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tb_add_jump((TranslationBlock *)(next_tb & ~TB_EXIT_MASK),
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next_tb & TB_EXIT_MASK, tb);
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}
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have_tb_lock = false;
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spin_unlock(&tcg_ctx->tb_ctx.tb_lock);
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/* cpu_interrupt might be called while translating the
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TB, but before it is linked into a potentially
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infinite loop and becomes env->current_tb. Avoid
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starting execution if there is a pending interrupt. */
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cpu->current_tb = tb;
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barrier();
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if (likely(!cpu->exit_request)) {
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tc_ptr = tb->tc_ptr;
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/* execute the generated code */
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next_tb = cpu_tb_exec(cpu, tc_ptr); // qq
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switch (next_tb & TB_EXIT_MASK) {
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case TB_EXIT_REQUESTED:
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/* Something asked us to stop executing
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* chained TBs; just continue round the main
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* loop. Whatever requested the exit will also
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* have set something else (eg exit_request or
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* interrupt_request) which we will handle
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* next time around the loop.
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*/
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tb = (TranslationBlock *)(next_tb & ~TB_EXIT_MASK);
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next_tb = 0;
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break;
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default:
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break;
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}
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}
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cpu->current_tb = NULL;
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/* reset soft MMU for next block (it can currently
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only be set by a memory fault) */
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} /* for(;;) */
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} else {
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/* Reload env after longjmp - the compiler may have smashed all
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* local variables as longjmp is marked 'noreturn'. */
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cpu = uc->current_cpu;
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env = cpu->env_ptr;
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cc = CPU_GET_CLASS(uc, cpu);
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#ifdef TARGET_I386
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x86_cpu = X86_CPU(uc, cpu);
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#endif
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if (have_tb_lock) {
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spin_unlock(&tcg_ctx->tb_ctx.tb_lock);
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have_tb_lock = false;
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}
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}
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} /* for(;;) */
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cc->cpu_exec_exit(cpu);
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/* fail safe : never use current_cpu outside cpu_exec() */
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uc->current_cpu = NULL;
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return ret;
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}
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/* Execute a TB, and fix up the CPU state afterwards if necessary */
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static tcg_target_ulong cpu_tb_exec(CPUState *cpu, uint8_t *tb_ptr)
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{
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CPUArchState *env = cpu->env_ptr;
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TCGContext *tcg_ctx = env->uc->tcg_ctx;
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uintptr_t next_tb;
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next_tb = tcg_qemu_tb_exec(env, tb_ptr);
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if ((next_tb & TB_EXIT_MASK) > TB_EXIT_IDX1) {
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/* We didn't start executing this TB (eg because the instruction
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* counter hit zero); we must restore the guest PC to the address
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* of the start of the TB.
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*/
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CPUClass *cc = CPU_GET_CLASS(env->uc, cpu);
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TranslationBlock *tb = (TranslationBlock *)(next_tb & ~TB_EXIT_MASK);
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if (cc->synchronize_from_tb) {
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// avoid sync twice when helper_uc_tracecode() already did this.
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if (env->uc->emu_counter <= env->uc->emu_count)
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cc->synchronize_from_tb(cpu, tb); // qq
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} else {
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assert(cc->set_pc);
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// avoid sync twice when helper_uc_tracecode() already did this.
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if (env->uc->emu_counter <= env->uc->emu_count)
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cc->set_pc(cpu, tb->pc);
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}
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}
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if ((next_tb & TB_EXIT_MASK) == TB_EXIT_REQUESTED) {
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/* We were asked to stop executing TBs (probably a pending
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* interrupt. We've now stopped, so clear the flag.
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*/
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cpu->tcg_exit_req = 0;
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}
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return next_tb;
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}
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static TranslationBlock *tb_find_slow(CPUArchState *env, target_ulong pc,
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target_ulong cs_base, uint64_t flags) // qq
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{
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CPUState *cpu = ENV_GET_CPU(env);
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TCGContext *tcg_ctx = env->uc->tcg_ctx;
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TranslationBlock *tb, **ptb1;
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unsigned int h;
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tb_page_addr_t phys_pc, phys_page1;
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target_ulong virt_page2;
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tcg_ctx->tb_ctx.tb_invalidated_flag = 0;
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/* find translated block using physical mappings */
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phys_pc = get_page_addr_code(env, pc); // qq
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if (phys_pc == -1) { // invalid code?
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return NULL;
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}
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phys_page1 = phys_pc & TARGET_PAGE_MASK;
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h = tb_phys_hash_func(phys_pc);
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ptb1 = &tcg_ctx->tb_ctx.tb_phys_hash[h];
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for(;;) {
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tb = *ptb1;
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if (!tb)
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goto not_found;
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if (tb->pc == pc &&
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tb->page_addr[0] == phys_page1 &&
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tb->cs_base == cs_base &&
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tb->flags == flags) {
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/* check next page if needed */
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if (tb->page_addr[1] != -1) {
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tb_page_addr_t phys_page2;
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virt_page2 = (pc & TARGET_PAGE_MASK) +
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TARGET_PAGE_SIZE;
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phys_page2 = get_page_addr_code(env, virt_page2);
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if (tb->page_addr[1] == phys_page2)
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goto found;
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} else {
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goto found;
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}
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}
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ptb1 = &tb->phys_hash_next;
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}
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not_found:
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/* if no translated code available, then translate it now */
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tb = tb_gen_code(cpu, pc, cs_base, flags, 0); // qq
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found:
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/* Move the last found TB to the head of the list */
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if (likely(*ptb1)) {
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*ptb1 = tb->phys_hash_next;
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tb->phys_hash_next = tcg_ctx->tb_ctx.tb_phys_hash[h];
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tcg_ctx->tb_ctx.tb_phys_hash[h] = tb;
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}
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/* we add the TB in the virtual pc hash table */
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cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)] = tb;
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return tb;
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}
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static TranslationBlock *tb_find_fast(CPUArchState *env) // qq
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{
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CPUState *cpu = ENV_GET_CPU(env);
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TranslationBlock *tb;
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target_ulong cs_base, pc;
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int flags;
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/* we record a subset of the CPU state. It will
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always be the same before a given translated block
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is executed. */
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cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags);
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tb = cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)];
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if (unlikely(!tb || tb->pc != pc || tb->cs_base != cs_base ||
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tb->flags != flags)) {
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tb = tb_find_slow(env, pc, cs_base, flags); // qq
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}
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return tb;
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}
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static void cpu_handle_debug_exception(CPUArchState *env)
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{
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CPUState *cpu = ENV_GET_CPU(env);
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CPUClass *cc = CPU_GET_CLASS(env->uc, cpu);
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CPUWatchpoint *wp;
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if (!cpu->watchpoint_hit) {
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QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
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wp->flags &= ~BP_WATCHPOINT_HIT;
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}
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}
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cc->debug_excp_handler(cpu);
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}
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