Simplify reg_read/reg_write, obtaining a perf boost.

Single reg_read/reg_write is now about 25% faster.
This commit is contained in:
Robert Xiao
2023-05-11 22:54:03 -07:00
parent 074566cf69
commit 30d202b89e
40 changed files with 563 additions and 1403 deletions

View File

@@ -5,6 +5,9 @@ SOURCE_DIR=$(dirname ${CMD_PATH})
COMMON_SYMBOLS="
unicorn_fill_tlb \
reg_read \
reg_write \
uc_init \
uc_add_inline_hook \
uc_del_inline_hook \
tb_invalidate_phys_range \
@@ -1882,9 +1885,6 @@ x86_cpu_xsave_all_areas \
x86_cpu_xrstor_all_areas \
cpu_get_fp80 \
cpu_set_fp80 \
x86_reg_reset \
x86_reg_read \
x86_reg_write \
"
arm_SYMBOLS="
@@ -2580,9 +2580,6 @@ helper_frint64_s \
helper_frint32_d \
helper_frint64_d \
helper_check_hcr_el2_trap \
arm_reg_reset \
arm_reg_read \
arm_reg_write \
mla_op \
mls_op \
sshl_op \
@@ -4280,9 +4277,6 @@ helper_frint64_s \
helper_frint32_d \
helper_frint64_d \
helper_check_hcr_el2_trap \
arm64_reg_reset \
arm64_reg_read \
arm64_reg_write \
mla_op \
mls_op \
sshl_op \
@@ -4385,9 +4379,6 @@ gen_intermediate_code \
riscv_translate_init \
restore_state_to_opc \
cpu_riscv_init \
riscv_reg_reset \
riscv_reg_read \
riscv_reg_write \
helper_fcvt_l_s \
helper_fcvt_lu_s \
helper_fcvt_s_l \
@@ -5511,9 +5502,6 @@ mips_tcg_init \
cpu_mips_realize_env \
cpu_state_reset \
restore_state_to_opc \
mips_reg_reset \
mips_reg_read \
mips_reg_write \
ieee_rm \
mips_defs \
mips_defs_number \
@@ -5665,9 +5653,6 @@ helper_wrpstate \
helper_wrpil \
helper_done \
helper_retry \
sparc_reg_reset \
sparc_reg_read \
sparc_reg_write \
"
sparc64_SYMBOLS=${sparc_SYMBOLS}
@@ -5828,17 +5813,11 @@ m68k_tcg_init \
register_m68k_insns \
gen_intermediate_code \
restore_state_to_opc \
m68k_reg_reset \
m68k_reg_read \
m68k_reg_write \
"
ppc_SYMBOLS="
ppc_cpu_unrealize \
ppc_cpu_instance_finalize \
ppc_reg_reset \
ppc_reg_read \
ppc_reg_write \
ppc_cpu_do_interrupt \
ppc_cpu_do_system_reset \
ppc_cpu_do_fwnmi_machine_check \