diff --git a/qemu/target/arm/translate.c b/qemu/target/arm/translate.c
index f3ea583e..cd0b9c5b 100644
--- a/qemu/target/arm/translate.c
+++ b/qemu/target/arm/translate.c
@@ -452,7 +452,7 @@ static void gen_sub_carry(TCGContext *tcg_ctx, TCGv_i32 dest, TCGv_i32 t0, TCGv_
     tcg_gen_subi_i32(tcg_ctx, dest, dest, 1);
 }
 
-static inline void mb_tcg_opcode_cmp_hook(TCGContext *tcg_ctx, TCGv_i64 v0, TCGv_i64 v1, uint32_t size)
+static inline void mb_tcg_opcode_cmp_hook(TCGContext *tcg_ctx, TCGv_i64 v0, TCGv_i64 v1, uint32_t size, uint32_t pc)
 {
     uc_engine *uc = tcg_ctx->uc;
     if (HOOK_EXISTS_BOUNDED(uc, UC_HOOK_TCG_OPCODE, tcg_ctx->pc_start)) {
@@ -10925,6 +10925,7 @@ static void disas_arm_insn(DisasContext *s, unsigned int insn)
 {
     unsigned int cond = insn >> 28;
     TCGContext *tcg_ctx = s->uc->tcg_ctx;
+    tcg_ctx->pc_start = s->pc_curr;
 
     /* M variants do not implement ARM mode; this must raise the INVSTATE
      * UsageFault exception.