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Slight refactoring to reduce code duplication.

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This also comes with a performance bump due to inlining of reg_read/reg_write
(as they're only called once now) and the unlikely() on CHECK_REG_TYPE.
This commit is contained in:
Robert Xiao
2023-05-11 20:08:27 -07:00
parent 4055a5ab10
commit 074566cf69
13 changed files with 473 additions and 533 deletions
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80
qemu/target/mips/unicorn.c
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@@ -102,7 +102,7 @@ static uc_err reg_read(CPUMIPSState *env, unsigned int regid, void *value,
}
static uc_err reg_write(CPUMIPSState *env, unsigned int regid,
const void *value, size_t *size)
const void *value, size_t *size, int *setpc)
{
uc_err ret = UC_ERR_ARG;
@@ -124,6 +124,7 @@ static uc_err reg_write(CPUMIPSState *env, unsigned int regid,
case UC_MIPS_REG_PC:
CHECK_REG_TYPE(mipsreg_t);
env->active_tc.PC = *(mipsreg_t *)value;
*setpc = 1;
break;
case UC_MIPS_REG_CP0_CONFIG3:
CHECK_REG_TYPE(mipsreg_t);
@@ -147,17 +148,15 @@ static uc_err reg_write(CPUMIPSState *env, unsigned int regid,
return ret;
}
int mips_reg_read(struct uc_struct *uc, unsigned int *regs, void *const *vals,
size_t *sizes, int count)
static uc_err reg_read_batch(CPUMIPSState *env, unsigned int *regs,
void *const *vals, size_t *sizes, int count)
{
CPUMIPSState *env = &(MIPS_CPU(uc->cpu)->env);
int i;
uc_err err;
for (i = 0; i < count; i++) {
unsigned int regid = regs[i];
void *value = vals[i];
err = reg_read(env, regid, value, sizes ? sizes + i : NULL);
uc_err err = reg_read(env, regid, value, sizes ? sizes + i : NULL);
if (err) {
return err;
}
@@ -166,25 +165,45 @@ int mips_reg_read(struct uc_struct *uc, unsigned int *regs, void *const *vals,
return UC_ERR_OK;
}
int mips_reg_write(struct uc_struct *uc, unsigned int *regs,
const void *const *vals, size_t *sizes, int count)
static uc_err reg_write_batch(CPUMIPSState *env, unsigned int *regs,
const void *const *vals, size_t *sizes, int count,
int *setpc)
{
CPUMIPSState *env = &(MIPS_CPU(uc->cpu)->env);
int i;
uc_err err;
for (i = 0; i < count; i++) {
unsigned int regid = regs[i];
const void *value = vals[i];
err = reg_write(env, regid, value, sizes ? sizes + i : NULL);
uc_err err =
reg_write(env, regid, value, sizes ? sizes + i : NULL, setpc);
if (err) {
return err;
}
if (regid == UC_MIPS_REG_PC) {
// force to quit execution and flush TB
uc->quit_request = true;
break_translation_loop(uc);
}
}
return UC_ERR_OK;
}
int mips_reg_read(struct uc_struct *uc, unsigned int *regs, void *const *vals,
size_t *sizes, int count)
{
CPUMIPSState *env = &(MIPS_CPU(uc->cpu)->env);
return reg_read_batch(env, regs, vals, sizes, count);
}
int mips_reg_write(struct uc_struct *uc, unsigned int *regs,
const void *const *vals, size_t *sizes, int count)
{
CPUMIPSState *env = &(MIPS_CPU(uc->cpu)->env);
int setpc = 0;
uc_err err = reg_write_batch(env, regs, vals, sizes, count, &setpc);
if (err) {
return err;
}
if (setpc) {
// force to quit execution and flush TB
uc->quit_request = true;
break_translation_loop(uc);
}
return UC_ERR_OK;
@@ -210,19 +229,7 @@ int mipsel_context_reg_read(struct uc_context *ctx, unsigned int *regs,
#endif
{
CPUMIPSState *env = (CPUMIPSState *)ctx->data;
int i;
uc_err err;
for (i = 0; i < count; i++) {
unsigned int regid = regs[i];
void *value = vals[i];
err = reg_read(env, regid, value, sizes ? sizes + i : NULL);
if (err) {
return err;
}
}
return UC_ERR_OK;
return reg_read_batch(env, regs, vals, sizes, count);
}
DEFAULT_VISIBILITY
@@ -246,19 +253,8 @@ int mipsel_context_reg_write(struct uc_context *ctx, unsigned int *regs,
#endif
{
CPUMIPSState *env = (CPUMIPSState *)ctx->data;
int i;
uc_err err;
for (i = 0; i < count; i++) {
unsigned int regid = regs[i];
const void *value = vals[i];
err = reg_write(env, regid, value, sizes ? sizes + i : NULL);
if (err) {
return err;
}
}
return UC_ERR_OK;
int setpc = 0;
return reg_write_batch(env, regs, vals, sizes, count, &setpc);
}
static int mips_cpus_init(struct uc_struct *uc, const char *cpu_model)