Unicorn interface working with test app in 32bit and 64bit builds.

qemu/hw/core/machine.c

@@ -21,13 +21,24 @@ static void machine_finalize(struct uc_struct *uc, Object *obj, void *opaque)
 }
 
 static const TypeInfo machine_info = {
-    .name = TYPE_MACHINE,
-    .parent = TYPE_OBJECT,
-    .abstract = true,
-    .class_size = sizeof(MachineClass),
-    .instance_size = sizeof(MachineState),
-    .instance_init = machine_initfn,
-    .instance_finalize = machine_finalize,
+    TYPE_MACHINE,
+    TYPE_OBJECT,
+    
+    sizeof(MachineClass),
+    sizeof(MachineState),
+	NULL,
+
+    machine_initfn,
+	NULL,
+    machine_finalize,
+	
+	NULL,
+
+	NULL,
+	NULL,
+	NULL,
+
+	true,
 };
 
 void machine_register_types(struct uc_struct *uc)

qemu/hw/core/qdev.c

@@ -280,16 +280,24 @@ Object *qdev_get_machine(struct uc_struct *uc)
 }
 
 static const TypeInfo device_type_info = {
-    .name = TYPE_DEVICE,
-    .parent = TYPE_OBJECT,
-    .instance_size = sizeof(DeviceState),
-    .instance_init = device_initfn,
-    .instance_post_init = device_post_init,
-    .instance_finalize = device_finalize,
-    .class_base_init = device_class_base_init,
-    .class_init = device_class_init,
-    .abstract = true,
-    .class_size = sizeof(DeviceClass),
+    TYPE_DEVICE,
+    TYPE_OBJECT,
+    
+    sizeof(DeviceClass),
+	sizeof(DeviceState),
+    NULL,
+	
+	device_initfn,
+    device_post_init,
+    device_finalize,
+    
+	NULL,
+
+    device_class_init,
+	device_class_base_init,
+	NULL,
+    
+	true,
 };
 
 static void qbus_initfn(struct uc_struct *uc, Object *obj, void *opaque)
@@ -309,14 +317,24 @@ static void qbus_finalize(struct uc_struct *uc, Object *obj, void *opaque)
 }
 
 static const TypeInfo bus_info = {
-    .name = TYPE_BUS,
-    .parent = TYPE_OBJECT,
-    .instance_size = sizeof(BusState),
-    .abstract = true,
-    .class_size = sizeof(BusClass),
-    .instance_init = qbus_initfn,
-    .instance_finalize = qbus_finalize,
-    .class_init = bus_class_init,
+    TYPE_BUS,
+    TYPE_OBJECT,
+    
+    sizeof(BusClass),
+	sizeof(BusState),
+    NULL,
+	
+    qbus_initfn,
+    NULL,
+	qbus_finalize,
+	
+	NULL,
+
+    bus_class_init,
+	NULL,
+	NULL,
+	
+	true,
 };
 
 void qdev_register_types(struct uc_struct *uc)

qemu/include/exec/cpu-defs.h

@@ -94,10 +94,14 @@ typedef struct CPUTLBEntry {
        use the corresponding iotlb value.  */
     uintptr_t addend;
     /* padding to get a power of two size */
-    uint8_t dummy[(1 << CPU_TLB_ENTRY_BITS) -
+#if defined(_MSC_VER) && defined(_WIN64)
+	// dummy would be size 0 which isnt supported by msvc, so we remove it
+#else
+	uint8_t dummy[(1 << CPU_TLB_ENTRY_BITS) -
                   (sizeof(target_ulong) * 3 +
                    (((-(int)sizeof(target_ulong)) * 3) & (sizeof(uintptr_t) - 1)) +
                    sizeof(uintptr_t))];
+#endif
 } CPUTLBEntry;
 
 QEMU_BUILD_BUG_ON(sizeof(CPUTLBEntry) != (1 << CPU_TLB_ENTRY_BITS));

qemu/include/qemu/atomic.h

@@ -199,18 +199,13 @@
 
 /* Provide shorter names for GCC atomic builtins.  */
 #ifdef _MSC_VER
-#ifdef _WIN64
-#define atomic_fetch_inc(ptr)        InterlockedIncrement64(ptr)
-#define atomic_fetch_dec(ptr)        InterlockedDecrement64(ptr)
-#define atomic_fetch_add(ptr, n)     InterlockedAdd64(ptr, n)
-#define atomic_fetch_sub(ptr, n)     InterlockedAdd64(ptr, -n)
-#else
-#define atomic_fetch_inc(ptr)        InterlockedIncrement(ptr)
-#define atomic_fetch_dec(ptr)        InterlockedDecrement(ptr)
-#define atomic_fetch_add(ptr, n)     InterlockedAdd(ptr, n)
-#define atomic_fetch_sub(ptr, n)     InterlockedAdd(ptr, -n)
-#endif
+// these return the new value (so we make it return the previous value)
+#define atomic_fetch_inc(ptr)        ((InterlockedIncrement(ptr))-1)
+#define atomic_fetch_dec(ptr)        ((InterlockedDecrement(ptr))+1)
+#define atomic_fetch_add(ptr, n)     ((InterlockedAdd(ptr,  n))-n)
+#define atomic_fetch_sub(ptr, n)     ((InterlockedAdd(ptr, -n))+n)
 #else
+// these return the previous value
 #define atomic_fetch_inc(ptr)  __sync_fetch_and_add(ptr, 1)
 #define atomic_fetch_dec(ptr)  __sync_fetch_and_add(ptr, -1)
 #define atomic_fetch_add       __sync_fetch_and_add
@@ -222,17 +217,10 @@
 
 /* And even shorter names that return void.  */
 #ifdef _MSC_VER
-#ifdef _WIN64
-#define atomic_inc(ptr)        ((void) InterlockedIncrement64(ptr))
-#define atomic_dec(ptr)        ((void) InterlockedDecrement64(ptr))
-#define atomic_add(ptr, n)     ((void) InterlockedAdd64(ptr, n))
-#define atomic_sub(ptr, n)     ((void) InterlockedAdd64(ptr, -n))
-#else
 #define atomic_inc(ptr)        ((void) InterlockedIncrement(ptr))
 #define atomic_dec(ptr)        ((void) InterlockedDecrement(ptr))
 #define atomic_add(ptr, n)     ((void) InterlockedAdd(ptr, n))
 #define atomic_sub(ptr, n)     ((void) InterlockedAdd(ptr, -n))
-#endif
 #else
 #define atomic_inc(ptr)        ((void) __sync_fetch_and_add(ptr, 1))
 #define atomic_dec(ptr)        ((void) __sync_fetch_and_add(ptr, -1))

qemu/include/qemu/timer.h

@@ -558,6 +558,9 @@ static inline int64_t cpu_get_real_ticks(void)
 
 static inline int64_t cpu_get_real_ticks(void)
 {
+#ifdef _MSC_VER
+	return __rdtsc();
+#else
     uint32_t low,high;
     int64_t val;
     asm volatile("rdtsc" : "=a" (low), "=d" (high));
@@ -565,6 +568,7 @@ static inline int64_t cpu_get_real_ticks(void)
     val <<= 32;
     val |= low;
     return val;
+#endif
 }
 
 #elif defined(__hppa__)

qemu/include/sysemu/os-win32.h

@@ -56,7 +56,7 @@
 # define EWOULDBLOCK  WSAEWOULDBLOCK
 #endif
 
-#if defined(_WIN64)
+#if defined(_WIN64) && !defined(_MSC_VER)
 /* On w64, setjmp is implemented by _setjmp which needs a second parameter.
  * If this parameter is NULL, longjump does no stack unwinding.
  * That is what we need for QEMU. Passing the value of register rsp (default)

qemu/memory.c

@@ -400,7 +400,7 @@ static void flatview_destroy(FlatView *view)
 
 static void flatview_ref(FlatView *view)
 {
-    atomic_inc(&view->ref);
+	atomic_inc(&view->ref);
 }
 
 static void flatview_unref(FlatView *view)

qemu/target-i386/cpu.h

@@ -977,7 +977,16 @@ typedef struct CPUX86State {
     uint8_t nmi_injected;
     uint8_t nmi_pending;
 
-    CPU_COMMON
+#if NB_MMU_MODES == 0
+#error NB_MMU_MODES is zero
+#endif
+#if CPU_TLB_SIZE == 0
+#error CPU_TLB_SIZE is zero
+#endif
+#if CPU_VTLB_SIZE == 0
+#error CPU_VTLB_SIZE is zero
+#endif
+	CPU_COMMON
 
     /* Fields from here on are preserved across CPU reset. */
 

qemu/tcg/tcg.c

@@ -2375,7 +2375,11 @@ static int tcg_reg_alloc_call(TCGContext *s, const TCGOpDef *def,
     flags = args[nb_oargs + nb_iargs + 1];
 
     nb_regs = ARRAY_SIZE(tcg_target_call_iarg_regs);
-    if (nb_regs > nb_params) {
+#if TCG_TARGET_REG_BITS == 32
+	// do this because msvc cannot have arrays with 0 entries.
+	nb_regs = 0;
+#endif
+	if (nb_regs > nb_params) {
         nb_regs = nb_params;
     }
 

qemu/util/qemu-thread-win32.c

@@ -127,7 +127,9 @@ void *qemu_thread_join(QemuThread *thread)
     ret = data->ret;
     assert(data->mode != QEMU_THREAD_DETACHED);
     DeleteCriticalSection(&data->cs);
+    data->uc->qemu_thread_data = NULL;
     g_free(data);
+    data = NULL;
     return ret;
 }